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| Application No. | Application Title | Issue Date |
| 20120127781 | SEMICONDUCTOR MEMORY DEVICE To increase a storage capacity of a memory module per unit area, and to provide a memory module with low power consumption, a transistor formed using an oxide semiconductor film, a silicon carbide film, a gallium nitride film, or the like, which is highly purified and h... | 05/24/2012 |
| 20120127776 | FERROELECTRIC MEMORY DEVICE A ferroelectric memory device has word, bit, plate lines; memory cells having access gate and ferroelectric capacitor; latch amplifier for latching stored data; and write amplifier for driving bit lines according to write data. The bit lines are precharged to a referenc... | 05/24/2012 |
| 20120106226 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a bit line; two or more word lines; and a memory cell including two or more sub memory cells that each include a transistor and a capacitor. One of a source and a drain of the transistor is connected to the bit line, the other of t... | 05/03/2012 |
| 20120106235 | IMPLEMENTING PHYSICALLY UNCLONABLE FUNCTION (PUF) UTILIZING EDRAM MEMORY CELL CAPACITANCE VARIATION A method and embedded dynamic random access memory (EDRAM) circuit for implementing a physically unclonable function (PUF), and a design structure on which the subject circuit resides are provided. An embedded dynamic random access memory (EDRAM) circuit includes a firs... | 05/03/2012 |
| 20120081948 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF In a conventional DRAM, errors in reading data are likely to occur when the capacitance of a capacitor is reduced. A plurality of cells is connected to one main bit line Each cell includes a sub bit line and 2 to 32 memory cells. Further, each cell includes a selection ... | 04/05/2012 |
| 20120069635 | CAPACITY AND DENSITY ENHANCEMENT CIRCUIT FOR SUB-THRESHOLD MEMORY UNIT ARRAY A capacity and density enhancement circuit for a sub-threshold memory unit array which can decrease the drain current in the bit lines and enhance the pull-up capability of memory cells. The capacity and density enhancement circuit is composed of a first enhancement tra... | 03/22/2012 |
| 20120069634 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INSPECTING THE SAME When the threshold voltage Vth of the transistor in the memory cell is within the allowable range is determined, a memory cell which does not have sufficient data retention characteristics is eliminated. In order to eliminate such a memory cell, the potential... | 03/22/2012 |
| 20120051116 | DRIVING METHOD OF SEMICONDUCTOR DEVICE A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor ... | 03/01/2012 |
| 20120051117 | SIGNAL PROCESSING CIRCUIT AND METHOD FOR DRIVING THE SAME An object is to provide a signal processing circuit which can be manufactured without a complex manufacturing process and suppress power consumption. A storage element includes two logic elements (referred to as a first phase-inversion element and a second phase-inversi... | 03/01/2012 |
| 20120051118 | MEMORY DEVICE AND SEMICONDUCTOR DEVICE A memory device in which data can be retained for a long time is provided. The memory device includes a memory element and a transistor which functions as a switching element for controlling supply, storage, and release of electrical charge in the memory element. The tr... | 03/01/2012 |
| 20120051120 | DRIVING METHOD OF SEMICONDUCTOR DEVICE A driving method by which stored data can be retained even with no power supply and the number of writing operations is not limited is provided. The variation of a writing potential to a memory element is suppressed to improve the reliability according to a new driving ... | 03/01/2012 |
| 20120051119 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device which includes a memory cell capable of holding accurate data even when the data is multilevel data. The semiconductor device includes a memory cell holding data in a node to which one of a source and a drain of a transisto... | 03/01/2012 |
| 20120044752 | HIGH DENSITY INTEGRATED CIRCUITRY FOR SEMICONDUCTOR MEMORY Processes are disclosed which facilitate improved high-density memory circuitry, most preferably dynamic random access memory (DRAM) circuitry. A semiconductor memory device includes i) a total of no more than 68,000,000 functional and operably addressable memory cells ... | 02/23/2012 |
| 20120039114 | Memcapacitor A memcapacitor device (100) includes a first electrode (104) and a second electrode (106) and a memcapacitive matrix (102) interposed between the first electrode (104) and the second electrode (106). Mobile dopants (111) ... | 02/16/2012 |
| 20120039126 | METHOD FOR DRIVING SEMICONDUCTOR MEMORY DEVICE A method for driving a semiconductor memory device including a transistor with low leakage current between a source and a drain in an off state and capable of storing data for a long time is provided. In a matrix including a plurality of memory cells in each of which a ... | 02/16/2012 |
| 20120033484 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF The semiconductor device is formed using a material which allows a sufficient reduction in off-state current of a transistor; for example, an oxide semiconductor material, which is a wide gap semiconductor, is used. When a semiconductor material which allows a sufficien... | 02/09/2012 |
| 20120033485 | SEMICONDUCTOR DEVICE In a semiconductor device which includes a bit line, m (m is a natural number of 3 or more) word lines, a source line, m signal lines, first to m-th memory cells, and a driver circuit, the memory cell includes a first transistor and a second transistor for storing elect... | 02/09/2012 |
| 20120033483 | SEMICONDUCTOR DEVICE AND DRIVING METHOD OF SEMICONDUCTOR DEVICE A memory cell includes a capacitor, a first transistor, and a second transistor whose off-state current is smaller than that of the first transistor. The first transistor has higher switching speed than the second transistor. The first transistor, the second transistor,... | 02/09/2012 |
| 20120033488 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a memory cell formed using a wide bandgap semiconductor, for example, an oxide semiconductor is provided. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference pot... | 02/09/2012 |
| 20120033486 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and does not have a limitation on the number of writing operations. A semiconductor device includes a plurality of memory cells eac... | 02/09/2012 |
| 20120033487 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is pr... | 02/09/2012 |
| 20120036315 | Morphing Memory Architecture A memory circuit comprises a memory array including a plurality of memory cells, multiple word lines, and at least one bit line. Each of the memory cells is coupled to a unique pair of a bit line and a word line for selectively accessing the memory cells. The memory cir... | 02/09/2012 |
| 20120020144 | SEMICONDUCTOR DEVICE HAVING FLOATING BODY TYPE TRANSISTOR A semiconductor device is disclosed in which a signal line and a drive circuit driving the signal line in response to a signal to be transmitted are provided. A transistor of a floating body type is further provided that includes a gate, a source, a drain, and a body be... | 01/26/2012 |
| 20120014170 | Capacitive Crossbar Arrays A capacitive crossbar array (100) includes a first set of conductors (102) and a second set of conductors (104) which intersect to form crosspoints. A nonlinear capacitive device (106) is interposed between a first conductor (103) with... | 01/19/2012 |
| 20120008375 | CMOS IMAGE SENSOR WITH NOISE CANCELLATION A memory comprises a two dimensional array of memory cells. Each memory cell comprises a first transistor, a second transistor and a capacitor. A multi-bit datum is stored as one of a plurality of voltage signal levels driven over a vertical input signal line and furthe... | 01/12/2012 |
| 20110317475 | ELECTRONIC DEVICE To suppress a timing window from being narrowed undesirably by the harmonic component of a signal output from a semiconductor component without imposing a burden on the semiconductor component that controls access. A capacitor element is ar... | 12/29/2011 |
| 20110317474 | SEMICONDUCTOR DEVICE A semiconductor device includes a source line, a bit line, and first to m-th (m is a natural number) memory cells connected in series between the source line and the bit line. Each of the first to m-th memory cells includes a first transistor having a first gate termina... | 12/29/2011 |
| 20110310659 | VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP CIRCUIT A voltage-controlled oscillator includes an oscillating unit configured to output first and second output clock signals at first and second nodes, respectively, the first and second output clock signals having a frequency that is variable in response to a control voltag... | 12/22/2011 |
| 20110305061 | Ferroelectric Memories based on Arrays of Autonomous Memory Bits A memory having a plurality of ferroelectric memory cells connected between first and second bit lines is disclosed. A read circuit is also connected between the first and second bit lines. A word select circuit selects one of the ferroelectric memory cells and generate... | 12/15/2011 |
| 20110292717 | Semiconductor device A semiconductor device may include, but is not limited to: a first memory cell; a first line; a second line; and a first capacitor. The first line is coupled to the first memory cell. The first line supplies a first voltage to the first memory cell. The second line is s... | 12/01/2011 |
| 20110286262 | Semiconductor memory device A semiconductor memory device includes a plurality of word lines wired in a first direction, a plurality of bit lines wired in a direction crossing the first direction, a memory cell array including a plurality of DRAM cells provided corresponding to intersections betwe... | 11/24/2011 |
| 20110280061 | SEMICONDUCTOR DEVICE A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel ... | 11/17/2011 |
| 20110273923 | PASS-GATED BUMP SENSE AMPLIFIER FOR EMBEDDED DRAMS A sensing circuit for use in a semiconductor memory device includes first and second conducting lines for conducting a bit signal to and from a memory cell. The circuit further includes a sense amplifier coupled to the first and second conducting lines for sensing a bit... | 11/10/2011 |
| 20110273924 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device is provided which includes a voltage detecting unit configured to compare a target voltage level with a fed-back internal voltage to output a detection signal in a normal mode, a driving unit configured to selectively drive an internal volt... | 11/10/2011 |
| 20110273922 | SENSE AMPLIFIER USING REFERENCE SIGNAL THROUGH STANDARD MOS AND DRAM CAPACITOR A memory circuit includes a first memory cell node capacitor, a first memory cell node transistor, a second memory cell node having a second memory cell node capacitor and a second memory cell node transistor, and a pre-charging circuit for pre-charging the first and se... | 11/10/2011 |
| 20110273921 | INTEGRATABLE PROGRAMMABLE CAPACITIVE DEVICE A circuit with a capacitive device is disclosed. The circuit may comprise a capacitive device connected between a first conductor and a second conductor. The capacitive device may comprise a first electrode connected to the first conductor and a second electrode being c... | 11/10/2011 |
| 20110255332 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device comprises a comparing unit that comprises a potential of a memory cell with a reference potential supplied by a reference cell to read data of the memory cell; first and second bit lines connected to inputs of the comparing unit; a first me... | 10/20/2011 |
| 20110255328 | SEMICONDUCTOR MEMORY DEVICE The demand for reducing the size and increasing the degree of integration of semiconductor memory devices has increased. In a semiconductor memory device, a smoothing capacitor which has to be provided therein for stabilizing a power supply voltage etc. is formed in an ... | 10/20/2011 |
| 20110249487 | SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE A semiconductor memory device or a semiconductor device which has high reading accuracy is provided. A bit line, a word line, a memory cell placed in an intersection portion of the bit line and the word line, and a reading circuit electrically connected to the bit line ... | 10/13/2011 |
| 20110249488 | Data Cells with Drivers and Methods of Making and Operating the Same Disclosed are methods and devices, among which is a device that includes a first semiconductor fin having a first gate, a second semiconductor fin adjacent the first semiconductor fin and having a second gate, and a third gate extending between the first semiconductor f... | 10/13/2011 |
