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Class 365/145 - Ferroelectric


Subclass of Class 365 - Static information storage and retrieval
Definition: Subject matter where the storage element is ferroelectric.
No. of applications: 534
Last issue date: 05/24/2012


1                      
Application No.Application TitleIssue Date
20120127776FERROELECTRIC MEMORY DEVICE
A ferroelectric memory device has word, bit, plate lines; memory cells having access gate and ferroelectric capacitor; latch amplifier for latching stored data; and write amplifier for driving bit lines according to write data. The bit lines are precharged to a referenc... 		05/24/2012
20120127777METHOD TO IMPROVE FERROELECTRIC MEMORY PERFORMANCE AND RELIABILITY
One embodiment of the present invention relates to a method by which the imprint of a ferroelectric random access memory (FRAM) array is reduced. The method begins when an event that will cause imprint to the memory array is anticipated by an external agent to the devic... 		05/24/2012
20120106233REDUCED SWITCHING-ENERGY MAGNETIC ELEMENTS
A system includes a continuous thin-film ferromagnetic layer, N magnetic tunnel junction (MTJ) devices, and N write structures. The continuous thin-film ferromagnetic layer includes N modified regions. Each of the N modified regions is configured to stabilize a magnetic... 		05/03/2012
20120081943Polarization-Coupled Ferroelectric Unipolar Junction Memory And Energy Storage Device
A memory device is provided. The memory device includes a plurality of memory cells and a controller to write data to and read data from the memory cells. Each memory cell includes a first semiconductor material having a spontaneous polarization, a resistive ferroelectr... 		04/05/2012
20120069622Sector Array Addressing for ECC Management
An addressing scheme for non-volatile memory arrays having short circuit defects that manages the demand for error correction. The scheme generally avoids simultaneous active driving of the row line and column line of the selected cell during write. Instead, only a sing... 		03/22/2012
20120069623FERROELECTRIC MEMORY
One embodiment provides a ferroelectric memory including: memory cells each including a ferroelectric memory; first and second bitlines configured to read out cell signals from the memory cells; a first circuit configured to fix, when the cell signal is read from the me... 		03/22/2012
20120033478NON-VOLATILE MEMORY DEVICE AND SENSING METHOD FOR FORMING THE SAME
A non-volatile memory device and a method for forming the same are disclosed, which relate to a ferroelectric memory device having non-volatile characteristics. The non-volatile memory device includes a control gate configured to receive a read voltage, an insulation fi... 		02/09/2012
20120020140RESISTIVE MEMORY CELL AND OPERATION THEREOF, AND RESISTIVE MEMORY AND OPERATION AND FABRICATION THEREOF
A resistive memory cell is described, including a first electrode, a high-resistance ferroelectric material layer and a second electrode. The ferroelectric material layer has a first interface with the first electrode and has a second interface with the second electrode... 		01/26/2012
20120014159MEMORY DEVICE
A memory device includes a memory unit including a plurality of first conductive lines and a plurality of second conductive lines that cross the first conductive lines, and a driving unit module coupled with the plurality of the first conductive lines through respective... 		01/19/2012
20120008365METHOD FOR OPERATING A NONVOLATILE SWITCHING DEVICE
A method of flowing a current selectively with a nonvolatile switching device according to the present disclosure includes a step of configuring, in the nonvolatile switching device, any one of a first state in which a current does not flow between the electrode group, ... 		01/12/2012
20110310650 SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF OPERATING THEREOF
In the operating method of the semiconductor memory device, (1) voltages V1, V2, Vs, and Vd, which satisfy V1>Vs, V1>Vd, V2>Vs, and V2>Vd, are applied to a first gate electrode, a second gate electrode, a source elec... 		12/22/2011
20110310651Variable Impedance Circuit Controlled by a Ferroelectric Capacitor
A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. ... 		12/22/2011
20110305062MEMORY CELL AND MEMORY DEVICE USING THE SAME
Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelect... 		12/15/2011
20110305061Ferroelectric Memories based on Arrays of Autonomous Memory Bits
A memory having a plurality of ferroelectric memory cells connected between first and second bit lines is disclosed. A read circuit is also connected between the first and second bit lines. A word select circuit selects one of the ferroelectric memory cells and generate... 		12/15/2011
20110299318SEMICONDUCTOR MEMORY CELL AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR MEMORY DEVICES
A semiconductor memory cell includes: a memory element formed by a first field effect transistor having a gate insulating film made of a ferroelectric film; and a select switching element formed by a second field effect transistor having a gate insulating film made of a... 		12/08/2011
20110255328SEMICONDUCTOR MEMORY DEVICE
The demand for reducing the size and increasing the degree of integration of semiconductor memory devices has increased. In a semiconductor memory device, a smoothing capacitor which has to be provided therein for stabilizing a power supply voltage etc. is formed in an ... 		10/20/2011
20110199810Data Holding Device
A data holding device according to the present invention includes a loop structure portion LOOP for holding data using a plurality of logic gates (NAND3 and NAND4) connected in a loop, a nonvolatile storage portion (NVM) for storing in a nonvolatile manner... 		08/18/2011
20110198725GENERATING AND EXPLOITING AN ASYMMETRIC CAPACITANCE HYSTERESIS OF FERROELECTRIC MIM CAPACITORS
The present invention relates to an electric component comprising at least one first MIM capacitor having a ferroelectric insulator with a dielectric constant of at least 100 between a first capacitor electrode of a first electrode material and a second capacitor electr... 		08/18/2011
20110188287High speed FRAM including a deselect circuit
High speed FRAM including a deselect circuit is realized for replacing SRAM, wherein the deselect circuit is connected to a local bit line pair for forcing a middle voltage to storage nodes of ferroelectric capacitors of unselected memory cell while a plate line of the ... 		08/04/2011
20110188288SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREFOR
A memory includes a first conductive-type first diffusion layer on the semiconductor substrate; second conductive-type bodies on the first diffusion layer(s); first conductive-type second diffusion layers on the bodies; first gate dielectric films comprising ferroelectr... 		08/04/2011
20110182102SEMICONDUCTOR MEMORY DEVICE
A memory includes memory cells on a semiconductor layer, in which each of the memory cells includes a source layer and a drain layer in the semiconductor layer; an electrically floating body region provided in the semiconductor layer between the source layer and the dra... 		07/28/2011
20110170330Graphene Memory Cell and Fabrication Methods Thereof
The disclosed memory cell (10) comprises a graphene layer (16) having controllable resistance states representing data values of the memory cell (10) In one exemplary embodiment a non-volatile memory is provided by having a ferroelectric layer (1... 		07/14/2011
20110170329NONVOLATILE FERROELECTRIC MEMORY DEVICE USING SILICON SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND REFRESH METHOD THEREOF
A nonvolatile ferroelectric memory device using a silicon substrate includes an insulating layer formed in an etching region of the silicon substrate, a bottom word line formed in the insulating layer so as to be enclosed by the insulating layer, a floating channel laye... 		07/14/2011
20110149633Memory devices and methods of operating the same
Memory devices and methods of operating the same. A memory cell of a memory device may include a ferroelectric layer and a semiconductor layer bonded to each other. The ferroelectric layer may be of a p-type and the semiconductor layer may be of an n-type. The memory ce... 		06/23/2011
20110141813USE OF EMERGING NON-VOLATILE MEMORY ELEMENTS WITH FLASH MEMORY
Memory devices and methods of operating memory devices are provided, such as those that involve a memory architecture that replaces typical static and/or dynamic components with emerging non-volatile memory (NV) elements. The emerging NV memory elements can replace conv... 		06/16/2011
20110128769DATA HOLDING DEVICE
A data holding device comprises a loop structure part (LOOP) that holds data by use of logic gates connected in a loop (e.g., inverters INV3 and INV4 of FIG. 1); a nonvolatile storage part (CL1a, CL1b, CL2a,... 		06/02/2011
20110122674REVERSE CONNECTION MTJ CELL FOR STT MRAM
Apparatus and methods are disclosed herein for a reverse-connection STT MTJ element of a MRAM to overcome the source degeneration effect when switching the magnetization of the MTJ element from the parallel to the anti-parallel direction. A memory cell of a MRAM having ... 		05/26/2011
20110090731GREEN TRANSISTOR FOR NANO-SI FERRO-ELECTRIC RAM AND METHOD OF OPERATING THE SAME
The present disclosure provides a green transistor for nano-Si Ferro-electric random access memory (FeRAM) and method of operating the same. The nano-Si FeRAM includes a plurality of memory cells arranged in an array with bit-lines and word-lines, and each memory cell i... 		04/21/2011
20110085369METHOD TO IMPROVE FERROELECTRIC MEMORY PERFORMANCE AND RELIABILITY
One embodiment of the present invention relates to a method by which the imprint of a ferroelectric random access memory (FRAM) array is reduced. The method begins when an event that will cause imprint to the memory array is anticipated by an external agent to the devic... 		04/14/2011
20110075467Ferroelectric memory devices and operating methods thereof
A ferroelectric memory device having a NAND array of a plurality of ferroelectric memory cells includes: a fully depleted channel layer; a gate electrode layer; and a ferroelectric layer located between the channel layer and the gate electrode layer. The data of the plu... 		03/31/2011
20110063886SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD OF THE SAME
A memory includes a cell region; a spare region including a spare block; a fuse region storing remedy information necessary for an access to the spare block instead of a remedy target block, the fuse region comprising non-defective cells in the remedy target block, or i... 		03/17/2011
20110058403FERRO-ELECTRIC RANDOM ACCESS MEMORY APPARATUS
A ferro-electric random access memory apparatus has a memory cell array in which a plurality of memory cells each formed of a ferro-electric capacitor and a transistor are arranged, word lines are disposed to select a memory cell, plate lines are disposed to apply a vol... 		03/10/2011
20110051491FERROELECTRIC RANDOM ACCESS MEMORY AND MEMORY SYSTEM
Certain embodiments provide a ferroelectric random access memory comprising a first buffer, a second buffer, a third buffer, a first controlling unit, a second controlling unit, a memory cell array, a sense amplifier circuit, and a third controlling unit. The first buff... 		03/03/2011
20110044087SEMICONDUCTOR MEMORY DEVICE
A memory includes ferroelectric capacitors; sense amplifiers configured to detect the data stored in ferroelectric capacitors; and a plate control circuit configured to receive a plate driving signal driving a plate line, a write signal indicating writing of data from a... 		02/24/2011
20110032744RECORDING METHOD FOR MAGNETIC MEMORY DEVICE
[Object] To provide a recording method for a magnetic memory device including a recording layer that holds information as a magnetization direction of a magnetic body and a magnetization reference layer that is provided with respect to the recording layer with an insula... 		02/10/2011
20110019461F-SRAM Power-Off Operation
A process of operating an integrated circuit containing a programmable data storage component including at least one data ferroelectric capacitor and at least one additional ferroelectric capacitor, in which power is removed from a state circuit after each read operatio... 		01/27/2011
20100321975FERROELECTRIC MEMORY DEVICE
By separately setting a capacitor on BL depending on whether the mode is a DRAM mode or an FRAM mode, it is compatible with improvement in a speed by BL capacitor reduction in the DRAM mode and a sufficient BL capacitance in the FRAM mode.

...

12/23/2010
20100315874USE OF EMERGING NON-VOLATILE MEMORY ELEMENTS WITH FLASH MEMORY
Memory devices and methods of operating memory devices are provided, such as those that involve a memory architecture that replaces typical static and/or dynamic components with emerging non-volatile memory (NV) elements. The emerging NV memory elements can replace conv... 		12/16/2010
20100309711F-RAM Device with Current Mirror Sense Amp
A F-RAM memory device containing a current mirror sense amp. A F-RAM memory device containing a current mirror sense amp coupled to a negative voltage generator. A method of reading data from and restoring data back into F-RAM cells in a 2T2C F-RAM device containing a c... 		12/09/2010
20100309710Variable Impedance Circuit Controlled by a Ferroelectric Capacitor
A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. ... 		12/09/2010
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