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| Application No. | Application Title | Issue Date |
| 20120007762 | CURRENT REDUCTION IN A SINGLE STAGE CYCLIC ANALOG TO DIGITAL CONVERTER WITH VARIABLE RESOLUTION A converter (200) adapted to convert an analog input signal into a digital output signal includes an analog input terminal (205) for receiving the analog input signal, a Redundant Signed Digit (RSD) stage (210) coupled to the analog input terminal, ... | 01/12/2012 |
| 20090128390 | SIGNAL LEVEL CONVERSION CIRCUIT FOR INCREASING DYNAMIC RANGE OF ANALOG-TO-DIGITAL CONVERTER Disclosed herein is a signal level conversion circuit for increasing the dynamic range of an Analog-to-Digital Converter (ADC). A comparison and calculation unit compares the value of an input signal Vin and the value of a first reference signal Vref1 05/21/2009 | |
| 20080309542 | A/D converter circuit and A/D conversion method An A/D converter circuit has a first ring delay line and a second ring delay line configured to vary respective characteristics in the same manner relative to a change in the ambient temperature. A reference voltage, which is free from a change in temperature, is fed as... | 12/18/2008 |
| 20080291067 | Automatic range shift system and method for an Analog to Digital Converter Automatic range shifting for an analog to digital converter (ADC) includes combining an external analog input and a DAC output to provide an input to the ADC, detecting whether the range of the output of the ADC is above a predetermined upper range limit or below a pred... | 11/27/2008 |
| 20080129573 | Differential input successive approximation analog to digital converter with common mode rejection A Successive Approximation Routine converter is provided in which a comparator is responsive to an output of a first Digital to Analog Converter, and an output of a second Digital to Analog Converter and to a DAC common mode output reference voltage, and wherein the com... | 06/05/2008 |
| 20070159375 | Image compression and decompression Techniques employable to compress and decompress images are presented herein. ... | 07/12/2007 |
| 20050225471 | Successive approximation AD converter A successive approximation AD converter comprises a voltage comparator having a first terminal which is connected to an input terminal for an analog signal via a sampling capacitor, and a second terminal into which a reference voltage is input from reference voltage sup... | 10/13/2005 |
| 20050219108 | METHOD AND APPARATUS FOR SUBCLOCKING A SAR ANALOG-TO-DIGITAL CONVERTER Method and apparatus for subclocking a SAR analog-to-digital converter. A method is disclosed for clocking the operation of a SAR analog-to-digital converter (ADC). A low frequency clock and a high frequency clock are provided. An analog input voltage is then tracked du... | 10/06/2005 |
| 20050219107 | SYSTEM AND METHOD FOR SUCCESSIVE APPROXIMATION A system and method for providing successive approximation, such as can be used by a successive approximation converter or by a coherent undersampling digitizer. The system comprising a memory having a successive approximation value and a comparison system configured to... | 10/06/2005 |
| 20050140538 | SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER WITH SAMPLE AND HOLD ELEMENT According to some embodiments, a successive approximation analog-to-digital converter is provided. ... | 06/30/2005 |
| 20050122247 | Analog-digital converter and method for analog-digital converting An analog-digital converter has a first register for holding a first approximation number which is variable in a first cycle and is fixed in a second cycle, as well as a second register for holding a second approximation number which is fixed in the first cycle and is v... | 06/09/2005 |
| 20050083221 | Method and circuit for gain and/or offset correction in a capacitor digital-to-analog converter A method and circuit for gain and/or offset correction in a CDAC circuit are provided. The gain and/or offset correction can be realized by adjusting the sampling capacitance of a capacitor array, with a positive array of the CDAC circuit being trimmed for gain correcti... | 04/21/2005 |
| 20050057387 | INCREASING THE SNR OF SUCCESSIVE APPROXIMATION TYPE ADCS WITHOUT COMPROMISING THROUGHPUT PERFORMANCE SUBSTANTIALLY When converting an analog signal to N-bit digital codes, high SNR (signal to noise ratio) by generating multiple N-bit codes from the same analog sample and averaging the N-bit codes. However, the entire N-bit code is determined only a single time, and only P-bit (P les... | 03/17/2005 |
| 20050024250 | Space efficient low power cyclic A/D converter Methods and apparatus are provided for an analog converter. The apparatus comprises a first redundant signed digit (RSD) stage and a configurable block. The configurable block converts to a sample/hold circuit to sample a single ended analog signal. The sampled signal i... | 02/03/2005 |
| 20050024251 | Successive approximation analog/digital converter with reduced chip area A successive approximation A/D converter includes first and second S/H and comparators sampling and holding first and second external analog input voltages simultaneously and comparing the held, first and second external analog input voltages with a reference voltage to... | 02/03/2005 |
