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| Application No. | Application Title | Issue Date |
| 20120127006 | Two-Step Subranging ADC Architecture First and second track and hold stages track and store an input voltage for a sample of an analog input signal. A coarse reference ladder provides a plurality of coarse references. The coarse reference ladder includes a first coarse reference and a second coarse referen... | 05/24/2012 |
| 20120127007 | COMPARISON CIRCUIT AND ANALOG-TO-DIGITAL CONVERSION DEVICE A comparison circuit includes: an input circuit includes a first transistor for receiving a first signal, and a second transistor for receiving a second signal; a first current route of which the electric current is controlled by the first transistor; a second current r... | 05/24/2012 |
| 20120081244 | METHOD AND APPARATUS FOR ANALOG TO DIGITAL CONVERSION An analog to digital converter (ADC) comprises an input node having a variable analog input voltage, first and second switched capacitor circuits, an operational amplifier, and a control circuit. The first switched capacitor circuit has first and second capacitors and i... | 04/05/2012 |
| 20120050081 | POWER AND AREA EFFICIENT INTERLEAVED ADC Pipeline analog-to-digital converters (ADCs) are commonly used for high frequency applications; however, operating at high sampling rates will often result in high power consumption or tight timing constraints. Here, though, an ADC is provided that allows for relaxed ti... | 03/01/2012 |
| 20120050082 | COMPOSITE ANALOG-TO-DIGITAL CONVERTER An analog-to-digital converter (ADC) includes a plurality of single slope ADCs, a ramp generator, and digital output circuitry. Each single slope ADC includes an analog input operable to receive an analog input signal, a ramp input operable to receive an analog ramp sig... | 03/01/2012 |
| 20120032826 | ANALOG TO DIGITAL CONVERTERS In one embodiment, an analog to digital converter (ADC) for converting an analog signal to a digital signal includes an input channel for receiving the analog signal, and includes a first and second sampling-integrating units. The first sampling-integrating unit receive... | 02/09/2012 |
| 20120025903 | Sampling of Multiple Data Channels Using a Successive Approximation Register Converter Provided is a method for performing analog to digital conversion of a plurality of analog signal channels. The method may comprise successively processing each analog signal channel of a plurality of analog signal channels. The processing of an analog signal channel of ... | 02/02/2012 |
| 20120013494 | Time Varying Quantization-based Linearity Enhancement of Signal Converters and Mixed-signal Systems A signal-linearization system and method reduces nonlinear distortions in a digitized signal generated by an analog-to-digital converter (ADC) when converting an analog input signal from analog to digital form. A signal adder adds a dither waveform to the analog input s... | 01/19/2012 |
| 20120007758 | SUCCESSIVE APPROXIMATION ANALOG TO DIGITAL CONVERTER AND METHOD OF ANALOG TO DIGITAL CONVERSION An analog to digital converter includes a digital to analog converting circuit, a comparator and a signal processing circuit. The digital to analog converting circuit samples and holds an analog input signal, and converts digital output data to an analog signal to gener... | 01/12/2012 |
| 20120007759 | TRACK-AND-HOLD CIRCUIT AND A/D CONVERTER A track-and-hold circuit includes a first sampling circuit that samples an analog input signal, a second sampling circuit that samples the analog input signal, the second sampling circuit and the first sampling circuit being connected in parallel, a first amplifier that... | 01/12/2012 |
| 20110304490 | LOW POWER COMPARATOR FOR USE IN SAR ADCS Successive approximation register (SAR) analog-to-digital converters (ADCs) generally use one or more comparators to convert an analog signal to a digital signal. These comparators, however, can consume a great deal of power, so it is desirable to have a comparator conf... | 12/15/2011 |
| 20110285563 | PIPELINED ANALOG-TO-DIGITAL CONVERTER AND SUB-CONVERTER STAGE The present invention introduces a sub-converter stage used in a pipelined analog-to-digital converter. The sub-converter stage comprises an amplifier with a gain A, a sub analog-to-digital converter with comparators and a digital unit, a first capacitor with capacitanc... | 11/24/2011 |
| 20110279297 | Analog-to-Digital Conversion One embodiment of the present invention includes an analog-to-digital converter (ADC) system. The system includes an ADC configured to generate digital samples that are digital versions of at least one analog signal at a sampling frequency and a memory configured to sto... | 11/17/2011 |
| 20110279295 | PIPELINED ANALOG-TO-DIGITAL CONVERTER AND ITS SINGLE REDUNDANCY BIT DIGITAL CORRECTION TECHNIQUE The present invention pertains to the technical field of A/D converter, to be more specific, a pipeline A/D converter and its single redundancy bit digital correction. The related single redundancy bit digital correction features the following steps: substages except fo... | 11/17/2011 |
| 20110267212 | CAPACITIVE INTERFACE CIRCUIT FOR LOW POWER SENSOR SYSTEM This disclosure describes a capacitive interface circuit for a low power system. The capacitive interface circuit is configured to achieve very low noise sensing of capacitance-based transducers, such as a micro-electro-mechanical system (MEMS)-based sensor, with high r... | 11/03/2011 |
| 20110261177 | SAMPLE AND HOLD CIRCUIT A sample and hold circuit includes a plurality of capacitors, a network of switches and a control circuit. The control circuit is operable to control the network of switches so as to sample an incoming signal onto at least some of the plurality of capacitors. In such an... | 10/27/2011 |
| 20110254716 | A/D CONVERTER DEVICE AND SIGNAL PROCESSING UNIT An A/D converter device is provided, which has a D/A conversion function and changes a resolution of A/D conversion and D/A conversion. The A/D converter device is configured to selectively execute an A/D conversion operation and a D/A conversion operation, by the opera... | 10/20/2011 |
| 20110254717 | AD CONVERTER Analog to digital conversion is performed by sampling an input voltage followed by AD conversion of the sampled voltage. In the sample and hold circuit a differential amplifier output voltage is generated between the first and second output of a differential amplifier i... | 10/20/2011 |
| 20110241918 | PIPELINE TYPE A/D CONVERTER There is provided a pipeline type A/D converter capable of expanding an input range and increasing the number of bits of digital output signals, without increasing thermal noises or an open loop gain needed for an operational amplifier. The number of sample-hold capacit... | 10/06/2011 |
| 20110241917 | Method And Apparatus For Signal Reconstruction From Saturated Measurements A method for recovering a signal by measuring the signal to produce a plurality of compressive sensing measurements, discarding saturated measurements from the plurality of compressive sensing measurements and reconstructing the signal from remaining measurements from t... | 10/06/2011 |
| 20110241916 | RE-CONFIGURABLE MULTIPURPOSE ANALOG INTERFACE Systems and apparatus are provided for interfacing a digital controller with an analog input means. The system comprises a digital controller with the input of the digital controller coupled to the output of the analog-to-digital converter. The system further comprises ... | 10/06/2011 |
| 20110234528 | SAMPLE AND HOLD CAPACITANCE TO DIGITAL CONVERTER A circuit for converting charge measured from a touch screen into a digital signal can include a sample and hold circuit. The sample and hold circuit can sample and integrate a charge from a capacitive sense matrix, and hold a voltage signal representing the measured ch... | 09/29/2011 |
| 20110199245 | MULTI-CHANNEL ANALOG DIGITAL CONVERSION CIRCUIT AND ANALOG DIGITAL CONVERSION METHOD THEREOF A multi-channel analog digital conversion circuit includes a plurality of sampling circuits for sampling and buffering a plurality of analog input signals, a single output circuit coupled to the sampling circuits and shared by the sampling circuits and a single analog d... | 08/18/2011 |
| 20110187569 | ALGORITHMIC ANALOG-TO-DIGITAL CONVERSION A 1.5-bit algorithmic analog-to-digital converter (ADC) generates a digital value representative of an input voltage. The ADC implements a series of conversion cycles for a conversion operation. Each conversion cycle has three sub-cycles: a scaling sub-cycle, a first sa... | 08/04/2011 |
| 20110163899 | SAMPLE AND HOLD CIRCUIT AND METHOD FOR CONTROLLING SAME A sample and hold circuit that is provided with an input stage amplifier circuit for amplifying an input signal and a hold circuit for holding an output signal of the input stage amplifier circuit, with a sampling clock signal as a trigger, is further provided with a ho... | 07/07/2011 |
| 20110140938 | SIGNAL GENERATING APPARATUS AND TEST APPARATUS Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that sa... | 06/16/2011 |
| 20110140939 | SAMPLE HOLD CIRCUIT AND METHOD FOR SAMPLING AND HOLDING SIGNAL A sample hold circuit and a method for sampling and holding a signal are provided. The sample hold circuit includes a sample unit, a direct current (DC) voltage elimination unit, and a hold unit. When the sample hold circuit is in a first state, the sample unit samples ... | 06/16/2011 |
| 20110133974 | SWITCHED-CAPACITOR INPUT CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME A switched-capacitor input circuit which receives an analog input signal, and samples and holds the analog input signal, comprising a differential amplifier, a first capacitor, one terminal of the first capacitor being connected to a non-inverting input terminal of the ... | 06/09/2011 |
| 20110128172 | LOW POWER CONVERT AND SHUTDOWN SAR ADC ARCHITECTURE With Successive Approximation Register (SAR) analog-to-digital converters (ADCs), there are several different architectures. One of these architectures is a “convert and shut down” architecture, where an internal amplifier is powered down during the sampling phase t... | 06/02/2011 |
| 20110122007 | SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THEREOF An analog-to-digital converter circuit includes: a plurality of sample-and-hold circuits configured to sample an analog signal; an analog-to-digital converter configured to convert the analog signal held by each of the plurality of sample-and-hold circuits into a digita... | 05/26/2011 |
| 20110102219 | SUCCESSIVE APPROXIMATION ANALOG/DIGITAL CONVERTER AND TIME-INTERLEAVED SUCCESSIVE APPROXIMATION ANALOG/DIGITAL CONVERTER A successive approximation analog/digital converter includes a sample & hold part sampling and holding an intensity of an analog input signal using a single clock cycle of a clock signal; a first comparator comparing the intensity of the analog input signal with com... | 05/05/2011 |
| 20110102218 | Dedicated Sample and Hold Modules A method and system for sampling values. Multiple values are sampled concurrently. One of the values is stored while another one of the values is converted to a corresponding digital value by an analog-to-digital converter (ADC). Subsequently, the stored value is made a... | 05/05/2011 |
| 20110102220 | PIPELINE ANALOG-TO-DIGITAL CONVERTER Provided is a pipeline analog-to-digital converter (ADC) without a front-end sample-and-hold amplifier (SHA). To minimize a sampling error occurring between a flash ADC and a multiplying digital-to-analog converter (MDAC) of a first sub-ranging ADC due to removal of a f... | 05/05/2011 |
| 20110090105 | Fast Readout Method and Switched Capacitor Array Circuitry for Waveform Digitizing A method relates to a technique for reducing the readout time of switched capacitor array circuitries. An implementation is a SCA chip capable of sampling 12 differential input channels at a sampling speed of 10 MSPS to 5 GSPS. The analog waveform can be stored in 1024 ... | 04/21/2011 |
| 20110084862 | Semiconductor Integrated Circuit Device A high-precision A/D conversion is realized while the number of external terminals used for an A/D converter is reduced. At the time of sampling, first to fifth switches are turned on and a sixth switch is turned off. Since a first resistor is set to a resistance value ... | 04/14/2011 |
| 20110080309 | BANDWIDTH MISMATCH ESTIMATION FOR TIME INTERLEAVED ADCS With high speed, high resolution time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches between the various ADC branches can pose a significant problem. Previously, though, no adequate solution has been found. Here, a method and apparatus are pr... | 04/07/2011 |
| 20110074612 | A/D converter and open detection method thereof An A/D converter includes a sampling capacitor that accumulates a charge according to an input voltage, a first initialization switch that initializes the sampling capacitor, a sample hold switch that switches a connection state of an external input terminal and the sam... | 03/31/2011 |
| 20110063151 | Systems, Circuits, and Methods for Pipelined Folding and Interpolating ADC Architecture A method and apparatus for performing pipelined capacitive folding and interpolation analog-to-digital conversion. In one embodiment, the apparatus comprises a multistage pipelined analog-to-digital converter having: a distributed sample/hold and preamp, folding and int... | 03/17/2011 |
| 20110063150 | METHOD FOR DETECTING AND CORRECTING PHASE SHIFT BETWEEN I DATA CLOCK AND Q DATA CLOCK IN QUADRATURE MODULATOR OR QUADRATURE DEMODULATOR A computer-implemented method, device, and program product for detecting a phase shift between an I data clock and a Q data clock in processing an I data signal or a Q data signal used in quadrature modulation or quadrature demodulation. The method includes: receiving a... | 03/17/2011 |
| 20110050469 | LINE OF PROPAGATION DIGITIZING DEVICE An electric signal digitizing device includes a line of propagation through which the signal travels and a plurality of samplers (141, . . . , 14N) connected at separate points on the line of propagation, such that each one samples th... | 03/03/2011 |
