Class 327/163 - By phase

Subclass of Class 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems
Definition: Subject matter wherein the reference source controls the
No. of applications: 27
Last issue date: 12/22/2011

Application No.	Application Title	Issue Date
20110309868	Data transfer unit, data transmission device, data receiving device, and control method A transmission LSI calculates a buffer usage rate in accordance with data stored in a buffer in a transmission data processing unit and determines, in accordance with the calculated buffer usage rate, the number of signal lines that perform a phase readjustment and the ...	12/22/2011
20110169540	CLOCK AND DATA RECOVERY FOR BURST-MODE SERIAL SIGNALS A clock and data recovery device recovers data from a sequential stream of data that includes bursts of data separated by gaps. Each burst of data arrives with its own phase and with its own deviation from a nominal frequency. The bursts of data begin with a preamble th...	07/14/2011
20110148492	TEST APPARATUS AND TEST METHOD Provided is a test apparatus comprising a synchronization module that operates according to a reference clock and outputs a synchronization signal with a prescribed period, and a test module that operates according to a high-frequency clock with a frequency that is n ti...	06/23/2011
20110074469	Frequency Generation Circuitry And Method A method includes generating a plurality of reference phases of a reference signal and selecting a sub-phase from each of the plurality of reference phases to form a set of selected sub-phases. In the method selecting operates in response to synchronized outputs of a mu...	03/31/2011
20110012656	SEMICONDUCTOR INTEGRATED CIRCUIT During a period of preparation for actual operation, a reference clock is supplied to both a comparison clock input portion and a feedback clock input portion of a phase comparator while a feedback loop of a PLL (phase-locked loop) is interrupted, and a delay of a reset...	01/20/2011
20100308880	LOW POWER CLOCK AND DATA RECOVERY PHASE INTERPOLATOR A phase interpolator is provided. The phase interpolator comprises a plurality of reference stages, the reference stages receiving a reference signal having a predetermined phase and outputting a component signal, wherein the reference stages comprise a plurality of cur...	12/09/2010
20100207674	METHOD FOR SYNCHRONIZING A PLURALITY OF MEASURING CHANNEL ASSEMBLIES AND/OR MEASURING DEVICES, AND APPROPRIATE MEASURING DEVICE A method and a measuring device for synchronizing measuring channel assemblies are provided. A reference signal is produced by a reference signal source. The reference signal is supplied to the individual measuring channel assemblies of the measuring device. A clock sig...	08/19/2010
20100177790	TIMING RECOVERY CIRCUIT, COMMUNICATION NODE, NETWORK SYSTEM, AND ELECTRONIC DEVICE A comparison period determiner (110) detects whether or not a change occurs in received data during a comparison period including a timing at which a rising edge of a reference clock occurs. A phase determiner (120) determines whether a rising edge of the ...	07/15/2010
20100066422	CLOCK TIMING CALIBRATION CIRCUIT AND CLOCK TIMING CALIBRATION METHOD FOR CALIBRATING PHASE DIFFERENCE BETWEEN DIFFERENT CLOCK SIGNALS AND RELATED ANALOG-TO-DIGITAL CONVERSION SYSTEM USING THE SAME A clock timing calibration circuit includes a clock timing adjusting unit and a calibration control unit. The clock timing adjusting unit is for receiving an incoming reference clock signal and selectively adjusting the received reference clock signal to generate a firs...	03/18/2010
20100066423	PHYSICAL QUANTITY DETECTION CIRCUIT AND PHYSICAL QUANTITY SENSOR DEVICE A physical quantity detection circuit (12) is used for a physical quantity sensor (10) that outputs a sensor signal according to a physical quantity given externally. A phase adjustment circuit (100) receives a reference clock (CKref) and operates i...	03/18/2010
20090243681	Embedded Source-Synchronous Clock Signals A synchronous communication system includes two transmitters that transmit respective first and second data signals that are phase offset from one another by about 90 degrees. On the receive side, a pair of extraction circuits extract a first clock signal from the first...	10/01/2009
20090231005	Phase Controllable Multichannel Signal Generator A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and ...	09/17/2009
20090213097	DISPLAY DRIVER AND BUILT-IN-PHASE-CALIBRATION CIRCUIT THEREOF A phase-calibration circuit including a pattern generator, a phase adjuster, a rotate register unit, a detector unit, and an optimization unit is disclosed. The pattern generator generates a clock pattern and a data pattern for a target circuit. The phase adjuster adjus...	08/27/2009
20090195281	Timing Signal Generating Circuit, Semiconductor Integrated Circuit Device and Semiconductor Integrated Circuit System to which the Timing Signal Generating Circuit is Applied, and Signal Transmission System A semiconductor integrated circuit device has a command decoder for issuing a control command in accordance with a supplied control signal, a DRAM core, and a timing adjusting circuit for supplying the control command, set active for a predetermined period, as a DRAM co...	08/06/2009
20090102528	SEMICONDUCTOR INTEGRATED CIRCUIT During a period of preparation for actual operation, a reference clock is supplied to both a comparison clock input portion and a feedback clock input portion of a phase comparator while a feedback loop of a PLL (phase-locked loop) is interrupted, and a delay of a reset...	04/23/2009
20090079486	SIGNAL GENERATOR WITH SIGNAL TRACKING Frequency and phase of an output signal is adjusted to track an input signal. A control signal is adjusted to control a frequency of an oscillating signal from which the output signal is derived. In some aspects the frequency of the oscillating signal is adjusted by rec...	03/26/2009
20090039933	SYSTEM AND METHOD System and method, including path sections, each path section including a supply line into which a medium-frequency current is able to be injected by an infeed assigned to the particular path section, each infeed encompassing a control circ...	02/12/2009
20080309375	High accuracy current mode duty cycle and phase placement sampling circuit A duty cycle and phase placement sampling circuit that can be used for high accuracy sampling and correcting the duty cycle and placement of differential clock signals is provided. The duty cycle and phase placement sampling circuit includes dual differential input stag...	12/18/2008
20080258785	Periodic signal synchronization apparatus, systems, and methods Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a phase difference between the output signal and the input signal, and to adjust a phase of the output signal b...	10/23/2008
20080180140	Method and system for synchronizing phase of triangular signal A multiplicity of electronic devices is provided to generate triangular wave signals variable between an upper and lower limit voltages by charging or discharging capacitors. One of the triangular wave signals serves as a master triangular wave signal for controlling th...	07/31/2008
20080157838	Delay locked loop and method for operating thereof A delay locked loop is disclosed which includes a clock selector for selecting and outputting any one of normal-phase and reverse-phase external clocks in response to a clock selection information signal, a first delay line for delaying an output signal from the clock s...	07/03/2008
20080122509	Circuitry and method for transferring data, and circuitry and method utilizing clock pulses A variable power supply voltage generator generates a variable power supply voltage Vvar and supplies it to other circuits. A transmitting circuit 130 (or 140), operative at the variable power supply voltage Vvar, generates multi-value analog signals Smult...	05/29/2008
20070296475	SEMICONDUCTOR INTEGRATED CIRCUIT A semiconductor integrated circuit including a first power supply region supplied with a first power supply voltage, and having a first clock distribution network, a second power supply region supplied with a second power supply voltage, and having a second clock distri...	12/27/2007
20070263460	DLL with reduced size and semiconductor memory device including DLL and locking operation method of the same A DLL with a reduced size, a semiconductor memory device including the DLL and a locking operation method of the DLL that includes a phase detector, a delay line, a delay controller, a delay circuit and an output buffer. The phase detector detects phase difference betwe...	11/15/2007
20070046349	Phase controllable multichannel signal generator A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second channels 20 and 22 have signal generation blocks 10 and ...	03/01/2007
20070018703	Jitter tolerance testing apparatus, systems, and methods Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a phase of the master clock. A data integrity test may be performed on a seria...	01/25/2007
20060290398	BIST to provide jitter data and associated methods of operation In an embodiment, a transmitter circuit is in an integrated circuit die with a test latch, and the test latch is enabled by a test clock signal to under-sample the transmit signal from the transmitter circuit. In a method of operation, a transmit signal is generated in ...	12/28/2006

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Class 327/163 - By phase