Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Application No. | Application Title | Issue Date |
| 20110101472 | STRUCTURE AND METHOD TO FORM A THERMALLY STABLE SILICIDE IN NARROW DIMENSION GATE STACKS An integrated circuit is provided including a narrow gate stack having a width less than or equal to 65 nm, including a silicide region comprising Pt segregated in a region of the silicide away from the top surface of the silicide and towards an lower portion defined by... | 05/05/2011 |
| 20110095381 | Gate structure and method for making same A MOS transistor having its gate successively comprising an insulating layer, a metal silicide layer, a layer of a conductive encapsulation material, and a polysilicon layer.... | 04/28/2011 |
| 20100193876 | METHOD TO REDUCE MOL DAMAGE ON NiSi Transistor devices are formed with nickel silicide layers formulated to prevent degradation upon removal of overlying stress liners. Embodiments include transistors with nickel silicide layers having a platinum composition gradient increasing in platinum content toward ... | 08/05/2010 |
| 20100176461 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed. A semiconductor device includes a semiconductor layer formed over an insulating substrate; a fi... | 07/15/2010 |
| 20100140674 | MOSFET WITH MULTIPLE FULLY SILICIDED GATE AND METHOD FOR MAKING THE SAME A field-effect transistor is provided. The field-effect transistor includes a gate structure including a fully silicided gate material overlying a gate dielectric disposed on a substrate, the fully silicided gate material having an upper region and a lower region, where... | 06/10/2010 |
| 20090315185 | SELECTIVE ELECTROLESS METAL DEPOSITION FOR DUAL SALICIDE PROCESS A method for forming dual salicide contacts includes depositing a low or mid-gap work function metal selectively on an NMOS source/drain (S/D) region of a semiconductor device via electroless deposition; depositing a high work function metal selectively over the low wor... | 12/24/2009 |
| 20080308873 | Semiconductor device with discontinuous CESL structure A semiconductor device using a CESL (contact etch stop layer) to induce strain in, for example, a CMOS transistor channel, and a method for fabricating such a device. A stress-producing CESL, tensile in an n-channel device and compressive in a p-channel device, is forme... | 12/18/2008 |
| 20080237743 | Integration Scheme for Dual Work Function Metal Gates A method for making PMOS and NMOS transistors 60, 70 on a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. The method includes an independent work function adjustment pr... | 10/02/2008 |
| 20080197498 | Gate Electrode Silicidation Process A fully-silicided gate electrode is formed from silicon and a metal by depositing at least two layers of silicon with the metal layer therebetween. One of the silicon layers may be amorphous silicon whereas the other silicon layer may be polycrystalline silicon. The sil... | 08/21/2008 |
| 20080164533 | Method of manufacturing a germanosilicide and a semiconductor device having the germanosilicide Example embodiments relate to a method of manufacturing a germanosilicide and a semiconductor device having the germanosilicide. A method according to example embodiments may include providing a substrate having at least a portion formed of silicon germanium. A metal la... | 07/10/2008 |
| 20080157218 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME, AND NOR GATE CIRCUIT USING THE SEMICONDUCTOR DEVICE A semiconductor device including a semiconductor substrate having source/drain regions, a gate electrode formed on and/or over the semiconductor substrate, spacers formed against sidewalls of the gate electrode, an interlayer insulating layer formed over the semiconduct... | 07/03/2008 |
| 20080009134 | Method for fabricating metal silicide A method for fabricating a metal silicide is described. First, a silicon material layer is provided. An alloy layer is formed on the silicon material layer, and the alloy layer is made from a first metal and a second metal, wherein, the first metal is a refractory metal... | 01/10/2008 |
| 20070037342 | Method to obtain fully silicided poly gate The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layer 610 over gate structures 230 located over a microelectronics substrate 210 wherein the gate structures 2... | 02/15/2007 |
| 20070032014 | METHODS OF FORMING PLURALITIES OF CAPACITORS The invention comprises methods of forming pluralities of capacitors. In one implementation, metal is formed over individual capacitor storage node locations on a substrate. A patterned masking layer is formed over the metal. The patterned masking layer comprises openin... | 02/08/2007 |
| 20070018203 | Strain inducing multi-layer cap A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface of the encapsulating layer with at least two layers including a layer of... | 01/25/2007 |
