Pizza Pie With Concentric Rings of Crust
A pizza mold for forming a plurality of concentric raised ridges of dough (i.e., crust) on the surface of a pizza pie.
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| Application No. | Application Title | Issue Date |
| 20120126301 | MEMORY DEVICES INCLUDING SEMICONDUCTOR PILLARS One embodiment relates to an integrated circuit that includes a memory array of pillars arranged in rows and columns. The pillars are separated from one another by row trenches and column trenches. The column trenches include a pair of parallel column trenches. A first ... | 05/24/2012 |
| 20120126300 | CAPACITORS, SEMICONDUCTOR DEVICES INCLUDING THE SAME AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES A capacitor includes a first electrode, a first dielectric layer disposed on the first electrode, the first dielectric layer having a tetragonal crystal structure and including a first metal oxide layer doped with a first impurity, a second dielectric layer disposed on ... | 05/24/2012 |
| 20120104481 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes a semiconductor substrate including a DRAM portion and a logic portion thereon, an interlayer film covering the DRAM portion and logic portion of the semiconductor substrate, and plural contact plugs formed in the interlayer film in the D... | 05/03/2012 |
| 20120104480 | STORAGE DEVICE A storage device in which stored data can be held even when power is not supplied, and stored data can be read at high speed without turning on a transistor included in a storage element is provided. In the storage device, a memory cell having a transistor including an ... | 05/03/2012 |
| 20120104550 | HIGH ASPECT RATIO CONTACTS A contact formed in accordance with a process for etching a insulating material to produce an opening having an aspect ratio of at least 15:1 by first exposing the insulating material to a second plasma of a second gaseous etchant comprising Ar, Xe, and combinations the... | 05/03/2012 |
| 20120104549 | MEMORY DEVICE AND FABRICATION THEREOF The invention is related to a memory device, including a substrate, a capacitor which is substantially C-shaped in a cross section parallel to the substrate surface and a word line coupling the capacitor. In an embodiment, the C-shaped capacitor is a stack capacitor. Bo... | 05/03/2012 |
| 20120080734 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a memory cell portion and a peripheral circuit portion. The memory cell portion includes a pillar capacitor with a lower electrode, a dielectric film, and an upper electrode sequentially formed on a side surface of a first insulati... | 04/05/2012 |
| 20120080735 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME In the semiconductor device composing MOS transistor on which impurities are added from the surface of a P-type substrate, the region of immediate below a gate layer is the P-type substrate on which the impurities are not added, and first and second MOS devices, having ... | 04/05/2012 |
| 20120068237 | SELF-ALIGNED STRAP FOR EMBEDDED CAPACITOR AND REPLACEMENT GATE DEVICES After forming a planarization dielectric layer in a replacement gate integration scheme, disposable gate structures are removed and a stack of a gate dielectric layer and a gate electrode layer is formed within recessed gate regions. Each gate electrode structure is the... | 03/22/2012 |
| 20120049257 | SEMICONDUCTOR DEVICE A DRAM device can include a plurality of capacitors that are arranged in a line in a first direction. Each of the capacitors can include an upper electrode. A contact pattern having a line shape can extend in the first direction and can be electrically connected to each... | 03/01/2012 |
| 20120049256 | SEMICONDUCTOR DEVICE HAVING LOW RESISTIVITY REGION UNDER ISOLATION LAYER A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are dispos... | 03/01/2012 |
| 20120043596 | SEMICONDUCTOR DEVICES AND STRUCTURES INCLUDING AT LEAST PARTIALLY FORMED CONTAINER CAPACITORS Semiconductor device structures include an at least partially formed container capacitor having a generally cylindrical first conductive member with at least one inner sidewall surface, a lattice material at least partially laterally surrounding an upper end portion of ... | 02/23/2012 |
| 20120037972 | SEMICONDUCTOR DEVICE It is an object to give excellent data retention characteristics to a semiconductor device in which stored data is judged in accordance with the potential of a gate of a specified transistor, by achieving both reduction in variation of the threshold voltage of the trans... | 02/16/2012 |
| 20120033487 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is pr... | 02/09/2012 |
| 20120033488 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a memory cell formed using a wide bandgap semiconductor, for example, an oxide semiconductor is provided. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference pot... | 02/09/2012 |
| 20120032162 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state cur... | 02/09/2012 |
| 20120032161 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state cur... | 02/09/2012 |
| 20120032242 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes: a diffusion layer configuring a memory cell, and a diffusion layer configuring a dummy cell formed over the semiconductor substrate, interlayer insulating films formed over the semiconductor substrate, a cylinder layer insulating film in... | 02/09/2012 |
| 20120025285 | SYSTEM WITH LOGIC AND EMBEDDED MIM CAPACITOR An embedded memory system includes an array of random access memory (RAM) cells, on the same substrate as an array of logic transistors. Each RAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a metal-insul... | 02/02/2012 |
| 20120025283 | MEMORY DEVICE In a semiconductor device having an enlarged contact area between a contact structure and a substrate, the substrate may include a first region on which a conductive structure is arranged and a second region defining the first region. The first region may include a mult... | 02/02/2012 |
| 20120025288 | SOI Trench DRAM Structure With Backside Strap In one exemplary embodiment, a semiconductor structure including: a silicon-on-insulator substrate having of a top silicon layer overlying an insulation layer, where the insulation layer overlies a bottom silicon layer; a capacitor disposed at least partially in the ins... | 02/02/2012 |
| 20120025296 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device and a method for manufacturing the same are disclosed. The method for manufacturing the semiconductor device comprises: forming a plurality of first pillar patterns each of which includes a sidewall contact by selectively etching a semiconductor s... | 02/02/2012 |
| 20120025347 | Method of forming a MIM capacitor An embedded memory system includes an array of dynamic random access memory (DRAM) cells, on the same substrate as an array of logic transistors. Each DRAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a m... | 02/02/2012 |
| 20120025287 | Memory Cell, An Array, And A Method for Manufacturing A Memory Cell A memory cell (100) comprising a transistor, the transistor comprising a substrate (101), a first source/drain region (102), a second source/drain region (112), a gate (104) and a gate insulating layer (103) positioned between t... | 02/02/2012 |
| 20120025284 | Semiconductor Device A semiconductor device includes a material with which off-state current of a transistor can be sufficiently small; for example, an oxide semiconductor material is used. Further, transistors of memory cells of the semiconductor device, which include an oxide semiconducto... | 02/02/2012 |
| 20120018789 | Systems and Devices Including Multi-Gate Transistors and Methods of Using, Making, and Operating the Same Disclosed are methods of forming transistors. In one embodiment, the transistors are formed by forming a plurality of elliptical bases in a substrate and forming fins form the elliptical bases. The transistors are formed within the fin such that they may be used as acce... | 01/26/2012 |
| 20120012913 | SEMICONDUCTOR DEVICE INCLUDING VERTICAL TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME A semiconductor device including a vertical transistor and a method for manufacturing the same may reduce a cell area in comparison with a conventional layout of 8F2 and 6F2. Also, the method does not require forming a bit line contact, a storage node contact or a landi... | 01/19/2012 |
| 20120012910 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME To prevent two contacts that have different heights, share at least one interlayer insulating film and are disposed close to each other from being short-circuited to each other due to misalignment thereof, a semiconductor device according to the invention has a recess i... | 01/19/2012 |
| 20120012911 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device comprises: a semiconductor substrate including a cell region and a peripheral region; an insulating film formed on the top portion of the semiconductor substrate of the cell region; a bit line contact hole including the etched insulating film to e... | 01/19/2012 |
| 20120012907 | Memory layout structure and memory structure A memory layout structure is disclosed, in which, a lengthwise direction of each active area and each row of active areas form an included angle not equal to zero and not equal to 90 degrees, bit lines and word lines cross over each other above the active areas, the bit... | 01/19/2012 |
| 20120012944 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME A semiconductor device includes a memory block including a transistor region and a memory region. A variable resistance layer of the memory region acts as a gate insulating layer in the transistor region.... | 01/19/2012 |
| 20120012914 | Semiconductor Constructions, and Methods of Forming Semiconductor Constructions The invention includes methods of utilizing compositions containing iridium and tantalum in semiconductor constructions, and includes semiconductor constructions comprising compositions containing iridium and tantalum. The compositions containing iridium and tantalum ca... | 01/19/2012 |
| 20120012912 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME A semiconductor device comprises: a semiconductor substrate including an active region defined as a device isolation film; a bit line hole disposed over the top portion of the semiconductor substrate; an oxide film disposed at sidewalls of the bit line hole; and a bit l... | 01/19/2012 |
| 20120012845 | SEMICONDUCTOR DEVICE A semiconductor device with a novel structure is provided, which can hold stored data even when no power is supplied and which has no limitations on the number of writing operations. A semiconductor device is formed using a material which enables off-state current of a ... | 01/19/2012 |
| 20120012969 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME In a method of forming a wiring structure for a semiconductor device, an insulation layer is formed on a semiconductor substrate on which a plurality of conductive structures is positioned. An upper surface of the insulation layer is planarized and spaces between the co... | 01/19/2012 |
| 20120007160 | Semiconductor devices including buried gate electrodes A semiconductor device capable of reducing a thickness, an electronic product employing the same, and a method of fabricating the same are provided. The method of fabricating a semiconductor device includes preparing a semiconductor substrate having first and second act... | 01/12/2012 |
| 20120001243 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on the number of write operations. The semiconductor device includes a first memory cell including a first transi... | 01/05/2012 |
| 20120001245 | Recessed Access Device for a Memory Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate ox... | 01/05/2012 |
| 20110298028 | HAFNIUM TANTALUM TITANIUM OXIDE FILMS Embodiments of a dielectric layer containing a hafnium tantalum titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric la... | 12/08/2011 |
| 20110299337 | METHODS AND APPARATUS FOR AN ISFET An ISFET includes a control gate coupled to a floating gate in a CMOS device. The control gate, for example, a poly-to-well capacitor, is configured to receive a bias voltage and effect movement of a trapped charge between the control gate and the floating gate. The thr... | 12/08/2011 |