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| Application No. | Application Title | Issue Date |
| 20120126394 | INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME An integrated circuit device includes a bottom wafer, at least one stacking wafer positioned on the bottom wafer, and at least one conductive via penetrating through the stacking wafer and into the bottom wafer in a substantially linear manner, wherein the bottom wafer ... | 05/24/2012 |
| 20120108076 | SHOWERHEAD FOR CVD DEPOSITIONS A CVD showerhead that includes a circular inner showerhead and at least one outer ring showerhead. At least two process gas delivery tubes are coupled to each showerhead. Also, a dual showerhead that includes a circular inner showerhead and at least one outer ring showe... | 05/03/2012 |
| 20120104388 | THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT AND TSV REPAIR METHOD THEREOF Provided is a 3D stacked semiconductor integrated circuit including a plurality of chips coupled through a plurality of TSVs. A first chip among the plurality of chips is configured to detect and repair a defective TSV among the plurality of TSVs, and transmit re... | 05/03/2012 |
| 20120108075 | Gas-Phase Functionalization of Surfaces of Microelectronic Structures There are provided methods for functionalizing a planar surface of a microelectronic structure, by exposing the surface to at least one vapor including at least one functionalization species, such as NO2 or CH3ONO, that non-covalently bonds to the ... | 05/03/2012 |
| 20120107962 | METHOD OF FABRICATING EPITAXIAL SEMICONDUCTOR DEVICES A method of fabricating epitaxial semiconductor devices includes: (a) forming an etch limiting film that includes a sacrificial layer on an epitaxial substrate; (b) growing epitaxially layers of a semiconductor structure on the sacrificial layer; (c) forming on the semi... | 05/03/2012 |
| 20120106585 | HIGH FILL-FACTOR EFFICIENT VERTICAL-CAVITY SURFACE EMITTING LASER ARRAYS An array of vertical-cavity surface emitting lasers (VCSELs) may be fabricated with very high fill-factors, thereby enabling very high output power densities during pulse, quasi-continuous wave (QCW), and continuous wave (CW) operation. This high fill-factor is achieved... | 05/03/2012 |
| 20120081274 | THIN FILM TRANSISTOR ARRAY PANEL, LIQUID CRYSTAL DISPLAY, AND METHOD TO REPAIR THE SAME The present invention relates to a thin film transistor array panel, a liquid crystal display, and a method capable of reducing an effect on neighboring pixels in a process of repairing a pixel defect. The thin film transistor array panel may include: a thin film transi... | 04/05/2012 |
| 20120083134 | METHOD OF MITIGATING SUBSTRATE DAMAGE DURING DEPOSITION PROCESSES Systems, methods, and apparatus for depositing a protective layer on a wafer substrate are disclosed. In one aspect, a protective layer is deposited over a surface of a wafer substrate using a process configured to produce substantially less damage in the wafer substrat... | 04/05/2012 |
| 20120083098 | Method for Manufacturing a Composite Wafer Having a Graphite Core, and Composite Wafer Having a Graphite Core According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.... | 04/05/2012 |
| 20120080690 | Method for Manufacturing a Composite Wafer Having a Graphite Core, and Composite Wafer Having a Graphite Core According to an embodiment, a composite wafer includes a carrier substrate having a graphite core and a monocrystalline semiconductor layer attached to the carrier substrate.... | 04/05/2012 |
| 20120070996 | POLAR REGIONS FOR ELECTROSTATIC DE-CHUCKING WITH LIFT PINS An apparatus for electrostatic chucking and dechucking of a semiconductor wafer includes an electrostatic chuck with a number of zones. Each zone includes one or more polar regions around a lift pin that contacts a bottom surface of the semiconductor wafer. The apparatu... | 03/22/2012 |
| 20120070913 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS A method of manufacturing a semiconductor device includes: carrying a substrate having an oxide film and a nitride film stacked thereon into a processing chamber; supporting and heating the substrate using a substrate support member provided in the processing chamber; a... | 03/22/2012 |
| 20120068311 | SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE A semiconductor substrate having a semiconductor device formable area, wherein a reinforcing part, which is thicker than the semiconductor device formable area and has a top part of which surface is flat, is formed on an outer circumference part of the semiconductor sub... | 03/22/2012 |
| 20120068194 | SILICON CARBIDE SEMICONDUCTOR DEVICES A method of manufacturing a semiconductor device, wherein the method comprises applying a first layer comprising silicon to a second layer comprising silicon carbide, wherein an interface is defined between the first and second layers; and oxidising sonic or all of the ... | 03/22/2012 |
| 20120070962 | Freestanding III-Nitride Single-Crystal Substrate and Method of Manufacturing Semiconductor Device Utilizing the Substrate Freestanding III-nitride single-crystal substrates whose average dislocation density is not greater than 5×105 cm−2 and that are fracture resistant, and a method of manufacturing semiconductor devices utilizing such freestanding III-nitride sing... | 03/22/2012 |
| 20120068188 | Defects Annealing and Impurities Activation in III-Nitride Compound Semiconductors A GaN sample in a sealed enclosure is heated very fast to a high temperature above the point where GaN is thermodynamically stable and is then cooled down very fast to a temperature where it is thermodynamically stable. The time of the GaN exposure to a high temperature... | 03/22/2012 |
| 20120049312 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND CAMERA MODULE According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded t... | 03/01/2012 |
| 20120045885 | METHOD FOR MAKING NANOWIRE ELEMENT A method for making a nanowire element includes: providing an imprint mold including a first substrate and a conductive pattern-transferring layer, the pattern-transferring layer includes first conductive strips; electrifying the pattern-transferring layer with an alter... | 02/23/2012 |
| 20120045902 | SHOWERHEAD ELECTRODES AND SHOWERHEAD ELECTRODE ASSEMBLIES HAVING LOW-PARTICLE PERFORMANCE FOR SEMICONDUCTOR MATERIAL PROCESSING APPARATUSES Showerhead electrodes for a semiconductor material processing apparatus are disclosed. An embodiment of the showerhead electrodes includes top and bottom electrodes bonded to each other. The top electrode includes one or more plenums. The bottom electrode includes a pla... | 02/23/2012 |
| 20120045884 | PROTECTIVE THIN FILMS FOR USE DURING FABRICATION OF SEMICONDUCTORS, MEMS, AND MICROSTRUCTURES A method of protecting a substrate during fabrication of semiconductor, MEMS devices. The method includes application of a protective thin film which typically has a thickness ranging from 3 angstroms to about 1,000 angstroms, wherein precursor materials used to deposit... | 02/23/2012 |
| 20120045897 | Wafer Electroless Plating System and Associated Methods A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone f... | 02/23/2012 |
| 20120038027 | METHOD FOR MOLECULAR ADHESION BONDING AT LOW PRESSURE The present invention relates to a method for molecular adhesion bonding between at least a first wafer and a second wafer involving aligning the first and second wafers, placing the first and second wafers in an environment having a first pressure (P1) greater t... | 02/16/2012 |
| 20120032206 | VARIABLE HEIGHT LIGHT EMITTING DIODE AND METHOD OF MANUFACTURE In general, embodiments of the present invention provide a variable height LED and method of manufacture. Specifically, under embodiments of the present invention, a buffer layer is applied (e.g., selectively) over a wafer, and a set of LED chips is provided over the bu... | 02/09/2012 |
| 20120032212 | METHOD OF LIGHT EMITTING DIODE SIDEWALL PASSIVATION A Light-Emitting Diode (LED) includes a light-emitting structure having a passivation layer disposed on vertical sidewalls across a first doped layer, an active layer, and a second doped layer that completely covers at least the sidewalls of the active layer. The passiv... | 02/09/2012 |
| 20120032182 | SOLID STATE LIGHTS WITH THERMAL CONTROL ELEMENTS A solid state light (“SSL”), a solid state emitter (“SSE”), and methods of manufacturing SSLs and SSEs. In one embodiment, an SSL comprises a packaging substrate having an electrical contact and a light emitting structure having a front side and a back side. The... | 02/09/2012 |
| 20120032307 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME In a CSP type semiconductor device, the invention prevents a second wiring from forming a narrowed portion on a lower surface of a step portion at the time of forming the second wiring that is connected to the back surface of a first wiring formed near a side surface po... | 02/09/2012 |
| 20120034437 | MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contac... | 02/09/2012 |
| 20120034759 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE A method of manufacturing a semiconductor device includes the steps of forming a plurality of first integrated circuits on the surface side of a first semiconductor substrate; forming a plurality of second integrated circuits in a semiconductor layer that is formed on a... | 02/09/2012 |
| 20120025337 | MEMS TRANSDUCER DEVICE HAVING STRESS MITIGATION STRUCTURE AND METHOD OF FABRICATING THE SAME A micro-electromechanical systems (MEMS) transducer device mounted to a package substrate includes an active transducer having a resonator stack formed over a cavity through a transducer substrate, and a stress mitigation structure between the transducer substrate and t... | 02/02/2012 |
| 20120019902 | INTERGRATED PUMP LASER AND RARE EARTH WAVEGUIDE AMPLIFIER A light amplifier includes a single crystal semiconductor substrate with a rare earth oxide, light amplifying gain medium deposited on the substrate and formed into a light waveguide, and a pump laser. A lattice matching virtual substrate integrates the pump laser to th... | 01/26/2012 |
| 20120021589 | METHOD OF FABRICATION OF A SEMICONDUCTOR DEVICE HAVING REDUCED PITCH Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region wh... | 01/26/2012 |
| 20120018852 | VIA STRUCTURE AND METHOD THEREOF A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. Th... | 01/26/2012 |
| 20120018832 | METHODS, STRUCTURES, AND DESIGN STRUCTURES FOR IMPROVED ADHESION OF PROTECTIVE LAYERS OF IMAGER MICROLENS STRUCTURES Methods, structures, and design structures for improved adhesion of protective layers of imager microlens structures are disclosed. A method of fabricating a semiconductor structure includes forming an interfacial region between a microlens and a protective oxide layer.... | 01/26/2012 |
| 20120018808 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device and a method for manufacturing a semiconductor device are provided. A semiconductor device comprises a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over a substrate having an insul... | 01/26/2012 |
| 20120018855 | METHOD OF PRODUCING A HETEROSTRUCTURE WITH LOCAL ADAPTATION OF THE THERMAL EXPANSION COEFFICIENT A method of producing a heterostructure by bonding at least one first substrate having a first thermal expansion coefficient onto a second substrate having a second thermal expansion coefficient, with the first thermal expansion coefficient being different from the seco... | 01/26/2012 |
| 20120015459 | Thermal Leveling for Semiconductor Devices A semiconductor device and a method of manufacturing are provided. In some embodiments, a backside annealing process such that a first heat source is placed along a backside of the substrate. In other embodiments, the first heat source is used in combination with an ant... | 01/19/2012 |
| 20120013012 | METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS Methods of forming bonded semiconductor structures include temporarily, directly bonding together semiconductor structures, thinning at least one of the semiconductor structures, and subsequently permanently bonding the thinned semiconductor structure to another semicon... | 01/19/2012 |
| 20120012957 | NEUTRON DETECTOR WITH WAFER-TO-WAFER BONDING A method of manufacturing a neutron detector comprises forming a first wafer by at least forming an oxide layer on a substrate, forming an active semiconductor layer on the oxide layer, and forming an interconnect layer on the active semiconductor layer, forming at leas... | 01/19/2012 |
| 20120013013 | TEMPORARY SEMICONDUCTOR STRUCTURE BONDING METHODS AND RELATED BONDED SEMICONDUCTOR STRUCTURES Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be p... | 01/19/2012 |
| 20120012900 | SEMICONDUCTOR BIO-SENSORS AND METHODS OF MANUFACTURING THE SAME A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first port... | 01/19/2012 |
