Class 257/E21.04 - Device having at least one potential-jump barrier or surface barrier, e.g., PN junction, depletion layer, carrier concentration layer (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.002. This subclass
No. of applications: 302
Last issue date: 05/03/2012

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Application No.	Application Title	Issue Date
20120104460	OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION Embodiments of the invention generally relate to optoelectronic semiconductor devices such as photovoltaic devices including solar cells. In one aspect, an optoelectronic semiconductor device includes an absorber layer made of gallium arsenide (GaAs) and having only one...	05/03/2012
20120068265	WIRING LAYER STRUCTURE AND PROCESS FOR MANUFACTURE THEREOF This wiring layer structure includes: an underlying substrate of a semiconductor substrate or a glass substrate; an oxygen-containing Cu layer or an oxygen-containing Cu alloy layer which is formed on the underlying substrate; an oxide layer containing at least one of A...	03/22/2012
20120068277	Semiconductor Manufacturing and Semiconductor Device with semiconductor structure Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted....	03/22/2012
20120070973	Methods of Forming Diodes Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along...	03/22/2012
20120043527	LIGHT EMITTING DEVICE According to embodiments of the present invention, a light emitting device is provided. The light emitting device includes: an active region comprising at least one p-i-n junction, the at least one p-i-n junction comprising a p-doped region, an intrinsic region and an n...	02/23/2012
20120032166	HETERO pn JUNCTION SEMICONDUCTOR AND PROCESS FOR PRODUCING THE SAME A hetero pn junction semiconductor constituted of an electrically conductive polymer as a p-type semiconductor and an inorganic oxide as an n-type semiconductor, which is characterized in that the electrically conductive polymer is filled among nanoparticles of the inor...	02/09/2012
20120018718	Self-aligned top-gate thin film transistors and method for fabricating same A self-aligned top-gate thin film transistor and a fabrication method thereof. The method includes preparing a substrate having sequentially formed thereon an oxide semiconductor layer, a dielectric layer, and a metallic layer, wherein the oxide semiconductor layer incl...	01/26/2012
20120009723	RANGE MODULATED IMPLANTS FOR IMAGE SENSORS Image sensors have photodiodes separated by isolations regions formed from p-well or n-well implants. Isolation regions may be formed that are narrow and deep. Isolation regions may be formed in a multi-step process that selectively places implants at desired depths in ...	01/12/2012
20120001270	MEMORY CELLS A method of manufacturing an integrated circuit (IC), comprising: defining a plurality of continuous active areas; forming conducting lines extending over the active areas; and using the conducting lines as a mask, introducing dopant into the active areas. Connections a...	01/05/2012
20110290294	DEVICE FOR CONVERTING ENERGY AND METHOD FOR MANUFACTURING THE DEVICE, AND ELECTRONIC APPARATUS WITH THE DEVICE The present invention provides an energy converting device, which includes: a base substrate; and a plurality of thermoelectric element structures which are sequentially stacked on the base substrate and electrically interconnected in parallel to one another....	12/01/2011
20110284048	MULTI-LAYER SUPERLATTICE QUANTUM WELL THERMOELECTRIC MATERIAL AND MODULE A multi-layer superlattice quantum well thermoelectric material comprising at least 10 alternating layers has a layer thickness of each less than 50 nm, the alternating layers being electrically conducting and barrier layers, wherein the layer structure shows no discern...	11/24/2011
20110277807	PHOTOELECTRIC CONVERSION MODULE A photoelectric conversion module including an electrolyte inlet allowing an electrolyte to be introduced to at least two neighboring photoelectric cells simultaneously, reducing the number of electrolyte inlets needed to fill photoelectric cells....	11/17/2011
20110256643	METHOD FOR DETACHING LAYERS WITH LOW MAGNETIC PERMEABILITY A method for detaching a first material layer from a second material layer includes following steps: forming a high-magnetic-permeability material layer on a first material layer comprised of low-magnetic-permeability material; removing a portion of the high-magnetic-pe...	10/20/2011
20110237012	METHOD FOR FABRICATING NOVEL HIGH-PERFORMANCE FIELD-EFFECT TRANSISTOR BIOSENSOR BASED ON CONDUCTIVE POLYMER NANOMATERIALS FUNCTIONALIZED WITH ANTI-VEGF ADAPTER Disclosed is a method for fabricating a high-performance field-effect transistor biosensor for diagnosing cancers using micro conductive polymer nanomaterials funtionalized with anti-VEGF aptamer. Disclosed is a high-sensitivity field-effect transistor biosensor for dia...	09/29/2011
20110227064	Thin film transistors, methods of manufacturing thin film transistors, and semiconductor device including thin film transistors Thin film transistors including a semiconductor channel disposed between a drain electrode and a source electrode; and a gate insulating layer disposed between the semiconductor channel and a gate electrode wherein the semiconductor channel includes a first metal oxide,...	09/22/2011
20110227046	OTFT and MIM Capacitor Using Silk Protein as Dielectric Material and Methods for Manufacturing the Same An organic thin film transistor (OTFT) and a metal-insulator-metal (MIM) capacitor using silk protein as a dielectric material, and methods for manufacturing the same are disclosed. The OTFT of the present invention comprises: a substrate; a gate electrode disposed on t...	09/22/2011
20110212626	SUBSTRATE PROCESSING APPARATUS AND SEMICONDUCTOR DEVICE PRODUCING METHOD Disclosed is a substrate processing apparatus, including: a processing chamber for processing a substrate; a substrate rotating mechanism for rotating the substrate; a gas supply unit for supplying gas to the substrate, at least two kinds of gases A and B being alternat...	09/01/2011
20110193194	THIN FILM MIM CAPACITORS AND MANUFACTURING METHOD THEREFOR Proposed are thin film MIM capacitors with which deterioration of insulating properties and leakage current properties can be sufficiently inhibited. Also proposed is a manufacturing method for the thin film MIM capacitors. For the thin film MIM capacitor (1), a ...	08/11/2011
20110186818	Doped graphene electronic materials A graphene substrate is doped with one or more functional groups to form an electronic device....	08/04/2011
20110186446	Method for Producing a Subminiature "Micro-Chip" Oxygen Sensor for Control of Internal Combustion Engines or Other Combustion Processes, Oxygen Sensor and an Exhaust Safety Switch A method of making a sub-miniature “micro-chip” oxygen sensor is provided where multiple sensor elements are applied to a dielectric ceramic substrate consisting of a heater pattern, followed by a dielectric layer. Intermeshing electrodes are then applied either ove...	08/04/2011
20110180783	BOUNDARY-MODULATED NANOPARTICLE JUNCTIONS AND A METHOD FOR MANUFACTURE THEREOF A method of providing miniaturized size down to nanoscale electronic materials, which may be easily incorporated into the future ever-scaling down power electronics, microelectronics and nanoelectronics device systems, is disclosed. A linear or nonlinear nanoparticle (n...	07/28/2011
20110171758	RECLAMATION OF SCRAP MATERIALS FOR LED MANUFACTURING A method for reclamation of scrap materials during the formation of Group III-V materials by metal-organic chemical vapor deposition (MOCVD) processes and/or hydride vapor phase epitaxial (HVPE) processes is provided. More specifically, embodiments described herein gene...	07/14/2011
20110156179	Silicon Microphone with Integrated Back Side Cavity An integrated circuit containing a capacitive microphone with a back side cavity located within the substrate of the integrated circuit. Access holes may be formed through a dielectric support layer at the surface of the substrate to provide access for etchants to the s...	06/30/2011
20110158439	Silicon Microphone Transducer A capacitive microphone transducer integrated into an integrated circuit includes a fixed plate and a membrane formed in or above an interconnect region of the integrated circuit. A process of forming an integrated circuit containing a capacitive microphone transducer i...	06/30/2011
20110159617	DUAL LAYER COLOR-CENTER PATTERNED LIGHT SOURCE A method of fabricating a color laser, comprising growing a first thin layer of ionic crystal on a substrate. The crystal can comprise many types of ionic crystals, such as sodium chloride or potassium chloride. A second thin layer of a different type of ionic crystal c...	06/30/2011
20110159616	METHOD OF MANUFACTURING LIGHT EMITTING DIODE A method for making a light emitting diode is provided, which includes first providing a light emitting diode chip. The light emitting diode chip includes a substrate and a p-type semiconductor layer, an active layer and an n-type semiconductor layer sequentially formed...	06/30/2011
20110151647	Semiconductor substrate, semiconductor device, and manufacturing methods thereof Exemplary embodiments of the present invention provide a method of fabricating a semiconductor substrate, the method including forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semico...	06/23/2011
20110150017	Relaxed InGaN/AlGaN Templates A relaxed InGaN template employs a GaN or InGaN nucleation layer grown at low temperatures on a conventional base layer (e.g., sapphire). The nucleation layer is typically very rough and multi-crystalline. A single-crystal InGaN buffer layer is then grown at normal temp...	06/23/2011
20110147880	POWER SEMICONDUCTOR DEVICE WITH NEW GUARD RING TERMINATION DESIGN AND METHOD FOR PRODUCING SAME A power semiconductor device, such as a power diode, and a method for producing such a device, are disclosed. The device includes a first layer of a first conductivity type, a second layer of a second conductivity type arranged in a central region on a first main side o...	06/23/2011
20110143523	Semiconductor integrated device and manufacturing method for the same A manufacturing method for a semiconductor integrated device including forming a second impurity layer of a second conductivity type that is higher in impurity concentration than a second well of the second conductivity type on a first impurity layer of a first conducti...	06/16/2011
20110139248	QUANTUM DOT SOLAR CELLS AND METHODS FOR MANUFACTURING SOLAR CELLS Solar cells, methods for manufacturing a quantum dot layer for a solar cell, and methods for manufacturing solar cells are disclosed. An example method for manufacturing a quantum dot layer for a solar cell includes providing an electron conductor layer, providing a qua...	06/16/2011
20110121283	METHOD FOR SELECTIVE DEPOSITION AND DEVICES A chemical vapor deposition method such as an atomic-layer-deposition method for forming a patterned thin film includes applying a deposition inhibitor material to a substrate. The deposition inhibitor material is a hydrophilic polymer that is a neutralized acid having ...	05/26/2011
20110121412	PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the per...	05/26/2011
20110124148	METHODS OF FORMING NANO STRUCTURE AND METHODS OF FORMING SOLAR CELL USING THE SAME Provided are methods of forming a nano structure and method of forming a solar cell using the same. The method of forming the nano structure includes: preparing a template; ionizing a surface of the template; forming an oxide layer enclosing the template on the surface ...	05/26/2011
20110121416	PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the per...	05/26/2011
20110121415	PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the per...	05/26/2011
20110108729	THz WAVE DETECTOR A THz wave detector including a thermal isolation structure in which a supporting unit containing electrode wirings connected to a readout circuit formed in an substrate supports a temperature detecting unit connected to the electrode wirings so that one face of said te...	05/12/2011
20110108944	Nitride semiconductor free-standing substrate, method of manufacturing the same and nitride semiconductor device A nitride semiconductor free-standing substrate includes a diameter of not less than 40 mm, a thickness of not less than 100 μm, a dislocation density of not more than 5×10⁶/cm², an impurity concentration of not more than 4×10¹⁹/cm	05/12/2011
20110108793	JUNCTIONS COMPRISING MOLECULAR BILAYERS FOR THE USE IN ELECTRONIC DEVICES The present invention relates to asymmetric molecular bilayers for the use in the junctions of electronic devices, such as crossbar junctions, comprising the general structure E_T-M_T( )M_B-E_B, wherein E_Tand E_{B <...}	05/12/2011
20110108899	FERROELECTRIC ORGANIC MEMORIES WITH ULTRA-LOW VOLTAGE OPERATION A method of manufacturing a patterned ferroelectric polymer memory medium is disclosed, which includes forming an electrode on a substrate; forming a ferroelectric polymer thin film on the electrode; and patterning and orienting the polymer thin film into a plurality of...	05/12/2011

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Class 257/E21.04 - Device having at least one potential-jump barrier or surface barrier, e.g., PN junction, depletion layer, carrier concentration layer (EPO)