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| Application No. | Application Title | Issue Date |
| 20120126404 | SEMICONDUCTOR DEVICE In a semiconductor device comprising a semiconductor chip, electrodes formed on the major surface of the semiconductor chip, and a wiring board for mounting the semiconductor chip, for example, wirings for electrically connecting the wirings of the wiring board to the e... | 05/24/2012 |
| 20120043672 | Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate A semiconductor device has a first substrate and first conductive pillars formed over the first substrate. Second conductive pillars are formed over the first substrate alternating with the first conductive pillars. The second conductive pillars are vertically offset wi... | 02/23/2012 |
| 20120032326 | AIR THROUGH-SILICON VIA STRUCTURE A silicon substrate has a conductive via extending from a first surface of the silicon substrate through the silicon substrate to a second surface of the silicon substrate. A dielectric via extends from the second surface of the silicon substrate toward the first surfac... | 02/09/2012 |
| 20120032347 | CHIP SCALE PACKAGE AND FABRICATION METHOD THEREOF A fabrication method of a chip scale package includes providing electronic components, each having an active surface with electrode pads and an opposite inactive surface, and a hard board with a soft layer disposed thereon; adhering the electronic components to the soft... | 02/09/2012 |
| 20120032328 | Package structure with underfilling material and packaging method thereof A method for packaging semiconductor device is provided, which comprises: providing a carrier substrate having a top surface and a back surface, a circuit arrangement on the top surface of the carrier substrate, and a through hole is disposed near the center of the carr... | 02/09/2012 |
| 20120032322 | FLIP CHIP PACKAGE UTILIZING TRACE BUMP TRACE INTERCONNECTION A flip chip package includes a substrate having a die attach surface; and a die mounted on the die attach surface with an active surface of the die facing the substrate, wherein the die is interconnected to the substrate via a plurality of copper pillar bumps on the act... | 02/09/2012 |
| 20120025400 | FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE, DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, AND FLIP CHIP TYPE SEMICONDUCTOR DEVICE The present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected onto an adherend, in which the film for flip chip type semiconductor back surface before thermal curing ha... | 02/02/2012 |
| 20120025399 | FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE, AND ITS USE The present invention relates to a film for flip chip type semiconductor back surface, which is to be disposed on the back surface of a semiconductor element to be flip chip-connected onto an adherend, the film containing a resin and a thermoconductive filler, in which ... | 02/02/2012 |
| 20120018902 | FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE, DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, AND FLIP CHIP TYPE SEMICONDUCTOR DEVICE The present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected to an adherend, the film for flip chip type semiconductor back surface containing an inorganic filler in a... | 01/26/2012 |
| 20120018901 | FLIP-CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME USING ABLATION A method of manufacturing a flip-chip package and a flip-chip package manufactured by such method. In one embodiment, the method includes: (1) mounting a die to a first die, (2) encapsulating the second die with a molding compound and (3) selectively ablating the moldin... | 01/26/2012 |
| 20120018903 | FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE, DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, AND FLIP CHIP TYPE SEMICONDUCTOR DEVICE The present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected onto an adherend, the film having a light transmittance at a wavelength of 532 nm or 1064 nm of 20% or les... | 01/26/2012 |
| 20120007259 | LATENT HARDENER WITH IMPROVED BARRIER PROPERTIES AND COMPATIBILITY A curing agent for epoxy resins that is comprised of the reaction product of an amine, an epoxy resin, and an elastomer-epoxy adduct; compositions containing the curing agent and an epoxy resin; the compositions are useful in electronic displays, circuit boards, semi co... | 01/12/2012 |
| 20120001324 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME In one embodiment, a semiconductor device includes a circuit substrate, and first and second semiconductor chips mounted on it. The first semiconductor chip and the second semiconductor chip are flip-chip connected, and an underfill resin is filled between them. The und... | 01/05/2012 |
| 20110316162 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRENCHES AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: providing a substrate with a material layer including grooves in a fillet region that are substantially parallel and adjacent an integrated circuit; and forming a resin between the substrate and... | 12/29/2011 |
| 20110316150 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE A semiconductor package includes a first board, a semiconductor chip having a first face and a second face at an opposite side to the first face, the semiconductor chip being mounted on the first board with the first face facing the first board, an insulating film provi... | 12/29/2011 |
| 20110316170 | Wiring Substrate, Semiconductor Device, and Method for Manufacturing Wiring Substrate A wiring substrate includes a wiring pattern in an uppermost layer that includes pads. A solder resist layer covers the wiring pattern. A recess exposes part of the wiring pattern from the solder resist layer to form pads. The solder resist layer includes a portion form... | 12/29/2011 |
| 20110304059 | CIRCUIT BOARD, CIRCUIT BOARD ASSEMBLY, AND SEMICONDUCTOR DEVICE A disclosed circuit board includes a substrate, a plurality of electrode pads formed on the substrate, and a groove formed between adjacent electrode pads on the substrate. Further, the electrode pads are surrounded by the groove to have an air space between the adjacen... | 12/15/2011 |
| 20110304058 | Semiconductor Device and Method of Forming Flipchip Interconnection Structure with Bump on Partial Pad A semiconductor device has a semiconductor die having a plurality of bumps formed over a surface of the semiconductor die. The bumps can include a fusible portion and non-fusible portion. Conductive traces are formed over the substrate with interconnect sites having an ... | 12/15/2011 |
| 20110298126 | CARRIER-FREE SEMICONDUCTOR PACKAGE AND FABRICATION METHOD A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a firs... | 12/08/2011 |
| 20110298139 | Semiconductor Package The present invention relates to a semiconductor package. The semiconductor package includes a substrate, a first chip and a second chip. The substrate has a first surface, a second surface and at least one through hole. The first chip is disposed adjacent to the first ... | 12/08/2011 |
| 20110291257 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit over a package carrier; pressing an encapsulation onto the package carrier and with the integrated circuit therein; mounting a conductive frame, having a vertical ... | 12/01/2011 |
| 20110291231 | METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND STRUCTURE A semiconductor component and methods for manufacturing the semiconductor component that includes a monolithically integrated common mode choke. In accordance with embodiments, a transient voltage suppression device may be coupled to the monolithically integrated common... | 12/01/2011 |
| 20110291298 | Chip Package Including Multiple Sections for Reducing Chip Package Interaction Thermally induced stress in a semiconductor die, i.e., in a complex metallization system thereof, may be reduced by “dividing” a package substrate into two or more substrate sections, which may have formed therebetween an appropriate stress buffer region, for instan... | 12/01/2011 |
| 20110291299 | Stress Reduction in Chip Packaging by a Stress Compensation Region Formed Around the Chip A stress compensation region that may be appropriately positioned on a package substrate may compensate for or at least significantly reduce the thermally induced mechanical stress in a sensitive metallization system of a semiconductor die, in particular during the crit... | 12/01/2011 |
| 20110285009 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: forming a first terminal; connecting an integrated circuit to the first terminal; forming a second terminal connected over the first terminal and the integrated circuit by a vertical conductive ... | 11/24/2011 |
| 20110285013 | Controlling Solder Bump Profiles by Increasing Heights of Solder Resists A device includes a first work piece bonded to a second work piece. The first work piece includes a solder resist at a surface of the first work piece, wherein the solder resist includes a solder resist opening, and a bond pad in the solder resist opening. The second wo... | 11/24/2011 |
| 20110278712 | Semiconductor Device and Method of Forming Perforated Opening in Bottom Substrate of Flipchip POP Assembly to Reduce Bleeding of Underfill Material A semiconductor device has a flipchip semiconductor die mounted to a first substrate using a plurality of first bumps. An opening or plurality of openings is formed in the first substrate in a location central to placement of the flipchip semiconductor die to the first ... | 11/17/2011 |
| 20110260338 | Semiconductor Device and Method of Forming Adjacent Channel and DAM Material Around Die Attach Area of Substrate to Control Outward Flow of Underfill Material A semiconductor device has a flipchip or PoP semiconductor die mounted to a die attach area interior to a substrate. The substrate has a contact pad area around the die attach area and flow control area between the die attach area and contact pad area. A first channel i... | 10/27/2011 |
| 20110254176 | DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE The present invention provides a dicing tape-integrated film for semiconductor back surface including: a dicing tape including a base material and a pressure-sensitive adhesive layer on the base material; and a film for flip chip type semiconductor back surface, which i... | 10/20/2011 |
| 20110254154 | ROUTING LAYER FOR MITIGATING STRESS IN A SEMICONDUCTOR DIE A routing layer for a semiconductor die is disclosed. The routing layer includes traces interconnecting integrated circuit bond-pads to UBMs. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces arranged underneath ... | 10/20/2011 |
| 20110254146 | Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of so... | 10/20/2011 |
| 20110241221 | SEMICONDUCTOR DEVICE WITH IMPROVED RESIN CONFIGURATION A semiconductor device comprises a wiring substrate including a wiring pattern; a semiconductor chip installed on the wiring substrate, including a plurality of pads formed on a surface of the semiconductor chip, which opposes the wiring substrate; a first resin layer c... | 10/06/2011 |
| 20110233792 | METHODS AND SYSTEMS FOR MATERIAL BONDING A device and a method for realizing reliable electrical contacts at low temperature and low pressure between conducting materials on, for example, different substrates are disclosed. In one aspect, a rough and brittle intermetallic layer is formed on a conducting materi... | 09/29/2011 |
| 20110221074 | Board on chip package A board on chip package including a photo solder resist having a cavity and a pattern on one side, the pattern corresponding to a circuit wire; a solder ball pad accommodated in the cavity; a circuit wire electrically connected with the solder ball pad, and formed on th... | 09/15/2011 |
| 20110215444 | PACKAGE SUBSTRATES, SEMICONDUCTOR PACKAGES HAVING THE SAME, AND METHODS OF FABRICATING THE SEMICONDUCTOR PACKAGES A package substrate, a semiconductor package having the same, and a method for fabricating the semiconductor package. The semiconductor package includes a semiconductor chip, a package substrate, and a molding layer. The package substrate provides a region mounted with ... | 09/08/2011 |
| 20110215472 | Through Silicon via Bridge Interconnect An integrated circuit bridge interconnect device includes a first die and a second die provided in a side-by-side configuration and electrically interconnected to each other by a bridge die. The bridge die includes through silicon vias (TSVs) to connect conductive inter... | 09/08/2011 |
| 20110193227 | Methods and Apparatus for Robust Flip Chip Interconnections Apparatus and methods for providing a robust solder connection in a flip chip arrangement using lead free solder are disclosed. A copper column extends from an input/output terminal of an integrated circuit. A cap layer of a material comprising one of nickel, nickel all... | 08/11/2011 |
| 20110193228 | MOLDED UNDERFILL FLIP CHIP PACKAGE PREVENTING WARPAGE AND VOID A molded underfill flip chip package may include a printed circuit board, a semiconductor chip mounted on the printed circuit board, and a sealant. The printed circuit board has at least one resin passage hole passing through the printed circuit board and at least one r... | 08/11/2011 |
| 20110193243 | Unique Package Structure A system in a package comprising a flip chip semiconductor die on a package substrate, a spacer on the package substrate, and a wire bond semiconductor die supported by the spacer and the flip chip semiconductor die.... | 08/11/2011 |
| 20110180938 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME In an electronic device, a silicone adhesive bonding first and second members is made from a composition comprising: (A) 100 parts by mass of an organopolysiloxane containing in one molecule at least two alkenyl groups and being free of silicon-bonded hydroxyl and alkox... | 07/28/2011 |
