Celebrity Inventors
Mark Twain (Samuel L. Clemens) received Patent No. 121,992 for "An Improvement in Adjustable and Detachable Straps for Garments." He later received two more patents: one for a self-pasting scrapbook and one for a game to help players remember important historical dates.
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| Application No. | Application Title | Issue Date |
| 20120126398 | INTEGRATED CIRCUIT PACKAGE AND PHYSICAL LAYER INTERFACE ARRANGEMENT An integrated circuit (IC) package includes an IC chip, a package carrier, and a plurality of conductive bumps connecting the IC chip to the package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. T... | 05/24/2012 |
| 20120126394 | INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME An integrated circuit device includes a bottom wafer, at least one stacking wafer positioned on the bottom wafer, and at least one conductive via penetrating through the stacking wafer and into the bottom wafer in a substantially linear manner, wherein the bottom wafer ... | 05/24/2012 |
| 20120126400 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME A semiconductor package may include a package substrate, a first semiconductor chip and a second semiconductor chip. The first semiconductor chip may be arranged on the package substrate. The first semiconductor chip may have a plug electrically connected to the package... | 05/24/2012 |
| 20120126403 | SEMICONDUCTOR DEVICE Signals outputted from an I/O buffer with a parallel drive configuration are stabilized for reliability enhancement. Each I/O cell has a complementary I/O cell that outputs one output signal as a complementary signal made up of a non-inverted signal and an inverted sign... | 05/24/2012 |
| 20120126395 | Semiconductor Device and Method of Forming Uniform Height Insulating Layer Over Interposer Frame as Standoff for Semiconductor Die A semiconductor device has an interposer frame having a die attach area. A uniform height insulating layer is formed over the interposer frame at corners of the die attach area. The insulating layer can be formed as rectangular or circular pillars at the corners of the ... | 05/24/2012 |
| 20120126396 | DIE DOWN DEVICE WITH THERMAL CONNECTOR Methods and apparatuses for a die down device with a thermal connector are provided. In an embodiment, an integrated circuit (IC) device includes an IC die having opposing first and second surfaces, a thermal connector coupled to the first surface of the IC die, and a s... | 05/24/2012 |
| 20120126404 | SEMICONDUCTOR DEVICE In a semiconductor device comprising a semiconductor chip, electrodes formed on the major surface of the semiconductor chip, and a wiring board for mounting the semiconductor chip, for example, wirings for electrically connecting the wirings of the wiring board to the e... | 05/24/2012 |
| 20120126401 | STACKABLE SEMICONDUCTOR ASSEMBLY WITH BUMP/BASE/FLANGE HEAT SPREADER AND ELECTROMAGNETIC SHIELDING A stackable semiconductor assembly includes a semiconductor device, a heat spreader, an adhesive, a terminal, a plated through-hole and build-up circuitry. The heat spreader includes a bump, a base and a flange. The bump defines a cavity. The semiconductor device is mou... | 05/24/2012 |
| 20120126399 | THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH BUMP/BASE/FLANGE HEAT SPREADER AND BUILD-UP CIRCUITRY A semiconductor assembly includes a semiconductor device, a heat spreader, an adhesive and a build-up circuitry. The heat spreader includes a bump, a base and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electricall... | 05/24/2012 |
| 20120126402 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME A semiconductor device includes a wiring board; a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chip comprising via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semi... | 05/24/2012 |
| 20120126397 | SEMICONDUCTOR SUBSTRATE AND METHOD THEREOF A semiconductor substrate includes a substrate having plurality of electrical contact pads formed thereon, a first insulating protective layer formed on the substrate that exposes the electrical contact pads, a plurality of metal layers formed on the exposed electrical ... | 05/24/2012 |
| 20120126405 | SOLDER INTERCONNECT PADS WITH CURRENT SPREADING LAYERS Structure and methods of making the structures. The structures include a structure, comprising: an organic dielectric passivation layer extending over a substrate; an electrically conductive current spreading pad on a top surface of the organic dielectric passivation la... | 05/24/2012 |
| 20120104599 | Semiconductor Package Having Semiconductor Die with Internal Vertical Interconnect Structure and Method Therefor A semiconductor wafer is made by forming a first conductive layer over a sacrificial substrate, mounting a semiconductor die to the sacrificial substrate, depositing an insulating layer over the semiconductor die and first conductive layer, exposing the first conductive... | 05/03/2012 |
| 20120104600 | STRUCTURE, SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE AND PACKAGING THEREOF A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a dielectric material formed between a design sensitive structure and a passivation layer. The design sensitive structure compris... | 05/03/2012 |
| 20120104603 | INTERCONNECT ASSEMBLIES AND METHODS OF MAKING AND USING SAME The various embodiments of the present invention provide fine pitch, chip-to-substrate interconnect assemblies, as well as methods of making and using the assemblies. The assemblies generally include a semiconductor having a die pad and a bump disposed thereon and a sub... | 05/03/2012 |
| 20120104596 | FLIP CHIP BUMP ARRAY WITH SUPERIOR SIGNAL PERFORMANCE An integrated circuit (342) that is electrically connected to a printed circuit board (246) with a package substrate (344) includes a circuit body (352), and a bump array (354) that electrically connects the circuit body (352) t... | 05/03/2012 |
| 20120104598 | PACKAGE STRUCTURE HAVING EMBEDDED SEMICONDUCTOR COMPONENT AND FABRICATION METHOD THEREOF A package structure having an embedded semiconductor component, includes: a chip having an active surface with electrode pads and an inactive surface opposite to the active surface; a first insulating protection layer having a chip mounting area for the chip to be mount... | 05/03/2012 |
| 20120104601 | Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Conductive THVs... | 05/03/2012 |
| 20120104595 | NO FLOW UNDERFILL A method for making a microelectronic assembly includes providing a microelectronic element with first conductive elements and a dielectric element with second conductive elements. At least some of either the first conductive elements or the second conductive elements m... | 05/03/2012 |
| 20120104594 | GROUNDED SEAL RING STRUCTURE IN SEMICONDUCTOR DEVICES A semiconductor device includes a substrate having a seal ring region and a circuit region, at least one corner bump disposed in the circuit region, a seal ring structure disposed in the seal ring region, and a connector electrically coupling a metal layer of the seal r... | 05/03/2012 |
| 20120104580 | SUBSTRATELESS POWER DEVICE PACKAGES A substrate-less composite power semiconductor device may include a thin substrate and a top metal layer located on a top surface of the substrate. A total thickness of the substrate and the epitaxial layer may be less than 25 microns. Solder bumps are formed on top of ... | 05/03/2012 |
| 20120106117 | ULTRA-THIN INTERPOSER ASSEMBLIES WITH THROUGH VIAS A 3D interconnect structure comprising an ultra-thin interposer having a plurality of ultra-high density of through-via interconnections defined therein. The 3D interposer electrically connects first and second electronic devices in vertical dimension and has the same o... | 05/03/2012 |
| 20120104597 | CHIP-ON-CHIP STRUCTURE AND MANUFACTURING METHOD THEROF According to an embodiment, a chip-on-chip structure includes a first chip, a second chip, the first chip and the second chip being opposite to each other, a first electrode terminal, a second electrode terminal, a bump and a protecting material. The first electrode ter... | 05/03/2012 |
| 20120104602 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND CIRCUIT DEVICE USING SEMICONDUCTOR DEVICE [Problem] A semiconductor device which achieves a fine pitch, a high throughput and a high connection reliability, especially in flip-chip mounting is provided. A method for manufacturing the semiconductor device and a circuit device using the semiconductor device are a... | 05/03/2012 |
| 20120080768 | SHEET-MOLDED CHIP-SCALE PACKAGE Embodiments include but are not limited to apparatuses and systems including a microelectronic device including a die having a first surface and a second surface opposite the first surface, a conductive pillar formed on the first surface of the die, and an encapsulant m... | 04/05/2012 |
| 20120080789 | SEMICONDUCTOR CHIP AND MOUNTING STRUCTURE OF THE SAME (as amended) Provided is a semiconductor chip having a narrowed pitch between terminals, the chip being capable of suppressing occurrence of poor connection between the chip and a substrate on which the chip is mounted. In an LSI chip including an input bump group, which is composed... | 04/05/2012 |
| 20120080788 | SEMICONDUCTOR DEVICE HAVING MULTILAYER WIRING STRUCTURE AND MANUFACTURING METHOD OF THE SAME Disclosed is a semiconductor device 1 comprising: a semiconductor chip 10; a multilayer wiring structure 30 stacked on the semiconductor chip 10; and an electronic component 60,80 embedded in the multilayer wiring structure 30. ... | 04/05/2012 |
| 20120080786 | ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME An electronic component including a wiring board having interlayer insulation layers and conductive patterns, the wiring board having a first surface and a second surface on the opposite side of the first surface, multiple first bumps formed on a first conductive patter... | 04/05/2012 |
| 20120080787 | Electronic Package and Method of Making an Electronic Package An electrical package and a method of forming the electrical package, where the electrical package has a substrate with a frontside, an intergrated circuit coupled to the frontside of the substrate, and at least one non-collapsible metal connector created on the frontsi... | 04/05/2012 |
| 20120068336 | Method for Fabricating a Neo-Layer Using Stud Bumped Bare Die A method for fabricating a stackable integrated circuit layer and a device made from the method are disclosed. A stud bump is defined on the contact pad of an integrated circuit die and the stud-bumped die encapsulated in a potting material to define a potted assembly. ... | 03/22/2012 |
| 20120068337 | Semiconductor Device and Method of Forming Composite Bump-on-Lead Interconnection A semiconductor device has a semiconductor die mounted to a substrate with a plurality of composite interconnects formed between interconnect sites on the substrate and bump pads on the die. The interconnect sites are part of traces formed on the substrate. The intercon... | 03/22/2012 |
| 20120068355 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device including two silicon wafers stacked and bonded together with bumps of one wafer electrically coupled with those of the other wafer, in which generation of voids on the junction surface between the silicon wafers is suppressed. Due to a recess mad... | 03/22/2012 |
| 20120068335 | PRINTED CIRCUIT BOARD HAVING HEXAGONALLY ALIGNED BUMP PADS FOR SUBSTRATE OF SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME Provided are a printed circuit board (PCB) having hexagonally aligned bump pads as a substrate of a semiconductor package, and a semiconductor package including the same. The PCB includes: a PCB body; a bottom metal layer at a bottom of the PCB body; and a top metal lay... | 03/22/2012 |
| 20120068333 | Wire Bond Through-Via Structure and Method A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electric... | 03/22/2012 |
| 20120068334 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Semiconductor devices of embodiments include a plurality of solder bumps electrically connected on a plurality of electrode pads disposed on a semiconductor substrate in parallel at a pitch of 40 μm or less via under bump metals. The ratio of the diameter (the top diam... | 03/22/2012 |
| 20120068332 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POST AND METHOD OF MANUFACTURE THEREOF A method of manufacture of an integrated circuit packaging system includes: providing a stack substrate with a component side; connecting an integrated circuit component to the component side; attaching a conductive post to the component side and adjacent the integrated... | 03/22/2012 |
| 20120049357 | Semiconductor Device and Method of Forming a Metallurgical Interconnection Between a Chip and a Substrate in a Flip Chip Package A method for forming metallurgical interconnections and polymer adhesion of a flip chip to a substrate includes providing a chip having a set of bumps formed on a bump side thereof and a substrate having a set of interconnect points on a metallization thereon, providing... | 03/01/2012 |
| 20120049348 | PACKAGE HAVING ELASTIC MEMBERS FOR VIAS, PACKAGE ON PACKAGE COMPRISING THE SAME, AND METHODS OF FABRICATING THE SAME A first semiconductor package includes a first substrate, a first semiconductor chip attached to the first substrate, an encapsulant which covers the first semiconductor chip, and conductive elastic members which are embedded in the encapsulant but with parts thereof ex... | 03/01/2012 |
| 20120049360 | Semiconductor Package And Method For Making The Same The present invention relates to a semiconductor package and a method for making the same. The semiconductor package includes at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip include... | 03/01/2012 |
| 20120049353 | LOW-COST 3D FACE-TO-FACE OUT ASSEMBLY An electronic device includes first and second electronic device dice. The first electronic device die is embedded within a resin layer. A dielectric layer is located over the device die and the resin layer. First interconnects within the dielectric layer connect a firs... | 03/01/2012 |
