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| Application No. | Application Title | Issue Date |
| 20120126299 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate; a gate insulating film formed above the semiconductor substrate; a charge storage layer formed above the gate insulating film; a multilayered interelectrode insulating film... | 05/24/2012 |
| 20120126308 | NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME A non-volatile memory device includes a plurality of memory cells stacked along a channel protruded from a substrate, a first select transistor connected to one end of the plurality of memory cells, a first interlayer dielectric layer for being coupled between a source ... | 05/24/2012 |
| 20120104483 | NON-VOLATILE MEMORY AND LOGIC CIRCUIT PROCESS INTEGRATION A method of making a logic transistor in a logic region of a substrate and a non-volatile memory cell in an NVM region of the substrate includes forming a gate dielectric layer on the substrate. A first polysilicon layer is formed on the gate dielectric. The first polys... | 05/03/2012 |
| 20120104485 | Nonvolatile Memory Devices And Methods Of Manufacturing The Same A method of manufacturing a nonvolatile memory device includes forming a tunnel dielectric layer, a charge storage layer, and a hard mask layer on a substrate in sequential order. Active portions are defined by forming trenches in the substrate. A tunnel dielectric patt... | 05/03/2012 |
| 20120104484 | NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF A nonvolatile memory device includes a substrate, a stacked structure with conductive materials and first insulating materials and the conductive materials and the first insulating materials are alternately stacked on the substrate, and a plurality of pillars in contact... | 05/03/2012 |
| 20120080739 | NONVOLATILE PROGRAMMABLE LOGIC SWITCH A nonvolatile programmable logic switch according to an embodiment includes: a memory cell transistor including: a first source region and a first drain region of a second conductivity type formed at a distance from each other in a first semiconductor region of a first ... | 04/05/2012 |
| 20120080740 | CHARGE TRAPPING DIELECTRIC STRUCTURES A dielectric structure may be arranged having a thin nitrided surface of an insulator with a charge blocking insulator over the nitrided surface. The insulator may be formed of a number of different insulating materials such as a metal oxide, a metal oxycarbide, a semic... | 04/05/2012 |
| 20120068254 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME According to one embodiment, a memory device includes a semiconductor substrate, first, second, third and fourth fin-type stacked layer structures, each having memory strings stacked in a first direction perpendicular to a surface of the semiconductor substrate, and eac... | 03/22/2012 |
| 20120068242 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME A semiconductor device includes horizontal patterns on a substrate and the horizontal patterns have at least one opening therein, a pad pattern in an upper region of the opening, an insulating gap fill structure in the opening, the insulating gap fill structure is betwe... | 03/22/2012 |
| 20120068245 | NON-VOLATILE MEMORY DEVICES INCLUDING BLOCKING INSULATION PATTERNS WITH SUB-LAYERS HAVING DIFFERENT ENERGY BAND GAPS A non-volatile memory device may include a semiconductor substrate and an isolation layer on the semiconductor substrate wherein the isolation layer defines an active region of the semiconductor substrate. A tunnel insulation layer may be provided on the active region o... | 03/22/2012 |
| 20120068253 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME According to one embodiment, a nonvolatile semiconductor memory device includes a memory region and a non-memory region. The memory region includes a stacked structural body, a semiconductor pillar, a memory layer, an inner insulating film and an outer insulating film. ... | 03/22/2012 |
| 20120068251 | SEMICONDUCTOR MEMORY DEVICE According to one embodiment, a semiconductor memory device includes a multilayer body, a block layer, a charge storage layer, a tunnel layer, and a semiconductor pillar. The multilayer body includes a plurality of insulating films and electrode films alternately stacked... | 03/22/2012 |
| 20120068256 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE An dielectric film is formed above the semiconductor substrate. A first conductive layer is formed in the dielectric film and extending in a first direction. The first conductive layer is connected to a first select transistor. A second conductive layer formed in the di... | 03/22/2012 |
| 20120068255 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES Three-dimensional (3D) nonvolatile memory devices include a substrate having a well region of second conductivity type (e.g., P-type) therein and a common source region of first conductivity type (e.g., N-type) on the well region. A recess is provided, which extends par... | 03/22/2012 |
| 20120068257 | SEMICONDUCTOR MEMORY DEVICE According to one embodiment, there is provided a semiconductor memory device including an element region, a first gate insulating film, a charge accumulation layer, a second gate insulating film, a control gate electrode, and a control gate electrode. The charge accumul... | 03/22/2012 |
| 20120068252 | SEMICONDUCTOR MEMORY DEVICE According to one embodiment, a semiconductor memory device includes a substrate, a multilayer body, a semiconductor member and a charge storage layer. The multilayer body is provided on the substrate, with a plurality of insulating films and electrode films alternately ... | 03/22/2012 |
| 20120051137 | Memory Architecture of 3D Array With Diode In Memory String A 3D memory device includes a plurality of ridge-shaped stacks, in the form of multiple strips of conductive material separated by insulating material, arranged as strings which can be coupled through decoding circuits to sense amplifiers. Diodes are connected to the bi... | 03/01/2012 |
| 20120049268 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure, charge storing patterns interposed between the semiconductor patterns and the electrode structure, and blocking i... | 03/01/2012 |
| 20120049267 | SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME A semiconductor device includes a pipe channel layer formed over a substrate, a first vertical channel layer formed over the pipe channel layer to couple the pipe channel layer to a bit line, a second vertical channel layer formed over the pipe channel layer to couple t... | 03/01/2012 |
| 20120049269 | ISOLATION STRUCTURE, NON-VOLATILE MEMORY HAVING THE SAME, AND METHOD OF FABRICATING THE SAME A method of forming an isolation structure, comprising: (a) providing a base having a recess; (b) forming a stop layer on the base and in the recess; (c) forming a dielectric material on the stop layer so as to allow the rest of the recess to be filled with the dielectr... | 03/01/2012 |
| 20120044760 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF A nonvolatile semiconductor memory device has a first select transistor having a gate electrode connected to a first select word line, a source connected to a first sub bit line, and a drain connected to a first main bit line, and a second select transistor having a gat... | 02/23/2012 |
| 20120043601 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME In a nonvolatile semiconductor memory device, a stacked body is formed by alternately stacking dielectric films and conductive films on a silicon substrate and a plurality of through holes extending in the stacking direction are formed in a matrix configuration. A shunt... | 02/23/2012 |
| 20120037978 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF A nonvolatile semiconductor memory device is provided in such a manner that a semiconductor layer is formed over a substrate, a charge accumulating layer is formed over the semiconductor layer with a first insulating layer interposed therebetween, and a gate electrode i... | 02/16/2012 |
| 20120037973 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE A memory cell includes a floating gate electrode, a first inter-electrode insulating film and a control gate electrode. A peripheral transistor includes a lower electrode, a second inter-electrode insulating film and an upper electrode. The lower electrode and the upper... | 02/16/2012 |
| 20120037977 | SEMICONDUCTOR DEVICES INCLUDING VERTICAL CHANNEL PATTERN An insulating pattern is disposed on a surface of a semiconductor substrate and includes a silicon oxynitride film. A conductive pattern is disposed on the insulating pattern. A data storage pattern and a vertical channel pattern are disposed within a channel hole forme... | 02/16/2012 |
| 20120032250 | SEMICONDUCTOR DEVICES A semiconductor device can include a first substrate and conductive patterns on the first substrate, where the conductive patterns are disposed in stacks vertically extending from the substrate. An active pillar can be on the first substrate vertically extend from the f... | 02/09/2012 |
| 20120032249 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE According to one embodiment, a nonvolatile semiconductor memory device includes a multilayer body, a semiconductor pillar, a memory layer, a first insulating film and a second insulating film. The multilayer body includes a plurality of interelectrode insulating films a... | 02/09/2012 |
| 20120032248 | NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT, NONVOLATILE SEMICONDUCTOR MEMORY, AND METHOD FOR OPERATING NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel reg... | 02/09/2012 |
| 20120032253 | NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME A nonvolatile semiconductor memory has a semiconductor substrate, a first insulating film formed on a channel region on a surface portion of the semiconductor substrate, a charge accumulating layer formed on the first insulating film, a second insulating film formed on ... | 02/09/2012 |
| 20120032252 | THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL Methods and devices are disclosed, such as those involving memory cell devices with improved charge retention characteristics. In one or more embodiments, a memory cell is provided having an active area defined by sidewalls of neighboring trenches. A layer of dielectric... | 02/09/2012 |
| 20120032251 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF First and second memory cells have first and second channels, first and second tunnel insulating films, first and second charge storage layers formed of an insulating film, first and second block insulating films, and first and second gate electrodes. A first select tra... | 02/09/2012 |
| 20120025296 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME A semiconductor device and a method for manufacturing the same are disclosed. The method for manufacturing the semiconductor device comprises: forming a plurality of first pillar patterns each of which includes a sidewall contact by selectively etching a semiconductor s... | 02/02/2012 |
| 20120025297 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME According to one embodiment, a nonvolatile semiconductor memory device includes a source region and a drain region provided on a surface area of a semiconductor region, a tunnel insulating film provided on a channel between the source region and the drain region, a char... | 02/02/2012 |
| 20120018794 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH INTRINSIC CHARGE TRAPPING LAYER A non-volatile semiconductor memory device includes a substrate, a first gate formed on a first region of a surface of the substrate, a second gate formed on a second region of the surface of the substrate, a charge storage layer filled between the first gate and the se... | 01/26/2012 |
| 20120018797 | NONVOLATILE MEMORY DEVICE, AND METHODS OF MANUFACTURING AND DRIVING THE SAME A nonvolatile memory device includes a device isolation film defining an active region in a semiconductor substrate, a pocket well region formed in an upper portion of the active region and having a first conductivity type, a gate electrode formed on the active region a... | 01/26/2012 |
| 20120018796 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME According to one embodiment, a nonvolatile semiconductor memory device includes first and second stacked structures, first and second semiconductor pillars, first and second memory units, and a semiconductor connection portion. The stacked structures include electrode f... | 01/26/2012 |
| 20120018792 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME A method of manufacturing a nonvolatile semiconductor memory device according to an embodiment, includes: forming a first insulating film on a semiconductor substrate; forming a charge trapping film on the first insulating film, the forming of the charge trapping film i... | 01/26/2012 |
| 20120018790 | NON-VOLATILE MEMORY AND FABRICATING METHOD THEREOF A non-volatile memory including a substrate, a stacked gate structure, two doped regions and a plurality of spacers is provided. The stacked gate structure is disposed on the substrate, wherein the stacked gate structure includes a first dielectric layer, a charge stora... | 01/26/2012 |
| 20120018795 | NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate ... | 01/26/2012 |
| 20120012920 | VERTICAL NON-VOLATILE MEMORY DEVICE A vertical non-volatile memory device includes a semiconductor pattern disposed on a substrate; and a plurality of transistors of first through n-th layers that are stacked on a side of the semiconductor pattern at predetermined distances from each other, wherein the tr... | 01/19/2012 |
