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| Application No. | Application Title | Issue Date |
| 20120126300 | CAPACITORS, SEMICONDUCTOR DEVICES INCLUDING THE SAME AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICES A capacitor includes a first electrode, a first dielectric layer disposed on the first electrode, the first dielectric layer having a tetragonal crystal structure and including a first metal oxide layer doped with a first impurity, a second dielectric layer disposed on ... | 05/24/2012 |
| 20120126299 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate; a gate insulating film formed above the semiconductor substrate; a charge storage layer formed above the gate insulating film; a multilayered interelectrode insulating film... | 05/24/2012 |
| 20120104480 | STORAGE DEVICE A storage device in which stored data can be held even when power is not supplied, and stored data can be read at high speed without turning on a transistor included in a storage element is provided. In the storage device, a memory cell having a transistor including an ... | 05/03/2012 |
| 20120104481 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes a semiconductor substrate including a DRAM portion and a logic portion thereon, an interlayer film covering the DRAM portion and logic portion of the semiconductor substrate, and plural contact plugs formed in the interlayer film in the D... | 05/03/2012 |
| 20120080734 | SEMICONDUCTOR MEMORY DEVICE A semiconductor memory device includes a memory cell portion and a peripheral circuit portion. The memory cell portion includes a pillar capacitor with a lower electrode, a dielectric film, and an upper electrode sequentially formed on a side surface of a first insulati... | 04/05/2012 |
| 20120080735 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME In the semiconductor device composing MOS transistor on which impurities are added from the surface of a P-type substrate, the region of immediate below a gate layer is the P-type substrate on which the impurities are not added, and first and second MOS devices, having ... | 04/05/2012 |
| 20120068238 | LOW IMPEDANCE TRANSMISSON LINE Transmission lines employing transmission line units or elements within integrated circuits (ICs) are well-known. Typically, different heights for these transmission line units can vary the characteristics of the cell (and transmission line), and there is typically a tr... | 03/22/2012 |
| 20120068237 | SELF-ALIGNED STRAP FOR EMBEDDED CAPACITOR AND REPLACEMENT GATE DEVICES After forming a planarization dielectric layer in a replacement gate integration scheme, disposable gate structures are removed and a stack of a gate dielectric layer and a gate electrode layer is formed within recessed gate regions. Each gate electrode structure is the... | 03/22/2012 |
| 20120068239 | SEMICONDUCTOR MEMORY DEVICE HAVING A FLOATING BODY CAPACITOR, MEMORY CELL ARRAY HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME A semiconductor memory device having a floating body capacitor. The semiconductor memory device can perform a memory operation using the floating body capacitor. The semiconductor memory device includes an SOI substrate having a staked structure in which a base substrat... | 03/22/2012 |
| 20120049255 | GATE STRUCTURE HAVING A BURIED GATE ELECTRODE, SEMICONDUCTOR DEVICE INCLUDING THE SAME A gate structure includes a gate insulation layer, a gate electrode and a capping layer pattern. The gate insulation layer is formed on an inner wall of a recess in a substrate. The gate electrode is formed on the gate insulation layer to partially fill the recess. The ... | 03/01/2012 |
| 20120051119 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device which includes a memory cell capable of holding accurate data even when the data is multilevel data. The semiconductor device includes a memory cell holding data in a node to which one of a source and a drain of a transisto... | 03/01/2012 |
| 20120049256 | SEMICONDUCTOR DEVICE HAVING LOW RESISTIVITY REGION UNDER ISOLATION LAYER A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are dispos... | 03/01/2012 |
| 20120049257 | SEMICONDUCTOR DEVICE A DRAM device can include a plurality of capacitors that are arranged in a line in a first direction. Each of the capacitors can include an upper electrode. A contact pattern having a line shape can extend in the first direction and can be electrically connected to each... | 03/01/2012 |
| 20120043597 | SEA-OF-FINS STRUCTURE ON A SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATION A semiconductor device and a method of fabricating a semiconductor device, wherein the method comprises forming, on a substrate, a plurality of planarized fin bodies to be used for customized fin field effect transistor (FinFET) device formation; forming a nitride space... | 02/23/2012 |
| 20120043595 | CAPACITOR DEVICE AND METHOD OF FABRICATING THE SAME A capacitor device includes a substrate including a first well having a first conductivity type and a first voltage applied thereto and a second well having a second conductivity type and a second voltage applied thereto; and a gate electrode disposed on an upper portio... | 02/23/2012 |
| 20120043596 | SEMICONDUCTOR DEVICES AND STRUCTURES INCLUDING AT LEAST PARTIALLY FORMED CONTAINER CAPACITORS Semiconductor device structures include an at least partially formed container capacitor having a generally cylindrical first conductive member with at least one inner sidewall surface, a lattice material at least partially laterally surrounding an upper end portion of ... | 02/23/2012 |
| 20120044028 | ADAPTIVE ON DIE DECOUPLING DEVICES AND METHODS Semiconductor dies and methods are described, such as those including a first capacitive pathway having a first effective series resistance (ESR) and a second capacitive pathway having an adjustable ESR. One such device provides for optimizing the semiconductor die for ... | 02/23/2012 |
| 20120037971 | NONVOLATILE MEMORY DEVICE AND METHOD OF FORMING THE SAME A nonvolatile memory device has a first active region and a second active region defined in a substrate by a device isolation layer, a Metal Oxide Silicon Field-Effect Transistor (MOSFET) disposed on the first active region and including a first electrode pattern, and a... | 02/16/2012 |
| 20120037970 | MICROELECTRONIC MEMORY DEVICES HAVING FLAT STOPPER LAYERS AND METHODS OF FABRICATING THE SAME Memory devices comprise a microelectronic substrate including a cell array region and a peripheral region adjacent the cell array region, the cell array region including therein an array of memory cells and the peripheral region including therein peripheral circuits for... | 02/16/2012 |
| 20120037969 | MONOLITHIC MICROWAVE INTEGRATED CIRCUIT Low Q associated with passive components of monolithic integrated circuits (ICs) when operated at microwave frequencies can be avoided or mitigated using high resistivity (e.g., ≧100 Ohm-cm) semiconductor substrates (60) and lower resistance inductors (44′... | 02/16/2012 |
| 20120033487 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is pr... | 02/09/2012 |
| 20120033488 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF A semiconductor device including a memory cell formed using a wide bandgap semiconductor, for example, an oxide semiconductor is provided. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference pot... | 02/09/2012 |
| 20120032242 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF A semiconductor device includes: a diffusion layer configuring a memory cell, and a diffusion layer configuring a dummy cell formed over the semiconductor substrate, interlayer insulating films formed over the semiconductor substrate, a cylinder layer insulating film in... | 02/09/2012 |
| 20120032162 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device which can hold stored data even when not powered and which achieves high integration by reduction of the number of wirings. The semiconductor device is formed using a material which can sufficiently reduce the off-state cur... | 02/09/2012 |
| 20120032279 | III-V METAL-OXIDE-SEMICONDUCTOR DEVICE A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can ... | 02/09/2012 |
| 20120025282 | Raised Source/Drain Field Effect Transistor In one exemplary embodiment of the invention, a semiconductor structure includes: a substrate; and a plurality of devices at least partially overlying the substrate, where the plurality of devices include a first device coupled to a second device via a first raised sour... | 02/02/2012 |
| 20120025286 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE A method of manufacturing a semiconductor device includes forming silicon pillar 11 on substrate 10, forming a protective film which covers an upper end portion and a lower end portion of a side surface of silicon pillar 11, forming a constricted po... | 02/02/2012 |
| 20120026793 | Nonvolatile Memory Cell With Extended Well One embodiment relates to a memory device. The memory device includes a capacitor having a first capacitor plate and a second capacitor plate, wherein the first and second capacitor plates are separated by an insulating layer and are formed over a first portion of a sem... | 02/02/2012 |
| 20120025285 | SYSTEM WITH LOGIC AND EMBEDDED MIM CAPACITOR An embedded memory system includes an array of random access memory (RAM) cells, on the same substrate as an array of logic transistors. Each RAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a metal-insul... | 02/02/2012 |
| 20120025283 | MEMORY DEVICE In a semiconductor device having an enlarged contact area between a contact structure and a substrate, the substrate may include a first region on which a conductive structure is arranged and a second region defining the first region. The first region may include a mult... | 02/02/2012 |
| 20120025284 | Semiconductor Device A semiconductor device includes a material with which off-state current of a transistor can be sufficiently small; for example, an oxide semiconductor material is used. Further, transistors of memory cells of the semiconductor device, which include an oxide semiconducto... | 02/02/2012 |
| 20120012910 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME To prevent two contacts that have different heights, share at least one interlayer insulating film and are disposed close to each other from being short-circuited to each other due to misalignment thereof, a semiconductor device according to the invention has a recess i... | 01/19/2012 |
| 20120012908 | SEMICONDUCTOR DEVICE The semiconductor device of the present invention includes a source electrode, a drain electrode, a gate electrode and a gate power feeding line. The gate electrode is disposed between said source electrode and said drain electrode. The gate power feeding line is connec... | 01/19/2012 |
| 20120012907 | Memory layout structure and memory structure A memory layout structure is disclosed, in which, a lengthwise direction of each active area and each row of active areas form an included angle not equal to zero and not equal to 90 degrees, bit lines and word lines cross over each other above the active areas, the bit... | 01/19/2012 |
| 20120012909 | SEMICONDUCTOR DEVICE INCLUDING MEMORY CELL HAVING CHARGE ACCUMULATION LAYER A semiconductor device includes MOS transistors, capacitor elements, a voltage generating circuit, a contact plug, and a memory cell. The MOS transistor and the capacitor element are formed on a first one of the element regions and a second one of the element regions, r... | 01/19/2012 |
| 20120007159 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME It is an object to provide a semiconductor device integrating various elements without using a semiconductor substrate, and a method of manufacturing the same. According to the present invention, a layer to be separated including an inductor, a capacitor, a resistor ele... | 01/12/2012 |
| 20120001243 | SEMICONDUCTOR DEVICE An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on the number of write operations. The semiconductor device includes a first memory cell including a first transi... | 01/05/2012 |
| 20120001244 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREFOR In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circui... | 01/05/2012 |
| 20110309420 | Capacitors Integrated with Metal Gate Formation A semiconductor structure including a capacitor having increased capacitance and improved electrical performance is provided. The semiconductor structure includes a substrate and a MIM capacitor over the substrate. The MIM capacitor includes a bottom plate, an insulatin... | 12/22/2011 |
| 20110309419 | PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A RESISTOR-CAPACITOR FILTER A process of forming an electronic device can include forming a capacitor dielectric layer over a base region, wherein the base region includes a base semiconductor material, forming a gate dielectric layer over a substrate, forming a capacitor electrode over the capaci... | 12/22/2011 |
