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Attorney: Yee; Yen S.


Number of patents: 21
Last date: June 30, 1992

NumberTitleIssue Date
5127011Per-pin integrated circuit test system having n-bit interface
Apparatus and method for controlling an operation of a test pin of a per-pin semiconductor device test system [10]. The apparatus includes pattern storage memory [42] for storing and for outputting information related to a state of the test pin for indivi...
06/30/1992
4914814Process of fabricating a circuit package
A low cost process for fabricating solder column interconnectons for an electronic package is described. The process includes the step of filling an array of pin holes in a pin mold with a lead/tin solder, which array of pin holes is in substantial regist...
04/10/1990
4830264Method of forming solder terminals for a pinless ceramic module
Disclosed is a method of forming solder terminals for a pinless module, preferably for a pinless metallized ceramic module. The method is comprised of the following steps: forming a substrate having a pattern of conductors formed onto its top surface and ...
05/16/1989
4817093Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
A self-contained method and structure for partitioning, testing and diagnosing a multi-chip packaging structure. The method comprises the steps of electronically inhibiting all chips in the multi-chip package except for the chip or chips under test, creat...
03/28/1989
4803595Interposer chip technique for making engineering changes between interconnected semiconductor chips
Engineering changes in the wiring between semiconductor device chips supported on the same substrate are made using minimum substrate real estate and without the use of engineering change pads or discrete wires by the use of easily modified chip interpose...
02/07/1989
4802062Integrated wiring system for VLSI
An integrated (silicon based) packaging/wiring structure provides for VLSI chips 4 to be placed within openings of somewhat larger size in a semiconductor interconnection wafer (IW, 2) supported by a carrier 1. The interconnection wafer 2 includes multile...
01/31/1989
4449580Vertical wall elevated pressure heat dissipation system
A heat dissipating system for cooling circuit chips or modules is described. The disclosed system includes circuit chips or modules which are vertically mounted, a gas at an elevated pressure being contained within an encased module for providing an enhan...
05/22/1984
4435838Method and apparatus for tomographical imaging
The specification concerns a method and apparatus for tomographically imaging different selected planes of a three-dimensional object by detecting radiation through a coded aperture mask, storing an image of the radiation detected over a period of time, a...
03/06/1984
4426237Volatile metal oxide suppression in molecular beam epitaxy systems
When growing GaAs by molecular beam epitaxy (MBE), a typical related reaction acts to affix Ga2 O3 to the growth surface and hence incorporates such oxide contaminants in the epitaxial layer as it is grown. Such contaminants may yiel...
01/17/1984
4413266Method and apparatus for erasing ink jet printing
The technology encompassed by the practice of this invention includes apparatus for ink jet printing under the control of electronic circuitry and ink jet printing under the control of an operator, for example, a typewriter. Broadly, the technology presen...
11/01/1983
4394673Rare earth silicide Schottky barriers
In the practice of this disclosure, rare earth disilicide low Schottky barriers (.ltorsim.0.4 eV) are used as low resistance contacts to n-Si. Further, high resistance contacts to p-Si (Schottky barrier of .gtorsim.0.7 eV) are also available by practice o...
07/19/1983
4393127Structure with a silicon body having through openings
A structure for shaping or masking energetic radiation is described. The structure comprises a shallow silicon body having at least one through opening, and a metal silicide layer covering the surface of the structure. The structure characterized by havin...
07/12/1983
4389768Self-aligned process for fabricating gallium arsenide metal-semiconductor field effect transistors
A method for the fabrication of a gallium arsenide (GaAs) metal-semiconductor field effect transistor (MESFET) is described. The method requires the step of providing a semi-insulating GaAs substrate having thereon a layer of n doped GaAs and another laye...
06/28/1983
4368538Spot focus flash X-ray source
A high intensity spot focus soft X-ray source is described. The source produces a spectrum in the range from about 5 A to 300 A, with maximum power in the neighborhood of tens of angstroms. The flash intensity of the flash source is in the neighborhood of...
01/11/1983
4357093Photoconductor tensioning device
A clamping device for securing a photoconductor in the form of a closed loop, flexible sleeve on a drum having a channel on the drum periphery, and with the channel running substantially parallel to the drum central axis, along the length of the drum, is ...
11/02/1982
4354198Zinc-sulphide capping layer for gallium-arsenide device
The disclosure provides for the use of a group II-VI compound semiconductor as a surface passivator to control recombination of charge carriers at the surface of a group III-V compound semiconductor by a localized heating step. It is theorized for practic...
10/12/1982
4353076Apparatus for controlling a recorder
A curve plotter or a display device for the recording of a curve section outside of a recording field is equipped with a logic circuit which shifts it into the recording field. Either the curve recording is continued after a margin of the recording field ...
10/05/1982
4348553Parallel pattern verifier with dynamic time warping
A speech recognition system is disclosed which employs a network of elementary local decision modules for matching an observed time-varying speech pattern against all possible time warpings of the stored prototype patterns. For each elementary speech segm...
09/07/1982
4342511Illumination system having an efficient light guide
An illumination system for a document scanner comprising a fluorescent lamp for illuminating a document to be scanned and an efficient light guide which "pipes" the light to the target document area. The fluorescent lamp has an aperture defined by an aper...
08/03/1982
4341942Method of bonding wires to passivated chip microcircuit conductors
A wire is positioned in intimate contact with a microcircuit chip above a conductor line or pad on the chip. The line is protected by a layer of passivating or insulating material deposited upon the chip. A short pulse, focussed, energy source such as a l...
07/27/1982
4319264Nickel-gold-nickel conductors for solid state devices
A laminated conductor includes a lower thin film of nickel deposited upon a substrate containing silicon. Upon the film of nickel, a thicker film of gold is deposited as the conductive portion of the conductor. On the upper surface of the gold layer is de...
03/09/1982
 
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