Quotables
"What, sir, would you make a ship sail against the wind and currents by lighting a bonfire under her deck? I pray you, excuse me, I have not the time to listen to such nonsense."
Napoleon Bonaparte ; When told of the Robert Fulton steamboat
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| Number | Title | Issue Date |
| 6490439 | Lighted antenna for transceiver device A transceiver device and method thereof for sending signals to and receiving signals from another device via a wireless connection and for providing information about the wireless connection to a user. An antenna coupled to the transceiver is visible to t... | 12/03/2002 |
| 6324178 | Method for efficient data transfers between domains of differing data formats A method for efficient data transfers between domains of differing data formats. In one exemplary implementation, data transfer is performed with respect to an IEEE 1394 communication domain and an Ethernet communication domain. The novel data transfer me... | 11/27/2001 |
| 6280257 | Cable dock fixture with EMI shielding The present invention is drawn to a system for attaching and supporting a cable to an IO panel of an electronic component such as the IO back panel of a computer. The system is comprised of a cable dock coupled to an IO panel, with a gasket disposed withi... | 08/28/2001 |
| 6104417 | Unified memory computer architecture with dynamic graphics memory allocation A computer system provides dynamic memory allocation for graphics. The computer system includes a memory controller, a unified system memory, and memory clients each having access to the system memory via the memory controller. Memory clients can include ... | 08/15/2000 |
| 6065010 | Computer implemented method of generating virtual files for sharing information of physical information file A computer implemented method for generating virtual files to provide more flexibility and efficiency in the sharing of data within a physical information file. In a computer system, a large physical file contains many separate data portions that need to ... | 05/16/2000 |
| 6038384 | Input slope timing analysis and non-linear delay table optimization The optimization process of the present invention replaces the successive delay table generation approach of the prior art with one that minimizes delay table size by generating only those indices sufficient to satisfy the error limits prescribed. This is... | 03/14/2000 |
| 6025097 | Method for creating a color filter layer on a field emission display screen structure A method for creating a color filter on a display screen that allows better and more efficient adhesion of color pigment crystals to the screen display structure. In one embodiment, the present invention creates a color filter on a glass substrate having ... | 02/15/2000 |
| 6023761 | Method and system for using decompression on compressed software stored in non-volatile memory of an embedded computer system to yield decompressed software including initialized variables for a runtime environment The present invention comprises a system for efficiently using non-volatile memory in an embedded system. The system of the present invention includes an embedded system having a processor, a volatile memory, and a non-volatile memory. A decompression alg... | 02/08/2000 |
| 5999437 | Processor-inclusive memory module A processor-inclusive memory module (PIMM) is disclosed. In one embodiment of the present invention, the PIMM includes a printed circuit board having first and second opposing surfaces. The printed circuit board also has an address line formed therein. A ... | 12/07/1999 |
| 5987584 | Wavetable address cache to reduce accesses over a PCI bus A method and apparatus for optimizing sample fetching in a peripheral component interconnect (PCI) environment. In one embodiment the present invention generates a sample page base address corresponding to a first part of a first address received from a d... | 11/16/1999 |
| 5976987 | In-situ corner rounding during oxide etch for improved plug fill A self-aligned contact etch and method for forming a self-aligned contact etch. In one embodiment, the present invention performs an oxide selective etch to form an opening originating at a top surface of a photoresist layer. The opening extends through a... | 11/02/1999 |
| 5973639 | Global positioning system having postprocessed realtime corrected data A method for determining an improved position fix by performing postprocessing on a realtime differentially corrected GPS position. A remote rover unit containing a GPS receiver is used to determine a differentially corrected position according to measure... | 10/26/1999 |
| 5969670 | Inexpensive monitoring technique for achieving high level integrity monitoring for differential GPS A dual global positioning system (GPS) receiver navigation system. The system of the present invention includes a primary GPS receiver adapted to determine a first position. The primary GPS receiver is certified to a first integrity level and is further a... | 10/19/1999 |
| 5963601 | Variable suppression of multipath signal effects Method and apparatus for formation of an autocorrelation difference function of an incoming digital signal that reduces the effects of presence of a multipath signal or of noise in an incoming digital composite signal. An incoming digital composite signal... | 10/05/1999 |
| 5963101 | VCO with local feedback for low power supply noise sensitivity The present invention comprises a voltage controlled oscillator (VCO) circuit having high power supply noise rejection. The circuit of the present invention includes an amplifier having positive, negative, and output terminals. A VCO input is coupled to t... | 10/05/1999 |
| 5958020 | Real time event determination in a universal serial bus system The system of the present invention comprises a system for implementing a real time capability in peripheral devices. The system of the present invention functions with a computer system including a processor, a memory, and a video controller, each couple... | 09/28/1999 |
| 5951635 | Asynchronous FIFO controller A FIFO controller circuit for interfacing data from a device running at one clock speed so that it is compatible with another device or transmission medium running at a different clock speed. A write controller is used to control the writing of data into ... | 09/14/1999 |
| 5950191 | Method and system for accessing an item in a linked list using an auxiliary array A linked list of items in a sorted order is created and stored in memory. In addition to the linked list of items, an auxiliary array is also created and stored in memory. The auxiliary array contains pointers to a subset of items from the linked list. Wh... | 09/07/1999 |
| 5949692 | Hierarchical scan architecture for design for test applications A system and method for architecting design for test circuitry (e.g., scan architecting) within an integrated circuit design having subdesigns (e.g., modules). The novel system contains a default operational mode (no user specification) and an operational... | 09/07/1999 |
| 5949689 | Path dependent power modeling A system and method for modeling the power consumed by a logic cell in a computer controlled power estimation process estimating the power consumed for an integrated circuit represented by logic cells and connections between cells. The present invention m... | 09/07/1999 |
| 5949251 | Register-based programmable post-silicon system to patch and dynamically modify the behavior of synchronous state machines The present invention allows the behavior of a state machine to be readily modified by software after it has been fabricated in silicon. To perform these modifications, the present invention uses special patch registers, multiplexers, and comparators to b... | 09/07/1999 |
| 5949764 | Conference call on a personal handy phone system portable station A system that enables a portable station of the personal handy phone system to support a conference call. The present invention provides this capability by empowering a portable station to communicate with up to four cell stations simultaneously enabling ... | 09/07/1999 |
| 5940501 | Counter based ringer interface The present invention comprises a ringer interface circuit for generating a ringer signal for controlling a telephone ringer. The circuit of the present invention includes a first frequency divider, a second frequency divider, and a third frequency divide... | 08/17/1999 |
| 5938785 | Automatically determining test patterns for a netlist having multiple clocks and sequential circuits A method and computer system for automatically determining test patterns for a netlist having multiple clocks and sequential circuits. The invention utilizes a static model of a sequential circuit and models the sequential circuit having multiple clock si... | 08/17/1999 |
| 5936476 | VCO in CMOS technology having an operating frequency of 3 GHz and greater A CMOS super high speed voltage controlled oscillator (VCO) circuit that operates at frequencies of at least 3 GHz. The VCO circuit of the present invention includes a replica circuit, a first VCO cell coupled to the replica circuit, and a second VCO cell... | 08/10/1999 |
| 5933358 | Method and system of performing voltage drop analysis for power supply networks of VLSI circuits A method for testing for power supply network voltage drop violations in an integrated circuit through a computer simulation. First, the IC chip area is divided into a number of discrete regions. The simulation time is divided into a number of time segmen... | 08/03/1999 |
| 5933593 | Method for writing modified data from a main memory of a computer back to a database In a client/server computer system, a method for writing modified data in a cache memory back to a database residing in a hard disk drive. Rather than writing back all of the modified data as part of a checkpointing operation, the present invention design... | 08/03/1999 |
| 5933650 | Alignment and ordering of vector elements for single instruction multiple data processing The present invention provides alignment and ordering of vector elements for SIMD processing. In the alignment of vector elements for SIMD processing, one vector is loaded from a memory unit into a first register and another vector is loaded from the memo... | 08/03/1999 |
| 5933020 | Parasitic resistance measuring device A device and method for determining parasitic resistances in a metal oxide silicon field effect transistor (MOSFET). In one embodiment of the present invention, respective total resistances between a plurality of pairs of varyingly spaced apart first cont... | 08/03/1999 |
| 5930499 | Method for mixed placement of structured and non-structured circuit elements The invention resides in a computer-aided design system for defining physical placement and floor-planning of electronic circuits on a given substrate. Improve utilization of substrate area is achieved by arranging circuits into structural (e.g., data-pat... | 07/27/1999 |
| 5928369 | Automatic support system and method based on user submitted stack trace A system and method for automatically analyzing a program system error. In one embodiment, the present invention electronically receives a stack trace of a program which has suffered an unknown system error. The present invention then compares the electro... | 07/27/1999 |
| 5926810 | Universal schema system A computer system and method for accessing an altered database architecture using existing code. The present invention transforms information which is stored in a new format in a database such that it appears to existing code to be stored in an old format... | 07/20/1999 |
| 5923703 | Variable suppression of multipath signal effects Method and apparatus for formation of an autocorrelation difference function of an incoming digital signal that reduces the effects of presence of a multipath signal or of noise in an incoming digital composite signal. An incoming digital composite signal... | 07/13/1999 |
| 5920731 | Single-housing electrical device self-configurable to connect to PCMCIA compliant or non-PCMCIA compliant host interfaces An apparatus and method which overcomes connectivity limitations on PCMCIA and PC-CARD95 compatible devices by reconfiguring standard PCMCIA and PC-CARD pins for additional electrical interfaces. A detection circuit in the PC-card can detect the different... | 07/06/1999 |
| 5917454 | Slotted ring shaped antenna An antenna for radiating toroidally is disclosed. The antenna may be fabricated to conform with any size of system. The antenna may be placed around an electronics package or a structure to radiate toroidally around the electronics package or structure. T... | 06/29/1999 |
| 5915103 | Method and system for an extensible on silicon bus supporting multiple functional blocks The present invention comprises a multiple functional block integrated circuit device for connecting to an external peripheral component interconnect (PCI) bus. The present invention includes an integrated circuit adapted to be coupled to an external PCI ... | 06/22/1999 |
| 5915083 | Smart debug interface circuit for efficiently for debugging a software application for a programmable digital processor device The present invention comprises a smart debug interface circuit for the diagnostic testing and debugging of a software application for a programmable digital processor system. The smart debug interface circuit of the present invention includes an instruct... | 06/22/1999 |
| 5915104 | High bandwidth PCI to packet switched router bridge having minimized memory latency In a computer system, a mechanism for minimizing memory latencies. An improved, high-speed packet switched router is used to route packets quickly and efficiently between the microprocessor and the main memory. The computer system also supports PCI device... | 06/22/1999 |
| 5912056 | Black matrix with conductive coating A method for forming a conductively coated matrix structure for separating rows and columns of sub-pixels on the faceplate of a flat panel display device. In one embodiment, the present invention deposits a photoresistive material over the interior surfac... | 06/15/1999 |
| 5913228 | Method and apparatus for caching discontiguous address spaces with short cache tags A method and apparatus for determining whether an address corresponds to a cacheable memory location within a discontiguously-arranged cacheable memory space. In one embodiment, the present invention includes the following steps: First the present inventi... | 06/15/1999 |
