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| Number | Title | Issue Date |
| 8183663 | Crack resistant circuit under pad structure and method of manufacturing the same A circuit under pad structure includes a substrate, a pad electrode, wiring layers interlayer insulation layers alternately disposed between the pad electrode and the substrate, and at least one circuit pattern integral with the substrate, disposed beneath the lower... | 05/22/2012 |
| 8183152 | Method of fabricating semiconductor device A method of fabricating a semiconductor device facilitates the forming of a conductive pattern of features having different widths. A conductive layer is formed on a substrate, and a mask layer is formed on the conductive layer. First spaced apart patterns are forme... | 05/22/2012 |
| 8182680 | Primary piston correction during transfer A method for controlling operation of a pump unit, where the pump unit includes a primary piston pump having a primary piston and a secondary piston pump having a secondary piston. The primary piston pump is fluidically connected with the secondary piston pump. The ... | 05/22/2012 |
| 8180988 | Method and system for authenticating storage device connected through intermediate converter A system provided for authenticating a storage device includes a computer system, an intermediate converter and a storage device. The computer system stores an application program to execute functions of a storage device. The intermediate converter connects the comp... | 05/15/2012 |
| 8179738 | Internal power supply control circuit of semiconductor memory An internal power supply control circuit of a semiconductor memory includes a periodic signal generating unit that generates a periodic signal to generate a permission signal to intermittently permit supply of power from an internal power supply circuit of the semic... | 05/15/2012 |
| 8179177 | Wideband delay-locked loop (DLL) circuit A wideband delay-locked loop (DLL) circuit includes an internal clock signal generating unit providing an internal control signal by selecting and interpolating between two clock delay signals during a primary phase locking operation. The internal clock signal may b... | 05/15/2012 |
| 8178904 | Gate array A gate array of a semiconductor substrate on which plural unit cells are arranged in parallel, the unit cells having the same pattern that includes a source potential region VDD, a PMOS, an NMOS and a ground potential region GND. Metal wiring lines being formed, wit... | 05/15/2012 |
| 8178442 | Method of forming patterns of semiconductor device A method in the fabrication of a semiconductor device simultaneously forms different patterns on the same level of the device. The device has a first area and a second area. A low density mask pattern of at least one relatively wide topographic feature is formed on ... | 05/15/2012 |
| 8178421 | Method of fabricating semiconductor device A method of manufacturing a semiconductor device capable of preventing a cut portion from becoming chipped when dicing. The method of manufacturing a semiconductor device includes preparing a semiconductor wafer having an upper surface (first surface) including a pl... | 05/15/2012 |
| 8174888 | Page-buffer and non-volatile semiconductor memory including page buffer In one aspect, a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of non-volatile memory cells, a plurality of word lines, and a plurality of bit... | 05/08/2012 |
| 8174878 | Nonvolatile memory, memory system, and method of driving Provided are a nonvolatile memory and related method of programming same. The nonvolatile memory includes a memory cell array with a plurality of nonvolatile memory cells and a write circuit. The write circuit is configured to write first logic state data to a first... | 05/08/2012 |
| 8174795 | Head slider, hard disk drive having the same, and method of controlling the height of the head slider A hard disk drive has a disk, a spindle motor for rotating the disk, a head stack assembly including a swing arm and a head slider disposed at a leading end of the swing arm, and a controller operatively connected to the head slider. The head slider is positioned by... | 05/08/2012 |
| 8173506 | Method of forming buried gate electrode utilizing formation of conformal gate oxide and gate electrode layers A method of forming a buried gate electrode prevents voids from being formed in a silicide layer of the gate electrode. The method begins by forming a trench in a semiconductor substrate, forming a conformal gate oxide layer on the semiconductor in which the trench ... | 05/08/2012 |
| 8171279 | Multi processor system having direct access boot and direct access boot method thereof A multiprocessor system having a direct access boot operation and a direct access boot method are provided to substantially reduce a boot error of processor that does not provide a memory link architecture in the multiprocessor system. In an embodiment of the invent... | 05/01/2012 |
| 8169725 | Hard disk drive and method for managing scratches on a disk of the hard disk drive A method for managing scratches on a disk of a hard disk drive is disclosed. By dividing the disk into a plurality of evaluation groups, testing each evaluation group for defects, calculating line equations based on the detected defects and determining whether the d... | 05/01/2012 |
| 8169268 | Oscillation circuit and semiconductor device having the same An oscillation circuit, and a semiconductor device incorporating same, include: an oscillation unit with a plurality of inverters and configured to perform signal transmission between first and second nodes of the inverters such that each of the inverters performs a... | 05/01/2012 |
| 8169259 | Active filter, delta-sigma modulator, and system An active filter includes a first filter and a second filter. The first filter receives an input signal, and generates a first output signal by filtering the input signal. The second filter receives the first output signal during a time period adjusted based on a va... | 05/01/2012 |
| 8169012 | Semiconductor device and method of fabricating the semiconductor device A semiconductor device and a method of fabricating a semiconductor device provide high quality cylindrical capacitors. The semiconductor device includes a substrate defining a cell region and a peripheral circuit region, a plurality of capacitors in the cell region,... | 05/01/2012 |
| 8168535 | Method fabricating semiconductor device using multiple polishing processes A method of fabricating a phase change memory device includes the use of first, second and third polishing processes. The first polishing process forms a first contact portion using a first sacrificial layer and the second polishing process forms a phase change mate... | 05/01/2012 |
| 8166230 | Memory systems and methods of initializing the same A memory system is provided includes a host processor, and a plurality of cascade connected memory cards connected to the host processor. Each of the memory cards stores a same default relative card address (RCA) prior to initialization of the memory system. The hos... | 04/24/2012 |
| 8164952 | Nonvolatile memory device and related method of programming A nonvolatile memory device comprises a memory cell array comprising a plurality of memory cells, a voltage generator configured to generate voltages to program the plurality of memory cells, and a control logic component configured to control the voltage generator ... | 04/24/2012 |
| 8164168 | Semiconductor package A semiconductor package including a semiconductor chip; a base member on which the semiconductor chip is mounted; a plurality of leads formed on the base member, the leads including inner ends electrically connected to the semiconductor chip and outer ends; and an i... | 04/24/2012 |
| 8164164 | Semiconductor wafer, and semiconductor device formed therefrom A semiconductor wafer has a substrate, and a plurality of active areas formed on the substrate. Integrated circuits are formed in the active areas. The semiconductor wafer also has dicing areas formed between the adjacent active areas. A seal ring is formed along th... | 04/24/2012 |
| 8164119 | Semiconductor device including conductive lines with fine line width and method of fabricating the same A semiconductor device comprises a semiconductor substrate including a first core region and a second core region between which a cell array region is interposed, a first conductive line and a second conductive line extending to the first core region across the cell... | 04/24/2012 |
| 8163639 | Photo diode and method for manufacturing the same A method of fabricating a photo diode includes sequentially forming a buried layer of a first conductivity type, a first epitaxial layer of the first conductivity type, and a second epitaxial layer of a second conductivity type on a semiconductor substrate; forming ... | 04/24/2012 |
| 8161349 | Data parallelizing receiver Provided is a data parallelizing receiver including an input signal receiver for externally receiving serial data as packets, sampling the serial data, aligning the sampled data in an input order, and converting the aligned data into parallel data to output the para... | 04/17/2012 |
| 8160610 | System and method for locating mobile device in wireless communication network A method is provided for determining a location of a mobile device in a wireless network. The method includes receiving global navigation satellite system (GNSS) measurements from the mobile device, and receiving terrestrial measurements from corresponding transceiv... | 04/17/2012 |
| 8159943 | Method of forming protocol data units, protocol data units and protocol data unit generation apparatus A source host comprising a processing resource that supports a kernel space and a user space. A socket layer is supported by the kernel space and allows a measurement application residing in the user space to instruct a protocol layer to form a plurality of UDP test... | 04/17/2012 |
| 8159867 | Phase change memory devices and systems, and related programming methods A phase change memory device performs a program operation by receiving program data to be programmed in selected memory cells, sensing read data already stored in the selected memory cells by detecting respective magnitudes of verify currents flowing through the sel... | 04/17/2012 |
| 8159853 | Memory module cutting off DM pad leakage current A memory module includes: an ODT circuit on a memory device and including pull-up and pull-down resistors connected between pull-up and pull-down transistors. A data masking (DM) pad is provided in a tap region of the module board. A current leakage monitoring unit ... | 04/17/2012 |
| 8159787 | Actuator latch system of hard disk drive including magnetically levitated latch lever An HDD includes a base, a swing arm, a VCM coil disposed on the rear end portion of the swing arm, a lower yoke and an upper yoke disposed below and above the VCM coil, at least one magnet attached to the yokes, and a latch lever levitated by the at least one magnet... | 04/17/2012 |
| 8156475 | Device and method for testing embedded software using emulator Embodiments of the invention provide a device and a method for automatically testing embedded software, and more specifically for testing interfaces between layers of the embedded software. In one embodiment, the device includes: an emulator; a server including embe... | 04/10/2012 |
| 8154929 | Flash memory device controlling common source line voltage, program-verify method, and memory system Disclosed is a flash memory device and a program-verify method. The flash memory device includes; a plurality of memory cells connected between a bit line and a common source line, and a data input/output circuit connected to the bit line and configured to store pro... | 04/10/2012 |
| 8154927 | Nonvolatile memory device and nonvolatile memory system employing same A nonvolatile memory device comprises a memory cell array, a row selection circuit and a voltage generator. The memory cell array comprises a first dummy memory cell, a second dummy memory cell, and a NAND string comprising a plurality of memory cells coupled in ser... | 04/10/2012 |
| 8154925 | Semiconductor memory device and system capable of executing an interleave programming for a plurality of memory chips and a 2-plane programming at the respective memory chips A semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic receives write data to be written into first and second memory blocks of... | 04/10/2012 |
| 8154924 | Nonvolatile memory device and read method Disclosed is a nonvolatile memory including a memory cell array including a first cell string connected between a first bit line and a first common source line, and a second cell string a second common source line and a second bit line adjacent to the first bit line... | 04/10/2012 |
| 8154819 | Method of controlling flying height of magnetic head and disk drive using the method The flying heights of magnetic heads of a disk drive are set using an FOD (flying on demand) method in a bank mode. A first signal for adjusting the flying height of a magnetic head is issued to each magnetic head and the value of the first signal is scaled by scale... | 04/10/2012 |
| 8154448 | Global positioning system (GPS) receiver and method of determining location of GPS receiver A Global Positioning System (GPS) receiver includes a GPS receiving unit configured to receive navigation data from at least one visible satellite, a decoder configured to decode the received navigation data to extract time and almanac information from the decoded n... | 04/10/2012 |
| 8154132 | Semiconductor device comprising internal and external wiring A semiconductor device of the invention include a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and th... | 04/10/2012 |
| 8151123 | Circuit and method for generating an internal power supply voltage A circuit and method for generating an internal power supply voltage are disclosed. The circuit includes an internal power supply voltage pre-processing unit configured to generate a first internal power supply voltage in response to an external power supply voltage... | 04/03/2012 |
