Did You Know...
...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 7317334 | Voltage translator circuit and semiconductor memory device A voltage translator circuit capable of operating at high speed, saving the power consumption, and forming to have a smaller circuit area. When the output level of a decoder 110 is changed from the potential GND to the potential VDD, a pMOS transistor 125 ... | 01/08/2008 |
| 6924176 | Method of manufacturing semiconductor device A conductive layer which is formed on an insulative layer on a semiconductor substrate is connected to the semiconductor substrate via a through portion which passes through the insulative layer and reaches the semiconductor substrate. In a state where the conductiv... | 08/02/2005 |
| 6909587 | Apparatus having a static eliminator for manufacturing semiconductor devices and a method for eliminating a static electricity on a semiconductor wafer An ion generator generates ions above a semiconductor wafer and the ions are directed towards a surface of a semiconductor wafer. The ions combine with static charges on the semiconductor wafer to thereby discharge the surface of the semiconductor wafer. ... | 06/21/2005 |
| 6903008 | Method for forming an interconnection in a semiconductor element There is disclosed a method for forming an interconnection in the semiconductor element, including a process for forming a groove 117 on an underlying substrate so as to correspond to the designed pattern, a process for forming an underlayer to improve crysta... | 06/07/2005 |
| 6893793 | Photosensitive polymer and chemically amplified photoresist composition containing the same The photosensitive polymer includes a first monomer which is norbornene ester having C1 to C12 aliphatic alcohol as a substituent, and a second monomer which is maleic anhydride. A chemically amplified photoresist composition, containing the ph... | 05/17/2005 |
| 6893336 | Polishing pad conditioner and chemical-mechanical polishing apparatus having the same A polishing pad conditioner for a chemical-mechanical polishing apparatus includes a conditioning plate having a first recess and a holder having a second recess. The first recess is formed on the upper face of the conditioning plate, and the second recess is formed... | 05/17/2005 |
| 6870353 | Power supply control circuit and LSI using the same A power supply control circuit includes a comparator which compares the supply voltage (VDDV) with a predetermined reference voltage (VREF) and supplies a comparison signal (CMP) when the supply voltage (VDDV) reaches the reference voltage (VREF); and a controller w... | 03/22/2005 |
| 6867141 | Method for fabricating semiconductor device and forming interlayer dielectric film using high-density plasma A method for fabricating a semiconductor device and forming an insulating film used therein, includes forming an isolation insulating film on a semiconductor wafer and forming gates, separated by gaps having a predetermined distance, on an active region. Next, a fir... | 03/15/2005 |
| 6859380 | Ferroelectric memory and method of operating same A ferroelectric memory reads data from a memory cell by using a sense amplifier to compare a reference potential with a potential produced on a bit line by the memory cell. The reference potential may generated by a pre-charge circuit connected to the sense amplifie... | 02/22/2005 |
| 6857090 | System and method for automatically analyzing and managing loss factors in test process of semiconductor integrated circuit devices A system and method automatically analyzes and manages loss factor data of test processes in which a great number of IC devices are tested as a lot with a number of testers. The lot contains a predetermined number of identical IC devices, and the lot test process is... | 02/15/2005 |
| 6855267 | Chemical mechanical polishing slurry A polishing slurry including an abrasive, deionized water, a pH controlling agent, and polyethylene imine, can control the removal rates of a silicon oxide layer and a silicon nitride layer which are simultaneously exposed during chemical mechanical polishing (CMP) ... | 02/15/2005 |
| 6849959 | Method of fabricating semiconductor device A method of fabricating a semiconductor device according to the invention comprises forming a capacitor comprising a lower electrode formed on a semiconductor substrate, a capacitive insulator made up of a metal oxide film, formed on the lower electrode, and an uppe... | 02/01/2005 |
| 6846757 | Dielectric layer for a semiconductor device and method of producing the same A semiconductor device includes a low dielectric constant insulating film exhibiting an Si—H Fourier Transform Infrared (FTIR) doublet defined by a first and a second peak, wherein the first peak is located at a higher wave number than the second peak, and wherein... | 01/25/2005 |
| 6844240 | Semiconductor device having trench isolation A structure having trench isolation which protects a nitride liner in the trench during subsequent plasma processing. The structure includes a trench formed in a semiconductor substrate, the trench having sidewalls and a bottom. A thermal oxide layer is formed on th... | 01/18/2005 |
| 6842285 | Method and apparatus for generating a phase-modulated wave front of electromagnetic radiation The present invention provides a method and a system for generating a phase-modulated wave front. According to the present invention, the spatial phase-modulation is not performed on the different parts of the wave front individually as in known POSLMs. Rather, the ... | 01/11/2005 |
| 6835615 | Method of manufacturing buried gate MOS semiconductor device having PIP capacitor A buried gate electrode of a buried MOS transistor formed within a trench in an active region wherein a gate oxide film and a gate electrode are buried in the trench, and a lower electrode of a PIP capacitor formed on a device isolation, are simultaneously formed by... | 12/28/2004 |
| 6833589 | Method for manufacturing field effect transistor A field oxide film for element isolation is formed on an SOI substrate having a silicon layer formed on an insulating layer, an active nitride film is wet-etched to reduce its film thickness to a value small enough to allow the edge of the silicon layer to become ex... | 12/21/2004 |
| 6828190 | Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant A method of manufacturing a capacitor includes sequentially forming a storage electrode, a high dielectric layer, a plate electrode, and an interdielectric layer over a semiconductor substrate. A first post-annealing of the substrate is performed under an inert atmo... | 12/07/2004 |
| 6825074 | Method of manufacturing a silicon-on-insulator (SOI) semiconductor device A silicon-on-insulator (SOI) substrate is provided which includes a silicon substrate having an upper surface, a first insulating layer having a lower surface extending horizontally over the upper surface of the silicon substrate, and a silicon layer having a lower ... | 11/30/2004 |
| 6818554 | Method for fabricating a semiconductor device having a metallic silicide layer A protective layer is formed on a metallic layer prior to forming a metallic silicide layer, and the protective layer has a thickness thicker than that of the metallic layer. ... | 11/16/2004 |
| 6818567 | Method for selectively oxidizing a silicon wafer The whole areas of both surfaces (10a and 10b) of a silicon wafer (10) are covered by silicon nitride films (13, 14) respectively through the intermediary of pad oxide films (11 and 12), and the pad oxide film ... | 11/16/2004 |
| 6815621 | Chip scale package, printed circuit board, and method of designing a printed circuit board A chip scale package has first and second sets of external signal terminals arranged in rows and columns at respective sides of the bottom surface of the package The spacing between the rows of the first set of signal terminals is greater than the spacing between th... | 11/09/2004 |
| 6816417 | Input/output buffer circuit An input/output buffer circuit is capable of suppressing an increase in current consumption of the whole system even in a low power consumption mode for bringing a clock to a halt. The input/output buffer circuit has an input/output terminal for performing the input... | 11/09/2004 |
| 6812577 | Semiconductor contact structure having wide lower portion embedded in conductive material The present invention provides a semiconductor contact structure and a method of forming the same. An interlayer dielectric is patterned to form a contact hole that exposes a predetermined region of conductive material on a semiconductor substrate. A recess is forme... | 11/02/2004 |
| 6809406 | COF tape carrier, semiconductor element, COF semiconductor device, and method for manufacturing of COF semiconductor device A COF tape carrier includes a resist formed on the COF tape carrier. The resist has portions that define a resist opening within the resist so that a semiconductor element is mounted on the COF tape carrier in alignment with the resist opening. The COF tape carrier ... | 10/26/2004 |
| 6806164 | Semiconductor apparatus and method for fabricating the same First, a substrate, on which a plurality of semiconductor devices is formed, is provided. Next, a first etching treatment is carried out to the substrate with a first etching gas comprising CF4 to form a base trench having a rounded-off upper edge or tape... | 10/19/2004 |
| 6806765 | Method and apparatus for checking the response of a transconductance- capacitance filter A transconductance-capacitance filter having a plurality of transconductors, that operates in a normal operation mode and a testing/tuning operation mode. During the normal operation mode, the transconductors operate as having normal transconductances. During the te... | 10/19/2004 |
| 6803288 | Method of manufacturing field effect transistor A method for manufacturing a field effect transistor (FET) which is capable of effectively inhibiting an expansion of a depletion layer between a source and a drain in the FET, without causing variations in electrical characteristics, at a comparatively low impurity... | 10/12/2004 |
| 6803969 | Video signal processing apparatus for digital video decoder A video signal processing apparatus which is provided for a digital video decoder and can automatically and properly adjust a fluctuation of the number of sampling data of digital composite video signals includes: an adjusting circuit which performs a partial adding... | 10/12/2004 |
| 6800528 | Method of fabricating LDMOS semiconductor devices In a method of fabricating an LDMOS semiconductor device, a combined layer including a gate oxide film and a first nitride film is formed on a substrate within a first region. A mask body is formed on the combined layer within a second region that is inside of the f... | 10/05/2004 |
| 6800923 | Multilayer analog interconnecting line layout for a mixed-signal integrated circuit A mixed-signal integrated circuit includes a metal-insulator-metal or polysilicon-insulator-polysilicon capacitor. The electrical path from one electrode of the capacitor passes through a first interconnecting line, then through multiple via holes to a second interc... | 10/05/2004 |
| 6796458 | Air supply apparatus for semiconductor device fabricating equipment An air supply apparatus includes a buffer tank for receiving and storing ultra-pure water from an ultra-pure source, a temperature/humidity controller (THC) for conditioning the air using the ultra-pure water from the buffer tank, an ultra-pure water pipe for delive... | 09/28/2004 |
| 6798709 | Memory device having dual power ports and memory system including the same A plurality of internal circuits of a memory device are operable at first and second internal voltages, where the first internal voltage is less than the second internal voltage. A first power port of the memory device receives a first power supply voltage, and a se... | 09/28/2004 |
| 6798077 | Semiconductor device with staggered octagonal electrodes and increased wiring width A semiconductor device having electrodes formed along a peripheral part thereof in a staggered arrangement of lines including inside-line, central-line and outside-line electrodes. The inside-line electrodes are octagonal shaped with hypotenuses on the central-line ... | 09/28/2004 |
| 6798022 | Semiconductor device with improved protection from electrostatic discharge A concentric polygonal metal-oxide-semiconductor field-effect transistor is designed to avoid overlap between corners of the central drain diffusion and inner corners of the surrounding annular gate electrode. For example, the gate electrode may be reduced to separa... | 09/28/2004 |
| 6797881 | Cross substrate, method of mounting semiconductor element, and semiconductor device A cross substrate and a method of mounting a semiconductor element are provided in which semiconductor elements can be mounted at a high density. Element side electrodes of a circuit forming surface of a semiconductor element and conductive filaments of a cross subs... | 09/28/2004 |
| 6797637 | Semiconductor device fabrication method During etching of a BARC film, etching gas is used in which O2, Cl2 and He are mixed in appropriate flow volume ratios, and an appropriate ion energy is set. Thus, a selectivity ratio with respect to an underlying film, which is a SiN film, can... | 09/28/2004 |
| 6797584 | Semiconductor device and method of fabricating the same First and second transistors are formed on the principal surface of the semiconductor substrate, and an insulating film is formed over the principal surface of the semiconductor substrate so as to cover the first and second transistors. A first storage node is conne... | 09/28/2004 |
| 6795911 | Computing device having instructions which access either a permanently fixed default memory bank or a memory bank specified by an immediately preceding bank selection instruction A computing device accesses multiple memory banks, which are selected by a bank selection instruction. The memory bank selected by the bank selection instruction is accessed by a memory access instruction immediately following the bank selection instruction. Followi... | 09/21/2004 |
| 6794891 | Semiconductor integrated circuit The control unit 21 takes in a test command and expected value data from input terminals 11 and 12 respectively, to output via an internal bus 30 the command to the function block 31 etc. and the expected value data to a decision u... | 09/21/2004 |
