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| Number | Title | Issue Date |
| 8169003 | Termination and contact structures for a high voltage GaN-based heterojunction transistor A semiconductor device is provided that includes a substrate, a first active layer disposed over the substrate, and a second active layer disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dim... | 05/01/2012 |
| 8164125 | Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit A semiconductor device includes an N type well region in a P type substrate. A source region of a MOSFET is laterally separated from a boundary of the well region, which includes the drain of the MOSFET. An insulated gate of the MOSFET extends laterally from the sou... | 04/24/2012 |
| 8144631 | Interconnecting IP video endpoints with reduced H.320 call setup time In one embodiment, a method includes sending, from an originating gateway device (OGW) to a terminating gateway device (TGW), a setup message for setting up a call on a primary bearer channel (B-channel) of an Integrated Services Digital Network (ISDN). The OGW inte... | 03/27/2012 |
| 8129815 | High-voltage transistor device with integrated resistor A high-voltage device structure comprises a resistor coupled to a tap transistor that includes a JFET in a configuration wherein a voltage provided at a terminal of the JFET is substantially proportional to an external voltage when the external voltage is less than ... | 03/06/2012 |
| 8125940 | Self-configuring, adaptive, three-dimensional, wireless network A network for wireless transmission of a media data in a building includes a plurality of access points. A first access point receives the media data from a source and transmits the media data downstream at a first data rate. A plurality of additional access points ... | 02/28/2012 |
| 8125265 | Temperature independent reference circuit A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors ha... | 02/28/2012 |
| 8116258 | Self-configuring, adaptive, three-dimensional, wireless network A network for wireless transmission of a media data in a building includes a plurality of access points. A first access point receives the media data from a source and transmits the media data downstream at a first data rate. A plurality of additional access points ... | 02/14/2012 |
| 8097512 | MOSFET having a JFET embedded as a body diode A field effect transistor, in accordance with one embodiment, includes a metal-oxide-semiconductor field effect transistor (MOSFET) having a junction field effect transistor (JFET) embedded as a body diode. ... | 01/17/2012 |
| 8094663 | System and method for authentication of SP ethernet aggregation networks A Service Provider (SP) authentication method includes receiving a message from a subscriber-premises device, the message being compatible with an authentication protocol and being transported from the subscriber-premises device to a u-PE device operating in complia... | 01/10/2012 |
| 8093621 | VTS insulated gate bipolar transistor In one embodiment, a power transistor device comprises a substrate that forms a PN junction with an overlying buffer layer. The power transistor device further includes a first region, a drift region that adjoins a top surface of the buffer layer, and a body region.... | 01/10/2012 |
| 8076723 | Method of fabricating a deep trench insulated gate bipolar transistor In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping concentration that is substantially constant in a vertical direction down to the... | 12/13/2011 |
| 8027459 | System and method for providing queue time credit for self-servicing callers A system and method for servicing a caller at a contact center includes providing self-service menu options to the caller through an automated system, and determining a total time spent by the caller in the automated system. If the caller's attempts at self-service ... | 09/27/2011 |
| 8022456 | Checkerboarded high-voltage vertical transistor layout In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjace... | 09/20/2011 |
| 8014322 | Diagnostic tool for troubleshooting multimedia streaming applications In one embodiment, a method includes correlating, for each intermediate device associated with a Real-time Transport Protocol (RTP) application that connects endpoints through a plurality of intermediate devices across a network, one or more first RTP segments input... | 09/06/2011 |
| 7999606 | Temperature independent reference circuit A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors ha... | 08/16/2011 |
| 7998817 | Method of fabricating a high-voltage transistor with an extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls; then partially fil... | 08/16/2011 |
| 7975180 | Method and apparatus for fault detection/isolation in metro ethernet service Apparatus and method of detecting a fault in a network service includes an Ethernet access network domain in which a heartbeat message is broadcast at a periodic interval by each of a plurality of edge devices associated with an instance of the network service. Each... | 07/05/2011 |
| 7964912 | High-voltage vertical transistor with a varied width silicon pillar In one embodiment, a vertical HVFET includes a pillar of semiconductor material a pillar of semiconductor material arranged in a loop layout having at least two substantially parallel and substantially linear fillet sections each having a first width, and at least t... | 06/21/2011 |
| 7957520 | System and method for responding to an emergency at a call center A system and method for servicing a caller at a contact center includes a plurality of call centers, each including an automatic call distributor (ACD), and an emergency response system that issues an emergency notification signal to the ACD of a call center in resp... | 06/07/2011 |
| 7940913 | System and method for improved contact center services to disabled callers A system and method for servicing a caller at a contact center includes prompting the caller for a password associated with a certificate of disability of the caller, then accessing a database that contains the certificate authenticating the password to retrieve inf... | 05/10/2011 |
| 7939853 | Termination and contact structures for a high voltage GaN-based heterojunction transistor A semiconductor device is provided that includes a substrate, a first active layer disposed over the substrate, and a second active layer disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dim... | 05/10/2011 |
| 7916653 | Measurement of round-trip delay over a network In one embodiment, a first audio waveform is produced at a first side of a network connection and then encoded and sent by a first endpoint device to a second endpoint device at a second side of the network connection. A second audio waveform is then detected after ... | 03/29/2011 |
| 7911983 | Selective mute/unmute control over applications running on a PC A computer includes a sound card and a processor that runs one or more applications that cause the processor to generate audio signals coupled to the sound card. The processor is operable to execute code that provides a graphical user interface which allows a user t... | 03/22/2011 |
| 7903548 | BFD rate-limiting and automatic session activation A system and method for bidirectional forwarding detection (BFD) rate-limiting and automatic BFD session activation includes tracking a total bidirectional forwarding detection (BFD) packet rate for a line card (LC) of the node, and rejecting operations associated w... | 03/08/2011 |
| 7899161 | Voicemail messaging with dynamic content In one embodiment, a voicemail messaging system provides a user with the ability to record a voicemail message that includes at least one static portion and a dynamic content portion. When the voicemail message is accessed for listening by a recipient the dynamic co... | 03/01/2011 |
| 7889754 | Address resolution mechanism for ethernet maintenance endpoints A method of operation for a node of an Ethernet access network includes issuing a multicast message on the Ethernet access network by a maintenance end point (MEP) of the node. The multicast message contains a name of a target MEP. The node is further operable to re... | 02/15/2011 |
| 7849491 | Apparatus and method for wireless video gaming Apparatus for video gaming includes a box having a slot with an interface that connects to a game card providing a platform to run a software video game. The game card outputs video game data through the interface at a data rate of approximately 200 Mbps or greater.... | 12/07/2010 |
| 7847815 | Interaction based on facial recognition of conference participants In one embodiment, a method includes capturing a facial image of a participant to a video conference session from a video stream of the video conference session. A database containing a plurality a stored facial images is then accessed in an attempt to match the fac... | 12/07/2010 |
| 7875962 | Package for a power semiconductor device A package for a semiconductor die includes a die attach pad that provides an attachment surface area for the semiconductor die, and tie bars connected to the die attach pad. The die attach pad is disposed in a first general plane and the tie bars are disposed in a s... | 01/25/2011 |
| 7871882 | Method of fabricating a deep trench insulated gate bipolar transistor In one embodiment, a method comprises forming an epitaxial layer over a substrate of an opposite conductivity type, the epitaxial layer being separated by a buffer layer having a doping concentration that is substantially constant in a vertical direction down to the... | 01/18/2011 |
| 7870590 | System and method for fast start-up of live multicast streams transmitted over a packet network A system for multicast streaming of programs over a packet network includes a node having a processor that conditions a video bitstream such that packets containing an I-frame are located near program specific information (PSI) packets, the processor marking a rando... | 01/11/2011 |
| 7864944 | Optimal call speed for call center agents A system and method for handling a call from a caller to a call center includes an automatic call distributor (ACD) to receive the call and to route the call to an agent. A module operates to compute a rate of speech of the caller, and a display graphically displays... | 01/04/2011 |
| 7863172 | Gallium nitride semiconductor device A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n− doped GaN layer having a thickness greater than one micron disposed on said n+ GaN laye... | 01/04/2011 |
| 7859037 | Checkerboarded high-voltage vertical transistor layout In one embodiment, a transistor fabricated on a semiconductor die is arranged into sections of elongated transistor segments. The sections are arranged in rows and columns substantially across the semiconductor die. Adjacent sections in a row or a column are oriente... | 12/28/2010 |
| 7855950 | Congruent forwarding paths for unicast and multicast traffic A mechanism that provides congruent forwarding paths for unicast and multicast data traffic over a service provider core network includes issuing, by a receiver edge node, a request to join a multicast tree structure. A unicast path from the receiver edge node to a ... | 12/21/2010 |
| 7844036 | Visual test automation tool for message-based applications, web applications and SOA systems In one embodiment, a graphical user interface (“GUI”) enables the efficient composition and execution of a test of a message-based application, Web application, or SOA systems' capacity to receive, process and respond to message traffic. The GUI may be used to g... | 11/30/2010 |
| 7843917 | Half-duplex multicast distribution tree construction In one embodiment, a method includes sending upstream to a nearest neighbor node, by a Client Label Switched Router (LSR), a downstream label map message of a Server-Forwarding Equivalence Class type (S-FEC-DOWN). In response to the S-FEC-DOWN, a downstream forwardi... | 11/30/2010 |
| 7835370 | System and method for DSL subscriber identification over ethernet network A DSLAM aggregation topology VLAN bundling mechanism includes an edge device port that receives a packet from a Digital Subscriber Line Access Multiplexer (DSLAM) device, the packet including an inner Virtual Local Area Network (VLAN) tag that identifies a Digital S... | 11/16/2010 |
| 7829944 | High-voltage vertical transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from ... | 11/09/2010 |
| 7816731 | Segmented pillar layout for a high-voltage vertical transistor In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjace... | 10/19/2010 |
