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| Number | Title | Issue Date |
| 7681084 | TOD or time stamp inserted into trace recording stream During trace recording, on-chip trace export mechanisms may schedule output from multiple sources out of order of execution. This makes the exact arrival of trace information in the receiver imprecise. Time of the day or time stamp information may be placed in the t... | 03/16/2010 |
| 7681012 | Method, system and device for handling a memory management fault in a multiple processor device A method or device handles memory management faults in a device having a digital signal processor (“DSP”) and a microprocessor. The DSP includes a memory management unit (“DSP MMU”) to manage memory access by the DSP, and the DSP and the microprocessor acces... | 03/16/2010 |
| 7680874 | Adder An adder that can detect the generation of overflow at a high speed. Carry signal c14 from the 15th digit to the 16th digit in the result of addition from the 1st digit to the 16th digit of the input data is generat... | 03/16/2010 |
| 7680477 | Integrated radio frequency filters for multiband transceivers A system and method integrates signal filters in a multiband transceiver. A preferred embodiment comprises an amplifier with a first tunable capacitor coupled to a signal input and a tunable filter. The tunable filter comprises an input stage with a first pair of in... | 03/16/2010 |
| 7680472 | Device and method for receiving and processing RF signals, a method for providing digital calibration values for such a device and a receiver incorporating the device A device for receiving a RF signal over multiple channels, a receiver incorporating the device, a method of providing digital calibration values for a digitally-tunable resonant circuit of the device, and a method of processing an RF signal. In one embodiment the de... | 03/16/2010 |
| 7680456 | Methods and apparatus to perform signal removal in a low intermediate frequency receiver Methods, apparatus, and articles of manufacture are disclosed for removing an undesired component from a low intermediate frequency signal having an intermediate center frequency and an undesired component at a first frequency. One example method may include determi... | 03/16/2010 |
| 7680289 | Binaural sound localization using a formant-type cascade of resonators and anti-resonators This invention is a method for binaural localization using a cascade of resonators and anti-resonators to implement an HRTF (head-related transfer function). The spectrum of the cascade reproduces the magnitude spectrum of a desired HRTF. The proposed method provide... | 03/16/2010 |
| 7680216 | Adaptive thresholds for high speed downlink shared control channel (HS-SCCH) (part I) detection schemes A technique is provided for implementing adaptive thresholds associated with HS-SCCH detection schemes; and when applied to any HS-SCCH detection scheme, the resulting false alarm probability curves are more robust to amplitude variations of the different shared con... | 03/16/2010 |
| 7680150 | Virtual clear channel avoidance (CCA) mechanism for wireless communications An arrangement avoids contention on a communication medium among devices including at least a transmitter and a receiver. The arrangement involves a first portion configured to instruct a receiver to indicate that the communication medium is busy for a time period s... | 03/16/2010 |
| 7679792 | Merged camera and scanner A narrow scanning aperture, lens, and mirror are added to a digital camera to enable image or text scanning. A motion sensor on the same face as the scanner aperture provides approximate scan speed data as the scanner aperture is pressed against and manually moved a... | 03/16/2010 |
| 7679444 | Differential amplifier system One embodiment of the invention includes a differential amplifier circuit. A first input stage generates first and second control voltages in response to a differential input signal. A second input stage generates third and fourth control voltages in response to the... | 03/16/2010 |
| 7679443 | System and method for common mode translation System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter... | 03/16/2010 |
| 7679437 | Split-feedback technique for improving load regulation in amplifiers A circuit arrangement and method for improving load regulation in an amplifier (e.g., LDO amplifier) uses a feedback circuit including a parallely connected feedback resistance Rf and a noise reduction feedback capacitance Cf, wherein an external capacitance has equ... | 03/16/2010 |
| 7679190 | Raised solder-mask-defined (SMD) solder ball pads for a laminate electronic circuit board A raised solder-mask-defined (SMD) pad configured for receiving a solder ball on a laminate electronic circuit board and a method of creating the raised SMD pad on a laminate electronic circuit board. The method may comprise forming a base bump, covering the base bu... | 03/16/2010 |
| 7679002 | Semiconductive device having improved copper density for package-on-package applications In one aspect, the invention provides a semiconductor device that comprises a semiconductor device packaging substrate core. A first interconnect structure is located within a mold region and on a die side of the substrate core and has a first conductive metal densi... | 03/16/2010 |
| 7678713 | Energy beam treatment to improve packaging reliability The present invention provides a process for improving the hardness and/or modulus of elasticity of a dielectric layer and a method for manufacturing an integrated circuit. The process for improving the hardness and/or modulus of elasticity of a dielectric layer, am... | 03/16/2010 |
| 7678675 | Structure and method for a triple-gate transistor with reverse STI Exemplary embodiments provide triple-gate semiconductor devices isolated by reverse STI structures and methodologies for their manufacture. In an exemplary process, stacked layers including a form layer over a dielectric layer can be formed over a semiconductor subs... | 03/16/2010 |
| 7678637 | CMOS fabrication process Ultra high temperature (UHT) anneals above 1200 C for less than 100 milliseconds for PMOS transistors reduce end of range dislocations, but are incompatible with stress memorization technique (SMT) layers used to enhance NMOS on-state current. This invention reverse... | 03/16/2010 |
| 7678601 | Method of forming an acceleration sensor A method of forming a MEMS structure over active circuitry in a semiconductor body includes forming active circuitry in a semiconductor body, and forming the MEMS structure over the active circuitry, wherein at least a portion of the MEMS structure spatially overlap... | 03/16/2010 |
| 7677432 | Spot heat wirebonding Methods and systems are disclosed for forming secure wirebonds between electrical contacts in electronic device assemblies. Representative embodiments of the invention are described for forming a wirebond including system components and method steps for generating e... | 03/16/2010 |
| 7676709 | Self-test output for high-density BIST A method, apparatus and system of a self-test output for high density BIST are disclosed. In one embodiment, an integrated circuit includes one or more memories, a BIST controller coupled to the one or more memories to perform write operation and to receive a PASS/F... | 03/09/2010 |
| 7676698 | Apparatus and method for coupling a plurality of test access ports to external test and debug facility An interface unit is provided for selectively testing a plurality of processor/cores. The interface unit includes an interface test access port (TAP) unit operable to receive test commands, and a logic unit coupled to the interface TAP unit and operable to generate ... | 03/09/2010 |
| 7676697 | Using a delay line to cancel clock insertion delays A programmable delay is added to the data and clock data paths in order to cancel the effect of the clock insertion delays. This programmable delay is adjusted dynamically at runtime to optimize the performance of the interface. ... | 03/09/2010 |
| 7676043 | Audio bandwidth expansion Bandwidth expansion for audio signals by frequency band translations plus adaptive gains to create higher frequencies; use of a common channel for both stereo channels limits computational complexity. Adaptive cut-off frequency determination by power spectrum curve ... | 03/09/2010 |
| 7675888 | Orthogonal frequency division multiplexing access (OFDMA) ranging A method for Orthogonal Frequency Division Multiplexing Access (OFDMA) ranging is provided. The method includes receiving a signal having OFDMA symbols. An FFT is performed on this signal. Matching ranging codes are found. The power for a given hypothesized ranging ... | 03/09/2010 |
| 7675706 | Methods and apparatus for proximity detection of hard disk drive read heads Methods and apparatus for proximity detection of hard disk drive read heads are disclosed. A disclosed method comprises forming a first signal having a frequency, a first amplitude, and a first offset voltage, forming a second offset voltage substantially equal to t... | 03/09/2010 |
| 7675704 | Magnetoresistive head preamplifier circuit with programmable input impedance A preamplifier circuit for a disk drive system is disclosed. The preamplifier circuit has first and second inputs that sense the voltage on either side of a magnetoresistive (MR) head element, which presents a varying resistance according to the localized magnetic f... | 03/09/2010 |
| 7675551 | Method and apparatus obtaining color values for a digital camera Digital camera color correction with a linear transformation having coefficients computed from an optimization with preservation of gray levels. This preserves white balance despite differing exposures for images from a target sensor and reference colors. ... | 03/09/2010 |
| 7675368 | Hybrid stochastic gradient based digitally controlled oscillator gain Kestimation A novel hybrid stochastic gradient adaptation apparatus and method for calibrating the gain of an RF or non-RF digitally controlled oscillator (DCO). The adaptation algorithm determines a true stochastic gradient between a forcing function and its corresponding syst... | 03/09/2010 |
| 7675345 | Low-leakage level-shifters with supply detection Low-leakage level-shifters with reduced leakage are disclosed. In one example, a level-shifter circuit to reduce leakage when there is an invalid supply voltage is described, including a level-shifter configured to shift a voltage of an digital input signal based on... | 03/09/2010 |
| 7675315 | Output stage with low output impedance and operating from a low power supply A low-impedance output stage which operates from a low voltage power supply. In an embodiment, the output stage contains an operational amplifier and two PMOS transistors used in a feedback configuration resulting in low output impedance. The output stage may also i... | 03/09/2010 |
| 7675272 | Output impedance compensation for linear voltage regulators In a method and system for regulating an output voltage, a linear voltage regulator (LVR) includes an adjustable shunt regulator (ASR) having a limited gain, a feedback circuit (FC), and a compensation resistor (CR). The limited gain causes the output voltage of the... | 03/09/2010 |
| 7675152 | Package-on-package semiconductor assembly Disclosed are methods and devices for providing improved semiconductor packages and POP IC assemblies using the improved packages with reduced warping. According to disclosed embodiments of the inventions, a packaged semiconductor device for use in a POP assembly in... | 03/09/2010 |
| 7674707 | Manufacturable reliable diffusion-barrier Devices and methods are presented to fabricate diffusion barrier layers on a substrate. Presently, barrier layers comprising a nitride layer and a pure metal layer are formed using a physical vapor deposition (PVD) process that requires multiple ignition steps, and ... | 03/09/2010 |
| 7674682 | Capacitor integration at top-metal level with a protective cladding for copper surface protection An on-chip decoupling capacitor (106) and method of fabrication. The decoupling capacitor (106) is integrated at the top metal interconnect level (104) and includes surface protection cladding (109) for the copper metal (104b | 03/09/2010 |
| 7673294 | Mechanism for pipelining loops with irregular loop control This invention modifies an irregular software pipelined loop conditioned upon data in a condition register in a compiler scheduled very long instruction word data processor to prevent over-execution upon loop exit. The method replaces a register modifying instructio... | 03/02/2010 |
| 7673120 | Inter-cluster communication network and heirarchical register files for clustered VLIW processors A VLIW processor has a hierarchy of functional unit clusters that communicate through explicit control in the instruction stream and store data in register files at each level of the hierarchy. Explicit instructions transfer values between sub-clusters through a clu... | 03/02/2010 |
| 7673119 | VLIW optional fetch packet header extends instruction set space This invention is useful in a very long instruction word data processor that fetches a predetermined plural number of instructions each operation cycle. A predetermined one of these instructions is used as a special header. This special header has a unique encoding ... | 03/02/2010 |
| 7673101 | Re-assigning cache line ways An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels. Each of the caches comprises a plur... | 03/02/2010 |
| 7673091 | Method to hide or reduce access latency of a slow peripheral in a pipelined direct memory access system A bus bridge between a high speed DMA bus and a lower speed peripheral bus sets a threshold for minimum available buffer space to send a read request dependent upon a frequency ratio and the DMA read latency. Similarly, a threshold for minimum available data for a w... | 03/02/2010 |