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| Number | Title | Issue Date |
| 6687775 | Dual purpose serial/parallel data transfer device for peripheral storage device A peripheral storage device system and a data transfer device for use in a peripheral storage device system are disclosed, which provide for selective information transfer between a peripheral storage device, such as a disk drive, a CDROM drive, or a tape... | 02/03/2004 |
| 6687769 | Serial peripheral interface with high performance buffering scheme The serial peripheral interface and high performance buffering scheme according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present invention, an improved high performance bufferi... | 02/03/2004 |
| 6687064 | Write head fault detection circuit and method A circuit (30, 40) and method for detecting faults of a write head (18) of a hard-disk drive system (70). A first resistor R1 and a second resistor R2 are coupled to coil L of write head (18). A transistor Q1 is coupled to... | 02/03/2004 |
| 6686225 | Method of separating semiconductor dies from a wafer Methods are disclosed for manufacturing semiconductor device dies and for separating dies from a semiconductor wafer, wherein one or more channels are etched in the top of the wafer between individual die areas. Material is then removed from the bottom si... | 02/03/2004 |
| 6608520 | Regulator circuit To provide a regulator circuit capable of preventing oscillation of output voltage when an overcurrent regulating function is activated voltage across resistor 31 is lower than the voltage of voltage source VR2, output of hysteresis comparator 51 is low-l... | 08/19/2003 |
| 6606042 | True background calibration of pipelined analog digital converters Systems and methods are provided for performing a background calibration technique on one or more stages of a pipeline Analog-to-Digital Converter (ADC). The systems and methods employs a slow but accurate analog-to-digital converter or a slow but accurat... | 08/12/2003 |
| 6603366 | Trimmable oscillator The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator cir... | 08/05/2003 |
| 6603295 | Circuit configuration for the generation of a reference voltage The circuit configuration for the generation of a reference voltage (Vref) contains a reference voltage source (12) and a storage capacitor (C2) to which a voltage provided by a reference voltage source (12) can be applied via a controllable switch. The c... | 08/05/2003 |
| 6600327 | Method of reducing distortion and noise of square-wave pulses, a circuit for generating minimally distorted pulses and use of method and circuit A method and apparatus of measuring current in a switching circuit (2) of the two-port type having a first set of terminals connected to a set of terminals of a noise reducing circuit, wherein a second set of terminals of the switching circuit has a switc... | 07/29/2003 |
| 6597302 | System for increasing the bandwidth of sample-and-hold circuits in flash ADCs An analog-to-digital converter to convert an analog signal to a digital signal, including a sample-and-hold circuit to sample and hold the analog signal and to output a held signal, a buffer circuit to buffer the held signal to output a buffered signal, a... | 07/22/2003 |
| 6597183 | Resistance measurement system A system is provided for precisely measuring a resistive load embedded in a potentially non-linear and capacitive Powered Device network which eliminates variable voltage from the measurement, decreases the capacitive settling times, and averages out syst... | 07/22/2003 |
| 6594101 | Read head protection circuit and method A circuit (80) and method (84) for protecting read heads (18) of a hard-disk drive system (100). Capacitor C1 is controllably coupled to a dummy head Rdummy during a Vbias mode, so that capacitor C1 has a low, p... | 07/15/2003 |
| 6593818 | Circuit configuration for the compensation of leakage currents in a voltage-controlled oscillator of a PLL circuit In a circuit configuration for the compensation of leakage currents in a voltage-controlled oscillator (12) of a PLL circuit (10), a control voltage is applied to the oscillator by way of a loop filter (20), which is generated by a phase detector (16) as ... | 07/15/2003 |
| 6590843 | DVD radial runout cancellation with self-calibration A self-calibrating radial runout cancellation method for DVD optical disc media. The radial runout of an optical disc is first measured, during closed-loop tracking, for amplitude and phase. During tracking, a sine wave corresponding in phase and amplitud... | 07/08/2003 |
| 6590448 | Operational amplifier topology and method A technique is disclosed which facilitates the layout of op amp cells, for example, two-stage op amp cells or three-stage op amp cells, to provide larger operational amplifiers. In accordance with one aspect, the op amp cells can be suitably coupled in pa... | 07/08/2003 |
| 6590436 | System and method of translating wide common mode voltage ranges into narrow common mode voltage ranges A system and method is provided for translating a wide common mode voltage range into a narrow common mode voltage range. The system and method extend the common mode voltage range of functional devices beyond the supply rails of the functional device, wh... | 07/08/2003 |
| 6587529 | Phase detector architecture for phase error estimating and zero phase restarting A system and method for enabling an efficient Zero Phase Restart (ZPR) of a device. The structure is based on deploying normalized timing gradient (NTG) blocks (501 and 502) in pairs, each circuit employing an orthogonal phase error transfer function char... | 07/01/2003 |
| 6587296 | Capacitor bias recovery methodology A preamplifier circuit for a hard disk drive system comprises a preamplifier circuit having a bias voltage circuit stage associated therewith. The preamplifier circuit further comprises a current bias boost recovery circuit operatively coupled to the bias... | 07/01/2003 |
| 6587062 | Flexible interface circuit and method for delta sigma A/D converters A multi-mode interface circuit for coupling a delta sigma modulator (24) to a processor includes a decoder 20 for decoding mode selection inputs to produce a plurality of control signals controlling an oscillator and a plurality of multiplexers. The oscil... | 07/01/2003 |
| 6583744 | Correction circuit for beta mismatch between thermometer encoded and R-2R ladder segments of a current steering DAC A current correction circuit 500 eliminates beta mismatches between a thermometer encoded segment 102 and a R-2R ladder segment 106 of a current steering digital-to-analog converter 100. The circuit 500 consists of three replica MSB unit current sources, ... | 06/24/2003 |
| 6581184 | METHOD AND CIRCUIT FOR INCLUDING PARITY BITS IN WRITE DATA OF A MASS DATA STORAGE DEVICE, OR THE LIKE, USING A 48/54 MTR (3:K) CODE CONSTRAINT, AND POST-PROCESSING CIRCUIT AND METHOD FOR PROCESSING READ BACK DATA THAT INCLUDES SAID CODE CONSTRAINT A method for writing data to a mass data storage device (10) includes applying a maximum transition run length code constraint to the data to be written, generating parity data based on the data, and inserting the parity data into the data to be written (... | 06/17/2003 |
| 6580575 | Process and temperature resistant active damping circuit for inductive write drivers An active damping circuit including an H-bridge circuit having an inductive load and a switching circuit, an impedance circuit responsive to a bias signal to damp the H-bridge circuit, and a bias circuit to generate the bias signal responsive to the volta... | 06/17/2003 |
| 6580315 | System and method of maintaining an amplifier common-mode output voltage A low-power solution for maintaining an amplifier common-mode output voltage, regardless of whether the amplifier is on or off, that does not degrade the performance of the amplifier through the use of a passgate in the signal path.... | 06/17/2003 |
| 6580308 | VDS protection for high voltage swing applications The invention provides apparatus, methods and systems for providing voltage protection at the drain-to-source path of an output transistor. The invention discloses circuit apparatus and system giving excess voltage protection in a circuit having a voltage... | 06/17/2003 |
| 6578123 | Relocatable overland peripheral paging Apparatus for flexibly locating the data page on which the peripheral registers are located. External hardware contentions are eliminated because the peripheral registers can be relocated anywhere in the system address space. Hardware design is therefore ... | 06/10/2003 |
| 6577135 | Battery pack with monitoring function utilizing association with a battery charging system A battery detect circuit (32) is provided that is operable to dispose a sense resistor (50) in series with the battery to determine whether the charge is being provided to the battery or being extracted from the battery. The voltage across the sensor resi... | 06/10/2003 |
| 6576535 | Carbon doped epitaxial layer for high speed CB-CMOS A method for fabricating a high speed complementary bipolar/CMOS device is disclosed which enables the forming of a silicon epitaxial layer in a PNP transistor having carbon incorporated therein to suppress boron up-diffusion from lower heavily boron-dope... | 06/10/2003 |
| 6570516 | Multi-output DAC and method using single DAC and multiple s/h circuits A single-DAC, multiple sample/hold conversion circuit includes a digital-to-analog converter and a plurality of sample/hold circuits each including an output amplifier, first and second hold capacitors coupled to inputs of the output amplifier and to term... | 05/27/2003 |
| 6570435 | Integrated circuit with current limited charge pump and method One aspect of the invention is an integrated circuit (613)comprising a current source (611) coupled to voltage source (610) and an output load (635). The integrated circuit (613) further comprises a charge pump (600) coupled to the current source (611) at... | 05/27/2003 |
| 6570410 | Feed-forward approach for timing skew in interleaved and double-sampled circuits The present invention relates to a clock generator circuit which comprises a clock generator subcircuit which is operable to generate two clock signals having approximately the same frequency for use in sampling an analog signal in a generally alternating... | 05/27/2003 |
| 6567887 | Buffering of partition tables, file system directory structures and individual file cluster chains in a mass storage device A computer system for storing data includes a host computer having system RAM associated with the computer system, and a file directory peripheral bus connected to the host computer. A mass memory storage peripheral computer device is connected to said pe... | 05/20/2003 |
| 6567489 | Method and circuitry for acquiring a signal in a read channel A method for acquiring a signal in a read channel (18), the read channel (18) having an equalizer (48), includes performing an automatic gain control sequence; performing a phase locked loop sequence that includes performing a fast phase locked loop step,... | 05/20/2003 |
| 6564291 | Multi-function peripheral storage device buffer system The present invention provides a multi-function buffer system for use in a peripheral storage device system, as well as a peripheral storage device system having a multi-function buffer system. The buffer system comprises a multi-purpose memory component ... | 05/13/2003 |
| 6563655 | Method and apparatus for failsafing and extending range for write precompensation Catastrophic failures of a write precompensation circuit are prevented from occurring without limiting the precompensation range to a small value and the range of precompensation is extended beyond limits imposed by the duty cycle of the clock signal. Cat... | 05/13/2003 |
| 6556077 | Instrumentation amplifier with improved AC common mode rejection performance A method and apparatus for improving the AC common mode rejection performance of monolithic two op-amp instrumentation amplifiers is disclosed. A new approach to designing the first op-amp of an instrumentation amplifier is provided wherein the frequency ... | 04/29/2003 |
| 6555977 | Disk drive motor position detection using mutual inductance zero crossing The invention includes a method and apparatus for detecting the position of an electric motor rotor by sensing the zero crossing or polarity change of a mutual inductance associated with the motor. The use of mutual inductance provides for consistent posi... | 04/29/2003 |
| 6548973 | Method and apparatus for braking a polyphase DC motor A circuit (10) for braking a polyphase dc motor (12) includes a circuit (38) for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and a braking circuit (42-44, 26-28) to brake the motor (12) when the o... | 04/15/2003 |
| 6545538 | Rail-to-rail class AB output stage for operational amplifier with wide supply range A rail-to-rail class AB output stage includes a P-channel pull-up transistor (4) having a source coupled to a first supply rail voltage (V+), a gate coupled to a first input conductor (2) of the output stage, and a drain coupled to an output te... | 04/08/2003 |
| 6542547 | Efficient heuristic based motion estimation method for video compression A heuristic based motion estimation system and method for video compression may include: defining the target block 70; defining a simplified signature block 72; searching the reference frame using the simplified signature block 74; searching for the best ... | 04/01/2003 |
| 6542017 | Feed-forward approach for timing skew in interleaved and double-sampled circuits The present invention relates to a clock generator circuit which comprises a clock generator subcircuit which is operable to generate two clock signals having approximately the same frequency for use in sampling an analog signal in a generally alternating... | 04/01/2003 |
