Bizarre Patents
Neuroimaging as a Marketing Tool
Neuroimaging as a means for validating whether a stimulus such as advertisement, communication, or product evokes a certain mental response such as emotion, preference, or memory, or to predict the consequences of the stimulus on later behavior such as consumption or purchasing.
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| Number | Title | Issue Date |
| RE42212 | Protection system and method An anti-virus A protection system and method for use within a data transmission network to protect against the transfer of viruses from a transmission originator originator, having a discrete transmission originator code code, to a subscriber/recipient subscribe... | 03/08/2011 |
| 7791189 | Multipiece apparatus for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages and method of making the same An integrated circuit (IC) device package is presented. A frame body has opposing first and second surfaces and a central opening that is open at the first and second surfaces. The second frame body surface is mounted to a first stiffener surface. An IC die is mount... | 09/07/2010 |
| 7790234 | Low dielectric constant materials prepared from soluble fullerene clusters This disclosure relates generally to polymeric networks of fullerene compounds, to methods of preparing precursors for such networks, and to their subsequent use as low dielectric constant materials in microelectronic devices. ... | 09/07/2010 |
| 7786591 | Die down ball grid array package A cavity or die down ball grid array package includes an interposer substrate structure attached to the die. In an example, the interposer substrate reduces the interconnect length from a board to which the package mounts to power and ground pads on a top layer of t... | 08/31/2010 |
| RE41596 | System and method for integrating a digital core with a switch mode power supply A digital core embodied within a semiconductor die that requires plural separate power supply voltage domains is situated within any of a variety of integrated circuit packaging technologies. Within the integrated circuit package including this semiconductor die als... | 08/31/2010 |
| 7782855 | Method and apparatus for the reduction of upstream request processing latency in a cable modem termination system Upstream requests such a bandwidth requests, are processed by CMTS out of order on a priority basis to reduce latency in responding to the request. Specifically, a cable modem termination system (CMTS) is connected to a plurality of cable modems by a cable plant. Th... | 08/24/2010 |
| 7781882 | Low voltage drop and high thermal performance ball grid array package An integrated circuit (IC) package is provided. The IC package includes a substantially planar substrate having a plurality of contact pads on a first surface electrically connected through the substrate to a plurality of solder ball pads on a second surface of the ... | 08/24/2010 |
| 7781266 | Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages A method of assembling an IC device package is provided. A leadframe is formed. At least one IC die is attached to a die attach pad portion of the leadframe. Wire bonds are coupled between the IC die and the leadframe. A cap is attached to the leadframe. A second su... | 08/24/2010 |
| 7764772 | Method, system, apparatus, and computer program product for transmitting a message A method for effecting delivery of a message from an originator in an original message format to a plurality of authorized receivers in a respective reception message format includes the steps of: (a) composing the message; (b) characterizing the message for address... | 07/27/2010 |
| 7752627 | Leaky-bucket thread scheduler in a multithreading microprocessor A leaky-bucket style thread scheduler for scheduling concurrent execution of multiple threads in a microprocessor is provided. The execution pipeline notifies the scheduler when it has completed instructions. The scheduler maintains a virtual water level for each th... | 07/06/2010 |
| 7739484 | Instruction encoding to indicate whether to store argument registers as static registers and return address in subroutine stack A method and apparatus provide means for saving and restoring processor register values and allocating and deallocating stack memory. A first field of a save instruction encodes whether a value in a register of a processor is saved as a static value. A second field ... | 06/15/2010 |
| 7734932 | System and method for securing executable code A system and method for the secure storage of executable code and the secure movement of such code from memory to a processor. The method includes the storage of an encrypted version of the code. The code is then decrypted and decompressed as necessary, before re-en... | 06/08/2010 |
| 7730008 | Database interface and database analysis system A method, system, and computer program product for interactive searching with executable suggestions are provided. The present invention provides a search engine and data management technology that can understand what users are looking for, understand the data in a ... | 06/01/2010 |
| 7724763 | Apparatuses to utilize multiple protocols in a wireless communication system A wireless communication system is adapted for compatible inter-operation of a plurality of devices operating in accordance with a plurality of protocols. The wireless communication system includes a first group of one or more subscriber stations that interface with... | 05/25/2010 |
| 7724710 | Methods to utilize multiple protocols in a wireless communication system A wireless communication system is adapted for compatible inter-operation of a plurality of devices operating in accordance with a plurality of protocols. The wireless communication system includes a first group of one or more subscriber stations that interface with... | 05/25/2010 |
| 7724661 | Scalable, high-resolution asynchronous transfer mode traffic shaper and method An ATM network traffic shaper is implemented in hardware. The traffic shaper shapes transmit data on one or more virtual circuits (VCs) according to the specified quality of service (QoS) parameters. Thus, the traffic shaper provides for the delivery of associated d... | 05/25/2010 |
| 7721075 | Conditional branch execution in a processor having a write-tie instruction and a data mover engine that associates register addresses with memory addresses A RISC processor having a data mover engine and instructions that associate register addresses with memory addresses. In an embodiment, the instructions include a read-tie instruction, a single write-tie instruction, a dual write-tie instruction, and an untie instru... | 05/18/2010 |
| 7721074 | Conditional branch execution in a processor having a read-tie instruction and a data mover engine that associates register addresses with memory addresses A RISC processor having a data mover engine and instructions that associate register addresses with memory addresses. In an embodiment, the instructions include a read-tie instruction, a single write-tie instruction, a dual write-tie instruction, and an untie instru... | 05/18/2010 |
| 7721073 | Conditional branch execution in a processor having a data mover engine that associates register addresses with memory addresses A RISC processor having a data moving engine and instructions that associate register addresses with memory addresses. In an embodiment, the instructions include a read-tie instruction, a single write-tie instruction, a dual write-tie instruction, and an untie instr... | 05/18/2010 |
| 7719110 | Flip chip package including a non-planar heat spreader and method of making the same A flip chip package generally includes a substrate, a flip chip die, and a heat spreader. The flip chip die is coupled to the substrate. The heat spreader is coupled to the flip chip die. The heat spreader can include one or more walls. Generally, the one or more wa... | 05/18/2010 |
| 7714453 | Interconnect structure and formation for package stacking of molded plastic area array package Apparatuses, methods, and systems for improved integrated circuit packages are described. An integrated circuit (IC) package includes a substrate having opposing first and second surfaces, an IC die, a plurality of conductive elements, and an encapsulating material.... | 05/11/2010 |
| 7711563 | Method and system for frame erasure concealment for predictive speech coding based on extrapolation of speech waveform A method and system are provided for synthesizing a corrupted frame output from a decoder including one or more predictive filters. The corrupted frame is representative of one segment of a decoded signal output from the decoder. The method comprises extrapolating a... | 05/04/2010 |
| 7701954 | Gateway with voice In one aspect of the present invention, a network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far end data termination devices via a hybrid fiber coaxial network a... | 04/20/2010 |
| 7688237 | Apparatus and method for analog-to-digital converter calibration Methods, systems, and apparatuses for calibration of analog to digital converters (ADC) are described herein. In an aspect, an ADC includes a plurality of slices. Each slice includes a digital to analog converter (DAC), a comparator, and a digital processing unit (D... | 03/30/2010 |
| 7683063 | Therapeutic agents useful for treating pain A compound of formula: wherein Ar1, Ar2, V, X, R3, R4, and m are as disclosed herein or a pharmaceutically acceptable salt thereof (a “Cyclo(hetero)alkenyl Compound”); composi... | 03/23/2010 |
| 7653161 | Method of and system for optimizing the capacity of a digital communication system in presence of both internal and external noise A method of optimizing a communication system for receiving and processing an input communication signal includes selecting a first noise margin m to be applied against an external noise present on the input communication signal. The method further includes selectin... | 01/26/2010 |
| 7644035 | Method and apparatus for reducing fraudulent credit transactions by requiring merchant return of multi-digit authorization codes Processes for reducing fraudulent credit transactions, including financial (e.g., credit, charge, debit, etc.) card transactions, are introduced, in which merchants receive multi-digit authorization codes from a credit provider (e.g., a customer transaction account ... | 01/05/2010 |
| 7616672 | Semiconductor light emitting device and manufacturing method therefor A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of... | 11/10/2009 |
| 7616055 | Transmitter apparatus with extended gain control A transmitter includes a first variable gain amplifier (VGA) and a second VGA coupled to an output of the first VGA. The first and second VGAs each comprise a plurality of parallel gain stages. Gains of the first and second VGAs are equal to the sum of the gains of ... | 11/10/2009 |
| 7613583 | Method and system for particle data processing In an embodiment, a computer-implemented method is provided for processing digital data from a particle analyzer. The method includes receiving digital particle data, transforming the received data to correct for noise, applying linear compensation for dye spectral ... | 11/03/2009 |
| 7612783 | Advanced anti-aliasing with multiple graphics processing units A method and apparatus for performing multisampling-based antialiasing in a system that includes first and second graphics processing unit (GPUs) that reduces the amount of data transferred between the GPUs and improves the efficiency with which such data is transfe... | 11/03/2009 |
| 7595227 | Integrated circuit device package having both wire bond and flip-chip interconnections and method of making the same Methods for assembling a die-down array integrated circuit (IC) device packages with enhanced thermal, electrical, and input/output properties are presented. The method includes coupling a first surface of a substrate to a first surface of a heat spreader, mounting ... | 09/29/2009 |
| 7583797 | Single ended analog front end An analog front end. The analog front end comprises a converter configured to convert a differential input signal to a single-ended input signal, and convert a single-ended output signal to a differential output signal. And a transformer configured to couple the dif... | 09/01/2009 |
| 7574031 | Nodule boundary detection A method of detecting the extent of a lung nodule in a scan image comprises fine segmenting (14) a region around the nodule into foreground and background, filling holes within foreground areas (16), region growing the foreground (18) to identif... | 08/11/2009 |
| 7566591 | Method and system for secure heat sink attachment on semiconductor devices with macroscopic uneven surface features Methods, systems, and apparatuses for attaching heat sinks to integrated circuit packages using thermally conductive adhesive materials are described. The adhesive materials can be shaped to conform to surfaces of the integrated circuit package and/or heat sink, pri... | 07/28/2009 |
| 7566590 | Low voltage drop and high thermal performance ball grid array package An apparatus and method for a low voltage drop and thermally enhanced integrated circuit (IC) package are described. A substantially planar substrate having a plurality of contact pads on a first surface is electrically connected through the substrate to a plurality... | 07/28/2009 |
| 7550845 | Ball grid array package with separated stiffener layer In a ball grid array (BGA) package, a first stiffener is attached to a surface of a substrate. A second stiffener is attached to the surface of the substrate to be co-planar with the first stiffener. The second stiffener is separated from the first stiffener by a ch... | 06/23/2009 |
| 7516355 | Method and computer program product for backing up and restoring online system information A method and system for copying operating system information to said at least two storage devices, selectively hiding at least one, but not all, of the storage devices from being accessed by the operating system, and selectively revealing one or more of said hidden ... | 04/07/2009 |
| 7515504 | Phase controlled high speed interfaces A system and method are used to allow high speed communication between a circuit and an external device. The system and method include a PLL with multiple phased outputs configured to be controlled digitally, a deskew PLL configured to align a clock of controller ci... | 04/07/2009 |
| 7511637 | Spreading code derived from weil sequences Methods and systems relating to Weil-based spreading codes are described herein. In an embodiment, a method includes generating a set of Weil sequences, adapting a plurality of sequences of the set of Weil sequences to form a first plurality of codes, and selecting ... | 03/31/2009 |
