Did You Know...
...that when IBM conducted a market study of Chester Carlson's invention in 1959, the company concluded that it would take only 5000 units of his new product to saturate the market? IBM therefore declined to be part of the new product introduction. Too bad for IBM. Carlson's invention was the xerography process, and his new product was the beginning of the Xerox Corporation. It is estimated that every day, worldwide, 3,000,000,000 copies are made!!
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 8174320 | Current switching system A current switching system is described. This system includes first and second mirrored devices coupled to each other and a coupled terminal, and the first and second mirrored devices are coupled to an input terminal and an output terminal; a storage element in elem... | 05/08/2012 |
| 8134897 | Current gain control system A current gain control system is described and comprises first and second gain blocks respectively associated with the first and second input channels, wherein first and second gain blocks transmit first and second gain signals in response to receiving first and sec... | 03/13/2012 |
| 8134807 | Thermally enhanced disk drive A disk drive data storage system. The system comprises a data storage disk, a movable member positioned near the data storage disk, and a sensor assembly, supported and movable by the movable member, for writing data to and reading data from the data storage disk. T... | 03/13/2012 |
| 8134792 | Preamplifier and method for synchronization with bit patterned media A preamplifier and method writes data synchronized with the passing of a write head in a magnetic storage device over bit islands in discrete patterned recording media. The preamplifier contains a write pre-driver that conditions write data, a synchronization circui... | 03/13/2012 |
| 8132459 | System and method to determine mechanical resonance of an accelerometer Systems and methods are provided for determining mechanical resonance of a sensor. In one embodiment, a system is provided that comprises a bias voltage source configured to apply a bias voltage impulse signal to a terminal of the sensor and a zero crossing detector... | 03/13/2012 |
| 8051347 | Scan-enabled method and system for testing a system-on-chip Scan-enabled method and system for testing a system-on-chip (SoC). The method includes electronically determining a slack in a signal at each port of a core of the SoC. The SoC includes multiple cores. Each core includes input ports and output ports. The method also... | 11/01/2011 |
| 8040973 | Transmitter including pre-distortion The present invention relates to pre-distortion in transmitter circuits and provides a circuit for introducing pre-distortion into the output of a transmitter, wherein said pre-distortion comprises a pre-cursor, a cursor and a post-cursor, the circuit comprising: a ... | 10/18/2011 |
| 8040627 | Methods and apparatus for generating a hard drive write signal Methods and apparatus for generating a hard drive write signal are here in disclosed. A disclosed method comprises generating a hard drive write signal on an output of a switch based on an edge of the first control signal and reducing the hard drive write signal bas... | 10/18/2011 |
| 8026680 | Methods and apparatus to reduce the stopping time of spindle motors Methods and apparatus to reduce the stopping time of a spindle motor are disclosed. An example method includes detecting a dissipation current flowing in a spinning motor; determining when the dissipation current drops below a threshold value; and, in response to th... | 09/27/2011 |
| 8014098 | Technique for duty cycle shift in hard disk drive write system A circuit for providing a write current having a programmably adjustable duty cycle in a hard disk drive write channel has a differential pair gain circuit for receiving a data input signal and generating a differential output voltage to provide a differential write... | 09/06/2011 |
| 8013772 | Reduced area digital-to-analog converter One embodiment of the invention includes a digital-to-analog converter (DAC) system. A resistive ladder comprises a plurality of resistors having an approximately equal resistance and is arranged in a respective plurality of resistive rungs between first and second ... | 09/06/2011 |
| 8013635 | Multi-mode circuit and a method for preventing degradation in the multi-mode circuit Multi-mode circuit (the circuit) and a method for preventing degradation in the circuit. The circuit includes a first transistor that enables functioning of the circuit in a first mode. The first transistor is responsive to a first signal to become inactive when the... | 09/06/2011 |
| 8009546 | Over current protection device An over current protection device is described. It includes a plurality of input channels for receiving an input signal; a plurality of low pass filters coupled to a first group of the plurality of input channels, wherein each low pass filter is associated with one ... | 08/30/2011 |
| 8000200 | HFM enable control system A modulation control system for use with a high frequency modulator is described. This system comprises a latch for selectively receiving enable signals, wherein the latch transmits a latched signal in response to receiving at least two of the enable signals; a sele... | 08/16/2011 |
| 7974144 | Memory with tunable sleep diodes A system and are described as to adjusting voltages in a memory device, while the device is in sleep mode, to prevent or minimize voltage or current leakage of the device. ... | 07/05/2011 |
| 7973523 | Reverse current sensing regulator system and method A reverse current sensing (RCS) regulator system and method is provided. One embodiment of the invention includes a RCS regulator system. The system comprises a RCS comparator that monitors a drain voltage of a LS FET and is configured to switch states at a zero cro... | 07/05/2011 |
| 7961418 | Resistivity sense bias circuits and methods of operating the same Resistivity sense bias circuits are described herein. An example resistivity sense bias circuit for use with a magnetoresistive read head includes a current biasing portion configured to provide a bias current across the magnetoresistive read head thereby establishi... | 06/14/2011 |
| 7960936 | Methods and apparatus to lock a phase lock loop to a motor Methods and apparatus to lock a phase lock loop to a spindle motor are disclosed. An example controller comprises a counter to determine a period of an operating signal received from a motor, an oscillator to generate a control signal based on an input signal, and a... | 06/14/2011 |
| 7949920 | DFT techniques to reduce test time and power for SoCs A technique for reducing the overhead of daisy chain test mode in divide-and-conquer testing using intermediate test modes that do not span all cores or all flip-flops in the core. The partial residual test mode spans across a subset of the cores and allows to bound... | 05/24/2011 |
| 7948319 | Current-mirroring systems and methods One embodiment of the invention includes a current-mirror system. The system includes a current-mirror circuit configured to conduct an input current through a first current path that includes a first degeneration resistance device and to generate an output current ... | 05/24/2011 |
| 7948199 | Single-ended gain stage and disk drive An electrical apparatus comprising an amplifier having a first input, a second input, and an output. The apparatus further comprises a first electrical path coupled to the first input and having a first resistance and a first electrical path coupled to the second in... | 05/24/2011 |
| 7941774 | Partial timing modeling for gate level simulation Various apparatuses, methods and systems for creating an integrated circuit and performing a gate level simulation of a circuit are disclosed herein. For example, some embodiments of the present invention provide a system for performing a gate level simulation of a ... | 05/10/2011 |
| 7940824 | Laser diode driver architectures Laser diode driver architectures are disclosed. Some example current drivers are described, including a current channel to provide an output current. The current channel includes a current mirror with emitter degeneration, a startup transistor coupled to the current... | 05/10/2011 |
| 7940541 | Bit cell designs for ternary content addressable memory A scheme for bit cell designs for ternary content addressable memory for comparing search data with content data is disclosed. In one embodiment, a system for comparing search data with content data stored in a ternary content addressable memory (TCAM) unit, include... | 05/10/2011 |
| 7936624 | Reduced power bitline precharge scheme for low power applications in memory devices A method and system are described for a two step precharging of bitlines in a memory array. In the first step a partial precharge of the bitline is accomplished with a lower power supply, the second step completes the bitline precharge with the higher power supply. ... | 05/03/2011 |
| 7932756 | Master slave delay locked loops and uses thereof Various systems and methods for delaying a signal relative to another signal are disclosed. As one example, a delay lock loop circuit is disclosed that includes at least two delay stages. Each of the aforementioned delay stages include a plurality of selectable dela... | 04/26/2011 |
| 7928703 | On-chip current sensing One embodiment of the invention includes an on-chip current-sense system for measuring a magnitude of an output current through a power transistor. The system includes a first sense transistor that conducts a first reference current to or from a phase node and a sec... | 04/19/2011 |
| 7911243 | Driver with programmable power commensurate with data-rate One embodiment of the invention includes a driver circuit. The driver circuit comprises an output transistor that is biased to provide an output signal in response to an input signal. The driver circuit also comprises at least one programmable variable resistor conf... | 03/22/2011 |
| 7911190 | Regulator with automatic power output device detection A switching regulator (20) including an on-chip power output function (24) and also an interface (26) to which off-chip power output devices (42PU, 42PD) may be connected is disclosed. The switching regulator (20) includes a... | 03/22/2011 |
| 7902778 | Programmable constant voltage retract of disk drive actuator A disk drive system including retract logic for control of the voice coil motor in a retract operation, in which the voice coil motor positions the read/write head actuator arm in a safe place in a loss-of-power event, is disclosed. The retract logic includes circui... | 03/08/2011 |
| 7889452 | Hard disk drive preamplifier timers and methods to calibrate hard disk drive preamplifier timers Hard disk drive preamplifier timers and methods to calibrate hard disk drive preamplifier timers are disclosed. A timer in a hard disk drive preamplifier comprises a first switch to selectively store charge in a storage device based on an input signal, the storage d... | 02/15/2011 |
| 7888965 | Defining a default configuration for configurable circuitry in an integrated circuit An integrated circuit with a configurable portion, such as an input/output port, that can be placed in a default configuration prior to actual configuration of the integrated circuit. An external terminal that serves as an output during normal operation is coupled, ... | 02/15/2011 |
| 7888924 | Combination continuous and discontinuous control of a power regulator A power regulator system is described. The system includes a switching system comprising at least one switch and an inductor, the switching system being configured to provide an output voltage based on a current through the inductor. The system also includes a switc... | 02/15/2011 |
| 7847600 | Track and hold circuit Methods and apparatus are disclosed to track and hold a voltage. An example track and hold circuit comprises a first electronic switch, a second electronic switch, and a current mode logic amplifier. ... | 12/07/2010 |
| 7859024 | Integrated circuit having efficiently packed decoupling capacitors An integrated circuit includes a substrate having a semiconducting surface (605) and a plurality of standard cells arranged in a plurality of rows including at least a first row (610) and a second row (615) immediately above the first row. The f... | 12/28/2010 |
| 7855849 | Methods and apparatus for temperature compensation for hard disk drive write overshoot current Methods and apparatus for temperature compensation for hard disk drive writer overshoot current are disclosed. A disclosed system comprises creating a first delay based on the temperature of the hard disk drive, creating a second delay based on the temperature of th... | 12/21/2010 |
| 7839589 | Write current waveform asymmetry compensation A write current circuit (300, 400) adapted to drive a thin film write head (202) of a mass media information storage device. The write current circuit (300, 400) further includes programming circuitry (311, 411) driven such that parameter... | 11/23/2010 |
| 7835098 | Automatic gain control for magnetic disk-drive preamplifier One embodiment of the invention includes a preamplifier system for a magnetic disk-drive. The system comprises a read amplifier configured to generate a read signal corresponding to data that is read from a magnetic disk via a magneto-resistive (MR) read head. The s... | 11/16/2010 |
| 7835096 | Disk-drive write head fault detection One embodiment of the invention includes a disk-drive write head fault detection system. The system includes an output stage configured to generate a monitored current through the disk-drive write head. The system also includes an open-circuit fault detector configu... | 11/16/2010 |
| 7834608 | Feed-forward compensation for a hysteretic switching regulator One embodiment of the invention includes a hysteretic power regulator system. The system includes a switching stage configured to periodically couple an input voltage to an inductor in response to a control signal to generate an output voltage. The system also inclu... | 11/16/2010 |
