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...During the Civil War, the Confederacy established its own Patent Office which issued 266 patents, a third of which concerned implements of war.
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| Number | Title | Issue Date |
| 7049678 | Diverse band gap energy level semiconductor device Hetero-structure semiconductor devices having first and second-type semiconductor junctions are disclosed. The hetero-structures are incorporated into pillar and rail-stack memory circuits improving the forward-to-reverse current ratios thereof. ... | 05/23/2006 |
| 7038248 | Diverse band gap energy level semiconductor device Hetero-structure semiconductor devices having first and second-type semiconductor junctions are disclosed. The hetero-structures are incorporated into pillar and rail-stack memory circuits improving the forward-to-reverse current ratios thereof. ... | 05/02/2006 |
| 7026212 | Method for making high density nonvolatile memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 04/11/2006 |
| 7018878 | Metal structures for integrated circuits and methods for making the same Metal structures for ICs and methods for manufacturing the same are described. The metal structures range from small features to large features and are resistant to peeling problems during heat treatments that occur during the manufacturing process. Peeling of the m... | 03/28/2006 |
| 7012299 | Storage layer optimization of a nonvolatile memory device The traditional nitride-only charge storage layer of a SONOS device is replaced by a multifilm charge storage layer comprising more than one dielectric material. Examples of such a multifilm charge storage layer are alternating layers of silicon nitride and silicon ... | 03/14/2006 |
| 7009275 | Method for making high density nonvolatile memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 03/07/2006 |
| 6995422 | High-density three-dimensional memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 02/07/2006 |
| 6984561 | Method for making high density nonvolatile memory An improved method for fabricating a three dimensional monolithic memory with increased density. The method includes forming conductors preferably comprising tungsten, then filling and planarizing; above the conductors forming semiconductor elements preferably compr... | 01/10/2006 |
| 6965527 | Multibank memory on a die A nonvolatile multibank memory on a die with multiple read, write, and erase circuits, allowing more than one bank to be read, written, erased, or tested independently. Such a multibank memory arrangement is used advantageously in a monolithic three dimensional memo... | 11/15/2005 |
| 6960794 | Formation of thin channels for TFT devices to ensure low variability of threshold voltages A thin film transistor with a channel less than 100 angstroms thick, preferably less than 80 angstroms thick, preferably less than 60 angstroms thick. The very thin channel reduces variability of threshold voltage from one TFT to the next. This is particularly advan... | 11/01/2005 |
| 6960495 | Method for making contacts in a high-density memory A method for forming a contact in a three dimensional monolithic memory is disclosed. In a preferred embodiment, the method comprises depositing a conductive layer over and in contact with a plurality of antifuses, wherein said antifuses are part of a story of activ... | 11/01/2005 |
| 6956278 | Low-density, high-resistivity titanium nitride layer for use as a contact for low-leakage dielectric layers A low-density, high-resistivity layer of a PVD sputter-deposited material, preferably titanium nitride, when coupled with a dielectric, makes a superior low-leakage insulating barrier for use in semiconductor devices. The material is created by sputtering methods th... | 10/18/2005 |
| 6951780 | Selective oxidation of silicon in diode, TFT, and monolithic three dimensional memory arrays The present invention relates to use of selective oxidation to oxidize silicon in the presence of tungsten and/or tungsten nitride in memory cells and memory arrays. This technique is especially useful in monolithic three dimensional memory arrays. In one aspect of ... | 10/04/2005 |
| 6952030 | High-density three-dimensional memory cell A three dimensional monolithic memory comprising a memory cell allowing for increased density is disclosed. In the memory cell of the present invention, a bottom conductor preferably comprising tungsten is formed. Above the bottom conductor a semiconductor element p... | 10/04/2005 |
| 6946719 | Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide The invention provides for a vertically oriented junction diode having a contact-antifuse unit in contact with one of its electrodes. The contact-antifuse unit is formed either above or below the junction diode, and comprises a silicide with a dielectric antifuse la... | 09/20/2005 |
| 6888750 | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication A nonvolatile memory array is provided. The array includes an array of nonvolatile memory devices, at least one driver circuit, and a substrate. The at least one driver circuit is not located in a bulk monocrystalline silicon substrate. The at least one driver circu... | 05/03/2005 |
| 6815077 | Low temperature, low-resistivity heavily doped p-type polysilicon deposition A method to create a low resistivity P+ in-situ doped polysilicon film at low temperature from SiH4 and BCl3 with no anneal required. At conventional dopant concentrations using these source gases, as deposition temperature decreases below abou... | 11/09/2004 |
| 6781878 | Dynamic sub-array group selection scheme A method of selecting numbers of sub-array groups for simultaneous operation to optimize bandwidth biases a number of sub-array groups and compares a circuit state value, preferably voltage, to a reference parameter to determine if the operation can successfully be ... | 08/24/2004 |
| 6780683 | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication A three-dimensional, field-programmable, non-volatile memory includes multiple layers of first and second crossing conductors. Pillars are self-aligned at the intersection of adjacent first and second crossing conductors, and each pillar includes at least an anti-fu... | 08/24/2004 |
| 6713371 | Large grain size polysilicon films formed by nuclei-induced solid phase crystallization A method to enhance grain size in polysilicon films while avoiding formation of hemispherical grains (HSG) is disclosed. The method begins by depositing a first amorphous silicon film, then depositing silicon nuclei, which will act as nucleation sites, on the amorph... | 03/30/2004 |
| 6639312 | Dummy wafers and methods for making the same Dummy wafers that are used in IC manufacturing and methods for manufacturing the same are described. The dummy wafers are made with an increased resistance to breaking during CVD manufacturing process. The dummy wafers are made by placing a protective fil... | 10/28/2003 |
