Sowell; John B., Starr; Mark T., Scott; Thomas J. - US Patent Attorneys and Agents

Attorney: Sowell; John B., Starr; Mark T., Scott; Thomas J.

Number of patents: 23
Last date: November 12, 1996

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Number	Title	Issue Date
5574951	System for providing a time division random access including a high speed unidirectional bus and a plurality of function cards connected in a daisy chain A novel high speed unidirectional bus system is provided for receiving a plurality of novel circuit card assemblies in receptacles on the bus. Adjacent receptacles are connected by lines on the bus which interconnect output pins to input pins. The circuit...	11/12/1996
5568521	Phase lock indicator circuit for a high frequency recovery loop An improved phase locked indication circuit for a Costas QPSK carrier recovery loop comprises an inphase channel, a quadrature channel and phase error channel each connected to an input of a three input summing circuit through a diode square law multiplie...	10/22/1996
5559788	Multiple channel quadrature communication system and method A transmitter is provided which simultaneously transmits waveforms such as with different data rates. These transmissions are modulated (e.g. phase modulated) onto quadrature channels of a common carrier, and are then combined. The resulting composite mod...	09/24/1996
5550875	Apparatus and method for residual error clock skew bound, and clocking therewith Multiple clocks are interconnected in a network which is fed and controlled by a clock generator. A delay of one or more clock periods less a fixed amount is imposed between any two such clocks excluding the clock generator, to cause the repeated clock so...	08/27/1996
5339312	Station interface unit An improved interface unit for receiving a stream of parallel bit words from a source bus comprising an address field, a data field and a clock field. The parallel bit words are first phase adjusted and stored in an input register where the address field ...	08/16/1994
5278973	Dual operating system computer A mainframe computing system is adapted to be loaded with one of a plurality of different operating systems and different associated microcode to provide a computing system which is capable of running user programs adapted to be executed by the loaded ope...	01/11/1994
5204668	Plural document image processing display for work stations An image processing station 18 displays data indicative of a plurality of document on a monitor 22 from data stored in a main image store 16 and the image processor 18 accepts commands from a keyboard 26 to print the images or to retrieve a new document f...	04/20/1993
5134631	Digital gain controller A novel programmable digital gain controller is provided for the automatic gain control loop of a communications receiver. The digital gain controller comprises a pair of digital detectors coupled to the real and imaginary components of a data stream for ...	07/28/1992
5063494	Programmable data communications controller The present invention provides a novel programmable data communications controller employed to accept data from a host computing system and for transmitting the data to a terminal designated by the host computer system. The data computer communications co...	11/05/1991
5063387	Doppler frequency compensation circuit In a communications data link network of the type having a plurality of ground stations and a single moving airborne station, there is provided a doppler frequency compensation circuit in each of the ground stations. The downlink carrier frequency is fixe...	11/05/1991
5063577	High-speed bit synchronizer A novel high-speed bit synchronizer circuit comprises a phase detector having two phase detecting loops, each adapted to generate a partial error voltage signal which is summed together to provide a single phase voltage error signal which is employed to c...	11/05/1991
5062071	Programmable gain accumulator A programmable digital gain accumulator is provided with a digital accumulator having approximately the same number of significant bits as the input data stream. The most significant bit of the input data stream is a sign bit coupled to a series cascade o...	10/29/1991
5060180	Programmable digital loop filter A programmable second order loop filter is provided with first and second programmable scaling circuits arranged in parallel and having their outputs connected to first and second programmable one bit serial adders respectively. The output of the second p...	10/22/1991
5051946	Integrated scannable rotational priority network apparatus An integrated priority network is provided for a bus architecture computing system of the type employing a M-Bus connected to a plurality of functional elements. Each functional element has its own integrated priority resolution network (IPRN) coupled to ...	09/24/1991
5046033	System for transferring test program information The present system is employed to generate and transmit information which is needed to construct or assemble truth tables and pertinent data which are directed to associated circuits which require testing. The present method employs a technique whereby in...	09/03/1991
5021971	Reflective binary encoder for vector quantization A binary encoder for vector quantization is provided which comprises a plurality of identical two-level branch selectors connected in a turnaround cascade pipeline array. The upper levels of the two-level selectors are connected in series and the first se...	06/04/1991
5022048	Programmable digital frequency-phase discriminator A present invention novel frequency-phase discriminator has input channels for real and imaginary data which are coupled to two programmable despreaders. The first despreader has its real and imaginary outputs coupled to individual programmable data rate ...	06/04/1991
5022049	Multiple access code acquisition system Apparatus for generating a complex composite code for fast acquisition by multiple access users is provided which comprises a composite code generator having an in-phase channel code generator and a quadrature channel code generator for generating two lin...	06/04/1991
5018170	Variable data rate clock synthesizer A novel digital variable rate clock synthesizer is provided with a novel fractional-N digital phase locked loop. The all digital phase locked loop employs a digital input signal to a phase comparator which has a second input coupled to a digital control o...	05/21/1991
5003552	Carrier aided code tracking loop A fast acquisition coherent code tracking loop for use in direct sequence spread spectrum systems is provided with an embedded frequency offset loop. The frequency offset loop in the code tracking loop is provided with a pair of multipliers, one of which ...	03/26/1991
4998214	Apparatus for line imaging A high speed real time print head controller is provided for supporting a high resolution vector graphics command set which is employed to perform flexible high speed generation of textured line effects. Rows of continuous graphics line information are ge...	03/05/1991
4989175	High speed on-chip clock phase generating system A plurality of synchronized phase generators are provided in a mainframe computer of the type having unit card each of which contain a plurality of very large scale integrated (VLSI) logic chips. Each logic chip has its own on-chip phase generator which i...	01/29/1991
4977581	Multiple frequency clock system A plural clock system for multiple processor configurations is provided which comprises one clock system for each processor. Each pre-synchronized clock system has a strobe unit and multi-phase output generator. Each multi-phase output generator has a str...	12/11/1990

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Attorney: Sowell; John B., Starr; Mark T., Scott; Thomas J.