Bizarre Patents
A forehead support apparatus for resting a standing users forehead against a wall above a bathroom commode or urinal or beneath a showerhead.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 5889436 | Phase locked loop fractional pulse swallowing frequency synthesizer A phase-locked loop (PLL) frequency synthesizer is described which incorporates a fractional pulse swallowing circuit. The fractional pulse swallowing circuit does not add or delete pulses but extends or shortens pulses by a fractional amount. This avoids... | 03/30/1999 |
| 5881067 | Flip-flop design and technique for scan chain diagnosis A modification to conventional scan chain design is disclosed which can identify whether any connection in the scan chain is shorted to the supply voltage or ground (i.e., shorted to a logical 1 or logical 0) and the precise location of the short. Circuit... | 03/09/1999 |
| 5879172 | Surface mounted adapter using elastomeric conductors An adapter for interfacing a tester with the leads of a dual-flatpack or quad-flatpack is disclosed herein. The adapter includes lengths of a conductive elastomer for making electrical contact with the rows of leads extending from the flatpack. The length... | 03/09/1999 |
| 5853804 | Gas control technique for limiting surging of gas into a CVD chamber In one embodiment, a method of forming a barrier layer for contacting a metal interconnect layer to one or more exposed N and P type silicon regions on a wafer. The wafer is heated with a direct radiation source, such as a lamp. To equalize the differing ... | 12/29/1998 |
| 5814995 | Voltage detector for battery operated device A voltage detector is described herein which eliminates an entire operational amplifier or comparator from conventional voltage detectors. In one embodiment of such a voltage detector, a band gap reference generator is connected so as not to incorporate a... | 09/29/1998 |
| 5802076 | Audio error mitigation technique for a TDMA communication system An audio error mitigation technique for a TDMA communication system is disclosed. An audio error is assumed if any one of the following criteria is met: a detection of a CRC error in the control data or audio data within a slot; the received signal streng... | 09/01/1998 |
| 5801657 | Serial analog-to-digital converter using successive comparisons A method for simultaneously performing bit serial analog to digital conversion (ADC) for a potentially very large number of signals is described. The method is ideally suited for performing on chip ADC in area image sensors. In one embodiment, to achieve ... | 09/01/1998 |
| 5779922 | Resistor value control technique A resistivity map is prepared depicting the sheet resistance of a resistive film formed on a wafer as a function of position on the wafer. The resistivity map includes a plurality of zones each of which encompasses a specific range of resistivities of the... | 07/14/1998 |
| 5768317 | Equalization filter compensating for distortion in a surface acoustic wave device The preferred embodiment improves the modulation accuracy of a communication system having a surface acoustic wave (SAW) device filtering a modulated signal. An equalizer filter is used to predistort the signal to be filtered so as to equalize the SAW fil... | 06/16/1998 |
| 5754826 | CAD and simulation system for targeting IC designs to multiple fabrication processes Using the present invention, only a single design and development process needs to be conducted for ICs fabricated using a number of different fabrication processes. In one embodiment of this process, the IC is first designed on a CAD system using a gener... | 05/19/1998 |
| 5747200 | Mask structure having offset patterns for alignment A structure and method are disclosed which allow for a more efficient use of silicon in a wafer fabrication process. In accordance with the present invention, the layout of masks used in the fabrication of circuit dice is modified by re-configuring the op... | 05/05/1998 |
| 5734291 | Power saving technique for battery powered devices An integrated circuit voltage converter containing a capacitive charge pump performing DC to DC conversion is disclosed which detects, either automatically or by an external signal, the onset of a low power consumption situation and switches to a low powe... | 03/31/1998 |
| 5729543 | Sequencer employing conditional logic in a TDMA burst mode controller A multi-tasking, dynamically controlled micro-sequencer for use in a TDMA communication system is described. Rather than the output of the sequencer being solely a linear sequence of instructions in a microcode RAM, the output of the sequencer is augmente... | 03/17/1998 |
| 5726506 | Hot insertion power arrangement A plug-in module receives both primary and alternate power via mating connectors on the module and on the backplane. Multilevel connectors are used so that a module being inserted first receives alternate power and ground before primary power and signal c... | 03/10/1998 |
| 5719524 | Circuit having an input terminal for controlling two functions An integrated circuit providing two output functions from a single output controlled by an input with a single switch responsive to an input level.... | 02/17/1998 |
| 5710538 | Circuit having trim pads formed in scribe channel In accordance with the present invention, trim pads used in trimming on-chip resistive elements are formed in the scribe channels interposed between respective dice on a wafer. Metal traces connect the trim pads to their associated resistive elements form... | 01/20/1998 |
| 5696527 | Multimedia overlay system for graphics and video In the preferred embodiment, the RGB analog signals generated by a VGA card in a personal computer are applied to a first input of an analog multiplexer. The digital video data stored in a video memory buffer on a video card is converted to RGB analog sig... | 12/09/1997 |
| 5681613 | Filtering technique for CVD chamber process gases A method for filtering process gases prior to said process gases being allowed to enter a CVD chamber is provided in order to ensure high purity of the process gases. In one embodiment, the process gases are filtered with a first filter located in a first... | 10/28/1997 |
| 5668813 | Dynamic synchronization code detection window A TDMA communication system having a selectable synchronization code receive window is described. To eliminate any false detections of a synchronization code, a selectable window is created during which the synchronization code is expected to appear. The ... | 09/16/1997 |
| 5648281 | Method for forming an isolation structure and a bipolar transistor on a semiconductor substrate A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 07/15/1997 |
| 5644361 | Subsampled frame storage technique for reduced memory size A video compression system in accordance with the present invention may use a frame buffer which is only a fraction of the size of a full frame buffer. A subsampler connected to an input of the frame buffer performs 4 to 1 subsampling on the video data to... | 07/01/1997 |
| 5644333 | Color key detection scheme for multimedia systems This method is most advantageous when an analog multiplexer is controlled to pass either analog graphics signals or analog motion video signals to a multimedia display screen. In the preferred embodiment, this method includes the steps of outputting a dig... | 07/01/1997 |
| 5625216 | MOS transistor having increased gate-drain capacitance A self-aligned MOS transistor is described in which the gate-drain underdiffusion length is substantially greater than the gate-source underdiffusion length, resulting in a relatively high gate-drain capacitance. This is accomplished by driving in the dra... | 04/29/1997 |
| 5621428 | Automatic alignment of video window on a multimedia screen In the preferred embodiment, a method automatically aligning video data with a video window on a display screen in a multimedia system includes the steps of storing a selected color key in a graphics memory circuit, storing a chroma key in a motion video ... | 04/15/1997 |
| 5618743 | MOS transistor having adjusted threshold voltage formed along with other transistors A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 04/08/1997 |
| 5612834 | Servo burst controller for a magnetic disk A novel disk controller and method performed by a disk controller is disclosed which provides a highly efficient means of interrupting the reading or writing of a field in a sector on a magnetic disk for skipping over a servo burst located anywhere within... | 03/18/1997 |
| 5610433 | Multi-turn, multi-level IC inductor with crossovers A high value inductor with a high Q factor is formed using integrated circuit techniques to have a plurality of layers, where each layer has formed on it two or more coils. The coils in the various layers are interconnected in series. Although the resulti... | 03/11/1997 |
| 5592348 | Method and structure for locating and skipping over servo bursts on a magnetic disk A novel disk controller and method performed by a disk controller is disclosed which provides a highly efficient means of interrupting the reading or writing of a field in a sector on a magnetic disk, for skipping over a servo burst located anywhere withi... | 01/07/1997 |
| 5583061 | PMOS transistors with different breakdown voltages formed in the same substrate A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 12/10/1996 |
| 5581302 | Subsampled frame storage technique for reduced memory size A video compression system in accordance with the present invention may use a frame buffer which is only a fraction of the size of a full frame buffer. A subsampler connected to an input of the frame buffer performs 4 to 1 subsampling on the video data to... | 12/03/1996 |
| 5561398 | LC-tuned voltage controlled ring oscillator A differential delay stage for a ring oscillator utilizes a resonant circuit formed by an inductor and a capacitor consisting of two varactor diodes connected back-to-back. A common cathode connection is connected to a variable voltage source to vary the ... | 10/01/1996 |
| 5559424 | Voltage regulator having improved stability The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This en... | 09/24/1996 |
| 5559044 | BiCDMOS process technology A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 09/24/1996 |
| 5547880 | Method for forming a zener diode region and an isolation region A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 08/20/1996 |
| 5541125 | Method for forming a lateral MOS transistor having lightly doped drain formed along with other transistors in the same substrate A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 07/30/1996 |
| 5541123 | Method for forming a bipolar transistor having selected breakdown voltage A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resist... | 07/30/1996 |
| 5537841 | Earlobe support patch for earrings In a preferred embodiment of the invention, an earlobe support patch is adhesively fixed to the back of a wearer's earlobe to cover the earring hole in the earlobe. The earring post is then inserted through the hole and through the earlobe support patch. ... | 07/23/1996 |
| 5517046 | High voltage lateral DMOS device with enhanced drift region A lateral DMOS transistor structure formed in N-type silicon is disclosed which incorporates a special N-type enhanced drift region. In one embodiment, a cellular transistor with a polysilicon gate mesh is formed over an N epitaxial layer with P body regi... | 05/14/1996 |
| 5514947 | Phase lead compensation circuit for an integrated switching regulator The invention allows a phase lead compensation circuit to be integrated on the same chip as a switching regulator. The invention provides additional phase to the loop gain of the monolithic switching regulator. The additional phase is required near the un... | 05/07/1996 |
| 5506496 | Output control circuit for a voltage regulator The preferred embodiment voltage regulator exhibits improved stability by offsetting changes in the output impedance of the regulator due to changes in load current. This compensation occurs virtually instantaneously with a change in load current. This en... | 04/09/1996 |
