Bizarre Patents
A haircutting appliance comprises an enclosed housing having a hollow handle connecting the housing to a vacuum source to carry away cut hairs from a subject's head.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 5748806 | Deskew circuit in a host interface circuit The host adapter integrated circuit is a one chip high performance bus master host adapter for (i) connecting a first bus having a specified protocol for transferring information over the first bus and a first data transfer speed to a second bus having a ... | 05/05/1998 |
| 5748488 | Method for generating a logic circuit from a hardware independent user description using assignment conditions A method and system are provided for generating a logic network using a hardware independent description means. A logic circuit synthesizer, in response to a user description specifying only signals and the circumstances under which the signals are produc... | 05/05/1998 |
| 5703584 | Analog data acquisition system An analog data acquisition system in an integrated circuit automatically processes and stores analog data without sequencing support from a processor. The analog data acquisition system converts each analog input signal into digital data. The digital data... | 12/30/1997 |
| 5694490 | System and method for a simultaneous multi-band block-stop filter A system and method for a simultaneous multi-band block-stop filter is disclosed. The block-stop filter provides rapid filtering of an input data stream by simultaneously comparing a plurality of data band components to the low threshold, associated with ... | 12/02/1997 |
| 5684972 | Programmable servo burst sequencer for a disk drive An integrated circuit includes a programmable servo burst sequencer that includes an instruction memory, an instruction register, and an address control circuit. The instruction register drives a plurality of output lines of the programmable servo burst s... | 11/04/1997 |
| 5683518 | Rapid thermal processing apparatus for processing semiconductor wafers A novel rapid thermal process (RTP) reactor processes a multiplicity of wafers or a single large wafer, e.g., 200 mm (8 inches), 250 mm (10 inches), 300 mm (12 inches) diameter wafers, using either a single or dual heat source. The wafers or wafer are mou... | 11/04/1997 |
| 5675811 | Method for transmitting information over an intelligent low power serial bus A low power, single master, variable clock rate, daisy-chainable, serial bus connects a bus dispatch in a base station (master) to a chain of one or more daisy-chained peripheral devices (slaves). The bus has a bidirectional serial data line, a bidirectio... | 10/07/1997 |
| 5660488 | Ergonomically condensed QWERTY keyboard An ergonomically improved, reduced size keyboard having a QWERTY keyboard layout allows maintenance of the same typing speed and accuracy associated with conventional keyboards. In one embodiment, the keys of the keyboard are divided into two sections, th... | 08/26/1997 |
| 5659690 | Programmably configurable host adapter integrated circuit including a RISC processor The host adapter integrated circuit is a one chip high performance bus master host adapter for (i) connecting a first bus having a specified protocol for transferring information over the first bus and a first data transfer speed to a second bus having a ... | 08/19/1997 |
| 5657283 | Diagnostic data port for a LSI or VLSI integrated circuit A two-wire dedicated diagnostic data port in an integrated circuit provides visibility for all internal functions of the integrated circuit. An internal signal or signals are written to a serially connected memory in the dedicated diagnostic data port. Th... | 08/12/1997 |
| 5655147 | SCSI host adapter integrated circuit utilizing a sequencer circuit to control at least one non-data SCSI phase without use of any processor A single chip circuit is used in combination with a host system microprocessor to provide host-adapter functions for a SCSI interface. The host adapter integrated circuit includes a 128 byte DMA FIFO, a 8 byte SCSI FIFO, hardwired automatic sequencers for... | 08/05/1997 |
| 5648664 | BIFET vacuum tube replacement structure A BIFET vacuum tube replacement structure includes a plurality of devices that replicate the characteristics of a vacuum tube. The vacuum tube replacement structure has the same pin-out as the vacuum tube being replaced and so can be exchanged directly fo... | 07/15/1997 |
| 5640583 | Programmable servo burst decoder A disk drive controller integrated circuit includes a programmable servo burst decoder that can process any one of a plurality of servo sectors. A disk drive head reads each embedded servo sector on the disk and provides an analog signal, a servo burst, r... | 06/17/1997 |
| 5640538 | Programmable timing mark sequencer for a disk drive A programmable timing mark sequencer automatically analyzes a sequence of data bits on a data input line. If the appropriate timing pattern is detected in the sequence of data bits, the timing mark sequencer drives a signal active on a servo timing mark o... | 06/17/1997 |
| 5612631 | An I/O macrocell for a programmable logic device Each programmable logic device in at least two families of high density segmented programmable array logic device utilizes a programmable switch interconnection matrix to couple an array of symmetric programmable logic blocks. Each programmable logic bloc... | 03/18/1997 |
| 5603031 | System and method for distributed computation based upon the movement, execution, and interaction of processes in a network A distributed computing environment in which agent processes direct their own movement through a computer network. Place processes provide a computing context within which agent processes are interpreted. An agent process controls its movement from one pl... | 02/11/1997 |
| 5594365 | Flexible block clock generation circuit for providing clock signals to clocked elements in a multiple array high density programmable logic device The programmable logic device (PLD) of this invention includes two or more programmable logic blocks interconnected by a programmable switch matrix that includes a programmable input switch matrix (input switch matrix) and a programmable centralized switc... | 01/14/1997 |
| 5592658 | Apparatus and method for computer network clock recovery and jitter attenuation A unit for controlling the data output rate from a device which receives data within a range of input rates. The unit includes an indicator for indicating a level of fullness of the device, first and second clocks which operate at a first and second prede... | 01/07/1997 |
| 5579510 | Method and structure for use in static timing verification of synchronous circuits A universal synchronization element is used in a static timing verification system to represent selected combinational primitive elements, synchronous primitive elements and external primitive elements in the user's synchronous digital circuit. Each of th... | 11/26/1996 |
| 5579274 | Sense circuit for a flash eefprom cell having a negative delta threshold voltage A flash EEPROM array includes a plurality of flash EEPROM cells and the flash EEPROM array has both a low power supply voltage VCC and high speed performance. This high speed performance is achieved by utilizing overerasure, a condition that wa... | 11/26/1996 |
| 5568085 | Unit for stabilizing voltage on a capacitive node A unit for stabilizing the voltage on a capacitive node of a memory array, such as a common node bit line (CNBL), is disclosed. The unit includes an amplifier connected to the CNBL line and to one voltage source and a leaker connected to the CNBL line and... | 10/22/1996 |
| 5564023 | Method for accessing a sequencer control block by a host adapter integrated circuit A busy targets table is created in a memory that can be either internal or external to a SCSI host adapter. Each entry in the table initially is set to a predetermined value. Prior to starting execution of each hardware request block, the host adapter per... | 10/08/1996 |
| 5557229 | Apparatus and method for producing an output signal from a memory array An output device and method of operating it are disclosed. The output device includes a output control unit and an output buffer unit. The output control unit produces a data release (INR) signal after producing an output release (OR) signal, for example,... | 09/17/1996 |
| 5557124 | Flash EEPROM and EPROM arrays with select transistors within the bit line pitch Flash EEPROM array and EPROM arrays are described. The EEPROM array has EEPROM areas with arrays of EEPROM transistors, at least one control area per EEPROM area and columns of a first polysilicon layer traversing the EEPROM and control areas. The columns... | 09/17/1996 |
| 5544107 | Diagnostic data port for a LSI or VLSI integrated circuit A two-wire dedicated diagnostic data port in an integrated circuit provides visibility for all internal functions of the integrated circuit. An internal signal or signals are written to a serially connected memory in the dedicated diagnostic data port. Th... | 08/06/1996 |
| 5530841 | Method for converting a hardware independent user description of a logic circuit into hardware components A method and system are provided for generating a logic network using a hardware independent description means. A logic circuit synthesizer, in response to a user description specifying only signals and the circumstances under which the signals are produc... | 06/25/1996 |
| 5489857 | Flexible synchronous/asynchronous cell structure for a high density programmable logic device A programmable logic device (PLD) cell is used to construct a high density high performance programmable logic device (PLD). The PLD cell includes two programmable logic block cells. The PLD cell also includes an I/O cell and an input macrocell. In additi... | 02/06/1996 |
| 5485104 | Logic allocator for a programmable logic device Each programmable logic device in at least two families of high density segmented programmable array logic device utilizes a programmable switch interconnection matrix to couple an array of symmetric programmable logic blocks. Each programmable logic bloc... | 01/16/1996 |
| 5465034 | Low acoustic noise seeking method and apparatus A silent seek servo controller is used in a low profile miniature disk drive to minimize acoustic noise and the problems associated therewith. The silent seek servo controller of this invention reduces acoustic noise generation at the expense of seek perf... | 11/07/1995 |
| 5459623 | Servo field scheme for high sampling rate and reduced overhead embedded servo systems in disk drives In an embedded servo system for a disk drive, prerecorded servo information in each track of the disk includes a multiplicity of different length servo fields. Each track includes at least two types of servo fields where the first type and the second type... | 10/17/1995 |
| 5457409 | Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices The programmable logic device (PLD) of this invention includes two or more programmable logic blocks interconnected by a programmable switch matrix that includes a programmable input switch matrix (input switch matrix) and a programmable centralized switc... | 10/10/1995 |
| 5457359 | Control for electroluminescent loads A control for an electroluminescent panel which utilizes a resonant switch, preferably comprising two silicon-controlled rectifiers mounted anti-parallel. The amplitude of the output voltage of the resonant switch going the panel is changed by changing th... | 10/10/1995 |
| 5456259 | Ultrasonic transducer arrangement and catheter A catheter (1a, 1b) is provided with an ultrasonic transducer array at its tip (3), the transducer array having been manufactured from an annulus of piezoelectric material (10) by making longitudinal mutually parallel slots (18) in the material.... | 10/10/1995 |
| 5451735 | Flexible circumferential switch A circumferential switch has a flexible electrically conductive band positioned around and separated from an outer circumference of a tubular body so that an air gap is formed between the band and tubular body. The band is electrically connected to a circ... | 09/19/1995 |
| 5450546 | Intelligent hardware for automatically controlling buffer memory storage space in a disk drive An integrated disk controller integrated circuit in a disk drive includes the buffer room logic hardware of this invention within a buffer control circuit. The buffer room logic hardware monitors the status of a buffer memory as data are written into and ... | 09/12/1995 |
| 5444217 | Rapid thermal processing apparatus for processing semiconductor wafers A novel rapid thermal process (RTP) reactor processes a multiplicity of wafers or a single large wafer, e.g., 200 mm (8 inches), 250 mm (10 inches), 300 mm (12 inches) diameter wafers, using either a single or dual heat source. The wafers or wafer are mou... | 08/22/1995 |
