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| Number | Title | Issue Date |
| 6185226 | Integrated twisted pair filter with a secure RIC function A repeater interface controller ("RIC") integrated circuit with integrated filters and buffer drivers is provided for use in a repeater. In one embodiment, the RIC uses two filters to filter link pulse signals and data signals for a plurality of ports. Th... | 02/06/2001 |
| 6146249 | Apparatus and method for polishing a flat surface using a belted polishing pad The present invention relates to an apparatus and method of Chemical Mechanical Planarization ("CMP") for wafer, flat panel display (FPD), and hard drive disk (HDD). The preferred apparatus comprises a looped belt spatially oriented in a vertical directio... | 11/14/2000 |
| 6140246 | In-situ P doped amorphous silicon by NH3 to form oxidation resistant and finer grain floating gates A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may be minimized. Additionally, manufacture of oxidation resi... | 10/31/2000 |
| 6140708 | Chip scale package and method for manufacture thereof An assembly process provides a chip scale package (CSP) which characteristically includes (i) a perforated substrate in which vias can be embedded, (ii) a solder mask on which the integrated circuit die can be attached, and (iii) efficient use of the surf... | 10/31/2000 |
| 6114230 | Nitrogen ion implanted amorphous silicon to produce oxidation resistant and finer grain polysilicon based floating gates A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may be minimized. Additionally, manufacture of oxidation resi... | 09/05/2000 |
| 6111324 | Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package A carrier ring provides a stiffening function for assembling flexible circuits or semi-rigid circuits. The carrier ring is attached to a substrate adapted for attachment of a matrix of semiconductor dies. The carrier ring is provided with mold gates and m... | 08/29/2000 |
| 6104210 | Method for avoiding bus contention in a digital circuit In a digital circuit, a method for avoiding a bus contention condition which results from an overlap of active phases of multiple bus drivers. The method avoids such bus contention condition by including holding amplifiers in the data bus and by turning o... | 08/15/2000 |
| 6099580 | Method for providing performance-driven logic optimization in an integrated circuit layout design A method for optimizing layout design using logical and physical information performs placement, logic optimization and routing and routing estimates concurrently. In one embodiment, circuit elements of the integrated circuit is partitioned into clusters.... | 08/08/2000 |
| 6081823 | Circuit and method for wrap-around sign extension for signed numbers A multiplier has two input value terminals which receive two signed input bit groups. The multiplier also has two output terminals configured to carry a sum and carry bit group representing, in redundant form, a product of the two signed input values. A s... | 06/27/2000 |
| 6081455 | EEPROM decoder block having a p-well coupled to a charge pump for charging the p-well and method of programming with the EEPROM decoder block A block decoder includes a p-well. A low voltage source is coupled to the p-well for asserting a body bias voltage to the p-well. An n-type word line pass transistor is positioned within the p-well and is coupled to a word line for passing programming vol... | 06/27/2000 |
| 6073156 | Circuit and method for wrap-around sign extension for signed numbers using replacement of most significant bit A multiplier is configured to multiply two signed values to generate sum and carry bit groups representing, in redundant form, a product of the first and second signed values. A sign determining circuit is configured generate a sign bit representing a sig... | 06/06/2000 |
| 6067252 | Electrically erasable non-volatile memory cell with no static power dissipation An electrically erasable non-volatile memory cell dissipates virtually no power by disabling a pull-up current when the non-volatile memory cell is programmed. In one embodiment, to properly initialize the electrically erasable non-volatile memory cell, t... | 05/23/2000 |
| 6067125 | Structure and method for film grain noise reduction A video signal is both spatially and temporally filtered. The output video signal is temporally noise reduced in portions of the image which exhibits little or no motion, and is spatially noise reduced in portions where motion exists. This approach is par... | 05/23/2000 |
| 6063668 | Poly I spacer manufacturing process to eliminate polystringers in high density nand-type flash memory devices A layer of polysilicon is deposited over an oxide layer on top of a silicon substrate, with core field oxide and active regions, and patterned. An oxide mask is then added. Next, the oxide mask and the layer of polysilicon are removed from above the core ... | 05/16/2000 |
| 6061511 | Reconstruction engine for a hardware circuit emulator A system and a method provide full visibility to each net of a design under modeling by saving states of the design during modeling and reconstructing waveforms at each net by logic evaluation using the saved states. In one embodiment, primary data input ... | 05/09/2000 |
| 6059643 | Apparatus and method for polishing a flat surface using a belted polishing pad The present invention relates to an apparatus and method of Chemical Mechanical Planarization ("CMP") for wafer, flat panel display (FPD), and hard drive disk (HDD). The preferred apparatus comprises a looped belt spatially oriented in a vertical directio... | 05/09/2000 |
| 6058178 | Method for routing incoming calls to a user's premises on a POTS telephone line When a caller calls a POTS telephone number for a user's premises, the incoming call is selectively routed to any combination of local extensions on the owner's premises, and to remote extensions such as a telephone instrument on another premises, a pager... | 05/02/2000 |
| 6054338 | Low cost ball grid array device and method of manufacture thereof A panel of, for example, bismaleimide triazine (BT) or ceramic (Al2 O3) is chosen in size to be substantially filled with and taken up by end-result ball grid array (BGA) devices. The end-result devices are positioned closely togethe... | 04/25/2000 |
| 6049473 | Harmonic-injection control technique for three-phase, discontinuous-conduction-mode, high-power-factor boost rectifiers with improved line-transient response A three-phase discontinuous-conduction-mode (DCM), pulse-width-modulated (PWM) boost rectifier using harmonic-injection control is provided with a feedforward path to vary the duty cycle of the PWM modulator according to the input voltage, so as to provid... | 04/11/2000 |
| 6043122 | Three-dimensional non-volatile memory A strip of a semiconductor material (for example, P type silicon) is oxidized and the resulting strip of oxide is removed leaving a depression in the upper surface of the semiconductor material which has steep sidewalls. The steep sidewalls do not have si... | 03/28/2000 |
| 6041142 | Analyzer and methods for detecting and processing video data types in a video data stream A video data stream analyzer modifies an input digital video signal so that the resulting output digital signal can be optimally compressed by a digital video encoder. The video data stream analyzer eliminates redundancy in the input video signal, and reo... | 03/21/2000 |
| 6034541 | In-system programmable interconnect circuit A programmable interconnect circuit includes multiple input/output cells, each corresponding to an input/output pin, and a global routing resource for routing signals received at the input pins to be output as output signals at output and bi-directional p... | 03/07/2000 |
| 6031927 | Analyzer and methods for detecting and processing video data types in a video data stream A video data stream analyzer modifies an input digital video signal so that the resulting output digital signal can be optimally compressed by a digital video encoder. The video data stream analyzer eliminates redundancy in the input video signal, and reo... | 02/29/2000 |
| 6028446 | Flexible synchronous and asynchronous circuits for a very high density programmable logic device A programmable logic device (PLD) cell is used to construct a high density high performance programmable logic device (PLD). The PLD cell includes two programmable logic block cells. The PLD cell also includes an I/O cell and an input macrocell. In additi... | 02/22/2000 |
| 6005804 | Split voltage for NAND flash An EEPROM NAND array has floating gate memory cells coupled in series, each having a control gate, a floating gate, a body region, and an insulating layer between the floating gate and the body region. A negative charge pump is coupled to the body region.... | 12/21/1999 |
| 6000997 | Temperature regulation in a CMP process Heat is transferred between a linear CMP belt and an adjacent heat transfer source, providing a predetermined lateral temperature distribution across the belt. Temperature sensors generate feedback signals to control the heat transfer sources. Alternative... | 12/14/1999 |
| 5999179 | Platform independent computer network management client A client-server network management system includes: a plurality of managed computer network elements, a managed element server that executes on a first computer; and at least one managed element server client that typically executes on a second computer. ... | 12/07/1999 |
| 5994718 | Trench refill with selective polycrystalline materials A trench refill for a semiconductor device is undertaken by depositing polycrystalline Ge or Gex Si1-x alloy at temperatures as low as 500° C. The structure is then oxidized at for example 700° C. to obtain a cap oxide on the trenc... | 11/30/1999 |
| 5990827 | Structure of a position processing apparatus A method and apparatus for determining attitude information using a down conversion reference and a carrier phase and code phase generator. The apparatus uses individual phase registers for signal received from each antenna to solve the phase difference c... | 11/23/1999 |
| 5973569 | Short-circuit protection and over-current modulation to maximize audio amplifier output power A Class D amplifier includes a tracking circuit and a regulation circuit to provide efficient, accurate protection against excessive current flow in the power FET's of the amplifier output stage. The FET currents flowing in the output stage are mirrored a... | 10/26/1999 |
| 5958042 | Grouping logic circuit in a pipelined superscalar processor A pipelined instruction dispatch or grouping circuit allows instruction dispatch decisions to be made over multiple processor cycles. In one embodiment, the grouping circuit performs resource allocation and data dependency checks on an instruction group, ... | 09/28/1999 |
| 5929649 | Method and apparatus for electrical parasitic measurement of pin grid array The present method and apparatus for electrically characterizing a pin grid array includes a plurality of conductive caps which may be removably fitted over chosen pins of the pin grid array, and a conductive fixture having a plurality of passages thereth... | 07/27/1999 |
| 5926064 | Floating MOS capacitor A structure is provided to create a voltage-independent capacitive structure using a typical MOS fabrication process. The capacitive structure includes two FET devices connected in series by having their source, drain, and body terminals all coupled toget... | 07/20/1999 |
| 5923784 | Analyzer and methods for detecting and processing video data types in a video data stream A video data stream analyzer modifies an input digital video signal so that the resulting output digital signal can be optimally compressed by a digital video encoder. The video data stream analyzer eliminates redundancy in the input video signal, and reo... | 07/13/1999 |
| 5917369 | Pulse width modulator with automatic gain control over-voltage modulator and limiter A pulse-width modulation (PWM) circuit in a Class D audio amplifier includes output-limiting logic and an automatic gain control (AGC) circuit. When an out-of-range, or overmodulated, input signal is received by the PWM, mono-stable multivibrator circuits... | 06/29/1999 |
| 5898904 | Two-way wireless data network having a transmitter having a range greater than portions of the service areas A two-way data network includes a broadcast control sub-network and a cellular data sub-network. The broadcast control sub-network includes a few high-power radio transmitters broadcasting into a large service area. The cellular data sub-network covers th... | 04/27/1999 |
| 5893742 | Co-implantation of arsenic and phosphorus in extended drain region for improved performance of high voltage NMOS device A high voltage NMOS device includes an extended drain region formed by implantation of arsenic and phosphorus and a drivein of both the species. The dosage of arsenic is substantially higher than the dosage of phosphorus, so that upon drivein, the slower ... | 04/13/1999 |
| 5894108 | Plastic package with exposed die A molded plastic package incorporates a lead frame which includes a plurality of leads radially aligned around a central opening. A die is mounted in the central opening and is electrically connected to the leads by wire bonding. A molded plastic casing i... | 04/13/1999 |
| 5886899 | Method for analyzing the performance of a microprocessor A method for analyzing the performance of a logic circuit driven by a clock signal, such as a microprocessor, identifies a number of operations of interest in a logic circuit and represents the presence of each of such operations by a different symbol. On... | 03/23/1999 |
| 5870585 | Design for a simulation module using an object-oriented programming language A register transfer level (RTL) model is created using an object-oriented programming language. In that RTL model, a logic circuit can be represented by a hierarchy of objects ("modules") each having representation of state elements, input signals, output... | 02/09/1999 |
