Did You Know...
...that two musicians were responsible for the invention of color print film? Fascinated by photography, Leopold Godowsky and Leopold Mannes worked together to produce an easy-to-use, practical color film. They worked full time as music teachers and gave concerts while experimenting during their off hours in Mannes' kitchen. Their success earned them full-time, well-paying jobs at Kodak and their efforts resulted in Kodachrome film, which was introduced in 1935.
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| Number | Title | Issue Date |
| 8138062 | Electrical coupling of wafer structures A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the se... | 03/20/2012 |
| 8099729 | Method and device for creating and using pre-internalized program files A device (45) receives new program files (46) and uses pre-internalized images to avoid having to internalize a program file every time that program execution occurs. In one embodiment, a software Virtual Machine (50) in the device functions to ... | 01/17/2012 |
| 8064329 | Control and data information communication in a wireless system A method of transmitting data information and control information is provided. The method includes encoding the control information and encoding the data information. The method further includes modulating the control information and modulating the data information.... | 11/22/2011 |
| 8048738 | Method for forming a split gate device A method for forming a semiconductor device includes forming a dielectric layer over a substrate. The method further includes forming a select gate layer over the dielectric layer. The method further includes etching the select gate layer at a first etch rate to for... | 11/01/2011 |
| 8044494 | Stackable molded packages and methods of making the same A first packaged integrated circuit (IC) includes a package substrate, at least one IC die attached to a first surface of the package substrate, a plurality of conductive members on the first surface at least partially surrounding the at least one IC die and electri... | 10/25/2011 |
| 8018259 | Phase-locked loop having a feedback clock detector circuit and method therefor A method for a phase-locked loop (PLL) in an integrated circuit, wherein the PLL comprises a voltage-controlled oscillator (VCO). The method includes, in a training mode: (1) setting a control voltage of the VCO at a first voltage level; (2) increasing the control v... | 09/13/2011 |
| 8008964 | Variable input voltage charge pump A device for providing a constant output voltage based on a variable input voltage is provided. The device may include: (1) a charge-pump comprising a plurality of cells, wherein each of the plurality of cells can be configured as an input cell, a stepping cell, or ... | 08/30/2011 |
| 7960814 | Stress relief of a semiconductor device A semiconductor device includes a die including an active region, a scribe region, and a perimeter, wherein the scribe region is closer to the perimeter than the active region. In one embodiment, the die further comprises a crack arrest structure formed in the scrib... | 06/14/2011 |
| 7927934 | SOI semiconductor device with body contact and method thereof A method including providing a substrate and providing an insulating layer overlying the substrate is provided. The method further includes providing a body region comprising a body material overlying the insulating layer. The method further includes forming at leas... | 04/19/2011 |
| 7923769 | Split gate non-volatile memory cell with improved endurance and method therefor A non-volatile memory cell including a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region is provided. The non-volatile memory cell further includes a select gate structure overlyi... | 04/12/2011 |
| 7923328 | Split gate non-volatile memory cell with improved endurance and method therefor A non-volatile memory cell including a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region is provided. The non-volatile memory cell further includes a select gate structure overlyi... | 04/12/2011 |
| 7859068 | Integrated circuit encapsulation and method therefor A device (12) may have a pressure sensitive portion (17) which is protected from corrosion by a pressure transmitting material (20). Pressure transmitting material (20) may also be used to transmit pressure to pressure sensitive portion (... | 12/28/2010 |
| 7830066 | Micromechanical device with piezoelectric and electrostatic actuation and method therefor A MEMS device uses both piezoelectric actuation and electrostatic actuation and also provides enough electrostatic force to enable very low voltage operation. As the electrostatic actuation uses DC and the piezoelectric actuation uses high frequency, the structure o... | 11/09/2010 |
| 7817387 | MIGFET circuit with ESD protection An electrostatic discharge (ESD) protected circuit is coupled to a power supply voltage rail and includes a multiple independent gate field effect transistor (MIGFET), a pre-driver, and a hot gate bias circuit. The MIGFET has a source/drain path coupled between an o... | 10/19/2010 |
| 7809980 | Error detector in a cache memory using configurable way redundancy A data processing system includes a processor having a multi-way cache which has a first and a second way. The second way is configurable to either be redundant to the first way or to operate as an associative way independent of the first way. The system may further... | 10/05/2010 |
| 7802471 | Liquid level sensing device and method A liquid level sensor device (10) includes a liquid level sensor element (14), a capacitance-to-voltage converter (16), and a controller (18). The liquid level sensor element (14) comprises (i) at least two sets of N conductive ele... | 09/28/2010 |
| 7802038 | Communication steering for use in a multi-master shared resource system New approaches for providing communication between multiple masters (12, 14) and one or more shared resources (24, 30, 100) are needed. One example of a resource that may need to be shared is circuitry complying with the Universal Serial Bus (USB) stan... | 09/21/2010 |
| 7799650 | Method for making a transistor with a stressor A method for forming a semiconductor device on a semiconductor material layer includes forming a gate structure over the semiconductor material layer. The method further includes forming a first nitride spacer adjacent to the gate structure and forming source/drain ... | 09/21/2010 |
| 7793172 | Controlled reliability in an integrated circuit Methods and systems for configuring characteristics associated with at least one portion of a memory array comprising addressable units are provided. In one aspect, a method for controlling a power supply voltage for a memory array comprises detecting whether an err... | 09/07/2010 |
| 7787323 | Level detect circuit A detect circuit may be used to detect one or more characteristics corresponding to the fuse being programmed. When the one or more characteristics of the fuse being programmed reach the desired states or values, the programming of the fuse is discontinued. Thus, th... | 08/31/2010 |
| 7747889 | Bus having a dynamic timing bridge A data processing system may comprise an initiator device having an output whose timing is referenced by a clock input alone corresponding to a first delay along a signaling path. The exemplary data processing system further may further comprise a target device havi... | 06/29/2010 |
| 7746716 | Memory having a dummy bitline for timing control A memory having at least one memory array block, the at least one memory array block comprising N wordlines, wherein N is greater than one, is provided. The memory comprises a plurality of sense amplifiers coupled to the at least one memory array block. The memory f... | 06/29/2010 |
| 7739674 | Method and apparatus for selectively optimizing interpreted language code In one embodiment of the present invention an interpreted language, such as, for example, Java, is selectively optimized by partitioning the interpreted language code (98) into a plurality of blocks (80-83) based on the complexity of each of the... | 06/15/2010 |
| 7737740 | Integrated circuit with a programmable delay and a method thereof An integrated circuit including a first circuit block having a power supply terminal for receiving a first power supply voltage and an output terminal for providing a first data signal is provided. The integrated circuit further includes a second circuit block havin... | 06/15/2010 |
| 7733258 | Data conversion circuitry for converting analog signals to digital signals and vice-versa and method therefor A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data conv... | 06/08/2010 |
| 7727870 | Method of making a semiconductor device using a stressor A method for forming a semiconductor device includes providing a substrate and forming a p-channel device and an n-channel device, each of the p-channel device and the n-channel device comprising a source, a drain, and a gate, the p-channel device having a first sid... | 06/01/2010 |
| 7709331 | Dual gate oxide device integration A method of forming devices including forming a first region and a second region in a semiconductor substrate is provided. The method further includes forming a semiconductive material over the first region, wherein the semiconductive material has a different electr... | 05/04/2010 |
| 7688656 | Integrated circuit memory having dynamically adjustable read margin and method therefor A method for dynamically controlling sense amplifier differential margin of a memory during operation, in an integrated circuit, including a plurality of addressable units, is provided. The method includes setting the sense amplifier differential margin correspondin... | 03/30/2010 |
| 7687370 | Method of forming a semiconductor isolation trench A method for forming a semiconductor isolation trench includes forming a pad oxide layer over a substrate and forming a barrier layer over the substrate. A masking layer is formed over the barrier layer and is patterned to form at least one opening in the masking la... | 03/30/2010 |
| 7681078 | Debugging a processor through a reset event A method for operating a processor in data processing system comprises: asserting a debug control signal to cause the processor to enter a debug operating mode; initializing a plurality of shared processor resources with debug configuration information, wherein the ... | 03/16/2010 |
| 7676204 | Radio receiver having ignition noise detector and method therefor An AM receiver including an AM demodulator for demodulating an AM signal received by an antenna coupled to the AM demodulator is provided. The AM receiver further includes a bandpass filter for receiving the demodulated signal and generating a bandpass filtered sign... | 03/09/2010 |
| 7657682 | Bus interconnect with flow control A method of operating a bus interconnect coupled to bus masters and bus slaves is provided. The method includes receiving a request from a bus master to perform a bus transaction associated with a transaction ID with a bus slave of the plurality of bus slaves, the b... | 02/02/2010 |
| 7638903 | Power supply selection for multiple circuits on an integrated circuit An integrated circuit comprising a plurality of circuits is provided. The integrated circuit further comprises a plurality of power circuits, wherein each of the plurality of power circuits can supply a selected voltage to at least one of the plurality of circuits. | 12/29/2009 |
| 7624329 | Programming a memory device having error correction logic Methods and apparatus for programming a non-volatile memory array comprising addressable units are provided. The addressable units are configured to store at least a main portion and an error correction portion. An exemplary method for programming the non-volatile m... | 11/24/2009 |
| 7545702 | Memory pipelining in an integrated circuit memory device using shared word lines A method for pipelining a memory in an integrated circuit includes providing a first clock phase and providing a second clock phase, wherein the first clock phase and the second clock phase are at least partially non-overlapping. The method further includes providin... | 06/09/2009 |
| 7521314 | Method for selective removal of a layer A method for forming a semiconductor device includes forming a liner over a semiconductor material including a control electrode. The method further includes forming a first spacer adjacent to the control electrode, wherein the first spacer has a first width. The me... | 04/21/2009 |
| 7518933 | Circuit for use in a multiple block memory A portion of a memory may include a first memory block, including a first memory cell coupled to a first memory data line, a second memory block, including a second memory cell coupled to a second memory data line, and a latch, having a first terminal and a second t... | 04/14/2009 |
| 7500152 | Apparatus and method for time ordering events in a system having multiple time domains A system and method time orders events that occur in various portions of the system (10) where different time domains (12, 22, 32) exist. Timestamping circuitry (e.g. 40) is provided in each of a plurality of functional circuits or modules (1... | 03/03/2009 |
| 7474585 | Memory with serial input-output terminals for address and data and method therefor A memory (10) has a plurality of memory cells, a serial address port (47) for receiving a low voltage high frequency differential address signal, and a serial input/output data port (52, 54) for receiving a high frequency low voltage differentia... | 01/06/2009 |
| 7446001 | Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed A method for making a semiconductor device includes patterning a semiconductor layer, overlying an insulator layer, to create a first active region and a second active region, wherein the first active region is of a different height from the second active region, an... | 11/04/2008 |
