...that the inventor of the electric motor was a blacksmith named Thomas Davenport? Described as "a brilliantly unsuccessful inventor", Davenport invented the first rotary electric motor. In 1836 he headed out -- on foot -- from his Vermont home to file a patent application at the Patent Office in Washington, D.C. By the time he got there, he had squandered away his money and couldn't afford the $30 filing fee so he turned around and went home. When he later mailed in his application with money he'd raised, the Patent office was destroyed in a fire. He did finally get credit for his invention on Feb. 5, 1837.
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| Number | Title | Issue Date |
| 7035968 | Content addressable memory with range compare function A content addressable memory (CAM) device having a range compare function. A boundary value is stored within a plurality of CAM cells within the CAM device. A range compare operation is performed to determine whether a comparand is greater than the boundary value. A... | 04/25/2006 |
| 7020457 | System and method for proxy-enabling a wireless device to an existing IP-based service An intermediate server or system having knowledge of application program protocols used by the application programs in a person's (i.e., user's) wireless device is used to translate information communicated with the device in accordance with a transport-level protoc... | 03/28/2006 |
| 6978343 | Error-correcting content addressable memory A content addressable memory (CAM) device having an error correction function. The CAM device includes an array of CAM cells, row parity storage elements and column parity storage elements. The row parity storage elements store row parity values that correspond to c... | 12/20/2005 |
| 6973038 | System and method for real-time buying and selling of internet protocol (IP) transit An apparatus and method are described for real-time buying and selling of bandwidth at differentiated quality of service levels, routing of excess traffic over the bandwidth purchased in real time, and billing and settlement of the transactions. In the present inven... | 12/06/2005 |
| 6967855 | Concurrent searching of different tables within a content addressable memory A method and apparatus are described for the filtering of a common input string to generate various filtered comparand strings. The filtering of a common input string enables concurrent lookups in different tables to be performed on multiple filtered comparands by d... | 11/22/2005 |
| 6961810 | Synchronous content addressable memory A CAM device to perform in one clock cycle: (1) receive comparand data from a comparand bus; (2) receive an instruction; (3) perform the comparison of the comparand data with a first group of CAM cells; (4) generate a match address for a location in the CAM array th... | 11/01/2005 |
| 6954837 | Consolidation of allocated memory to reduce power consumption A memory system includes physical memory devices or ranks of memory devices that can be set to reduced power modes. In one embodiment, a hardware memory controller receives memory instructions in terms of a logical address space. In response to the relative usages o... | 10/11/2005 |
| 6952732 | Method and apparatus for multi-contact scheduling A method and apparatus for generating an agent schedule for a multi-contact center that has immediate queues and deferred queues. In one embodiment, a method includes scheduling software receiving a plurality of scheduling data from a user interface, and the schedul... | 10/04/2005 |
| 6944039 | Content addressable memory with mode-selectable match detect timing A content addressable memory (CAM) device with mode-selectable match detect timing. The CAM device includes a plurality of rows of CAM cells coupled to respective match lines. Storage circuits are coupled to the match lines and configured to store match indications ... | 09/13/2005 |
| 6944040 | Programmable delay circuit within a content addressable memory An apparatus having an output register coupled to a content addressable memory (CAM) array. The output register may be configured to output data based on a delayed clock signal. A programmable delay circuit may be coupled to receive a reference clock signal and gene... | 09/13/2005 |
| 6943060 | Method for fabricating integrated circuit package with solder bumps A semiconductor package with solder bumps and a method for making the same are described. One embodiment comprises a flip-chip design with a rectangular semiconductor die with a relatively large aspect ratio bonded to a substantially square substrate through solder ... | 09/13/2005 |
| 6943773 | Page flicking mechanism for electronic display devices that paginate content A computing device is provided that includes a display comprising a plurality of discrete elements. A memory is used to store a data collection of paginated content. A processor of the computing device is configured to retrieve each of the pages from the memory. The... | 09/13/2005 |
| 6944709 | Content addressable memory with block-programmable mask write mode, word width and priority A content addressable memory (CAM) device comprising a plurality of CAM blocks and a block control circuit. The plurality of CAM blocks each includes an array of CAM cells to store data words and an array of priority number storage circuits to store priority numbers... | 09/13/2005 |
| 6933610 | Method of bonding a semiconductor die without an ESD circuit and a separate ESD circuit to an external lead, and a semiconductor device made thereby In a semiconductor device having a semiconductor die without an ESD circuit and a separate ESD circuit and an external lead, the external lead is first bonded to the separate ESD circuit. Thereafter, the separate ESD circuit is bonded to the semiconductor die. As a ... | 08/23/2005 |
| 6934795 | Content addressable memory with programmable word width and programmable priority A content addressable memory (CAM) device including a CAM array and a priority index table. The CAM array has a plurality of rows of CAM cells, each row including a plurality of row segments and being adapted to store a data word that spans a selectable number of th... | 08/23/2005 |
| 6934796 | Content addressable memory with hashing function A content addressable memory (CAM) device having a memory, a hash index generator to associate a search value with a unique location within a memory, and a compare circuit. The index generator generates an index based on the search value. The memory receives the ind... | 08/23/2005 |
| 6925467 | Byte-level file differencing and updating algorithms A method for performing differencing and updating between electronic files is provided. A byte-level file differencing algorithm receives two byte streams corresponding to an original file and a new file. The new file includes updated and revised versions of the ori... | 08/02/2005 |
| 6924752 | Three-dimensional contact-sensitive feature for electronic devices An electronic device is formed at least partially from a deflectable material that generates an electrical signal in response to contact. The first material is integrated with a display module to provide a shaped feature on the exterior surface of the display module... | 08/02/2005 |
| 6914795 | Content addressable memory with selective error logging A content addressable memory (CAM) device with selective error logging. The CAM device includes a CAM array and an error detection circuit coupled to receive a data value from a selected storage location within the CAM array, the error detection circuit being adapte... | 07/05/2005 |
| 6903953 | Content addressable memory with cascaded array A content addressable memory (CAM) device having a cascaded CAM array. The cascaded CAM array includes a first array of CAM cells and a second array of CAM cells. A first plurality of compare signal lines is coupled to the first array CAM cells and a second pluralit... | 06/07/2005 |
| 6901000 | Content addressable memory with multi-ported compare and word length selection A content addressable memory device having an array of multi-compare CAM cells. First and second compare operations are simultaneously performed in the array of multi-compare CAM cells to generate first and second sets of match signals. The first set of match signal... | 05/31/2005 |
| 6898099 | Content addressable memory having dynamic match resolution A content addressable memory (CAM) architecture. For one embodiment, the CAM architecture includes a plurality of rows of CAM cells, each row configured to generate match results on a corresponding match line, a number of comparand lines, each coupled to a correspon... | 05/24/2005 |
| 6891272 | Multi-path via interconnection structures and methods for manufacturing the same A multilayered circuit component includes one or more substrates. A first surface of one of the substrates includes circuit paths and other current carrying elements. A second surface of the same or another substrate also includes circuit paths and other current car... | 05/10/2005 |
| 6892272 | Method and apparatus for determining a longest prefix match in a content addressable memory device A method and apparatus for determining a longest prefix match in a content addressable memory (CAM) device is described. The CAM device includes a CAM array that may be arbitrarily loaded with CIDR addresses that are not prearranged prior to their entry into the CAM... | 05/10/2005 |
| 6888532 | Automatic orientation-based user interface for an ambiguous handheld device An electronic device is provided that includes a user-interface feature, a detection mechanism and one or more internal components. The user-interface feature is configurable to have a selected orientation about one or more axes. The detection mechanism can detect o... | 05/03/2005 |
| 6884120 | Array connector with deflectable coupling structure for mating with other components A connector is described which uses a coupling structure integrally formed from a plurality of discrete elements that are aligned to receive an insertion force. In response to the insertion force affecting some or all of the elements, the affected elements move from... | 04/26/2005 |
| 6876775 | Technique for removing blurring from a captured image A technique is provided for removing blurring from an image captured by an imaging device. The imaging device may include a lens and an imaging medium comprised of a plurality of imaging pieces. According to an embodiment, a distance is determined between individual... | 04/05/2005 |
| 6876559 | Block-writable content addressable memory device A content addressable memory device including a memory to store a searchable database, a search circuit, and a first-in-first-out storage circuit. The search circuit generates a plurality of address values that correspond to unoccupied storage locations within the m... | 04/05/2005 |
| 6876766 | Reshaping freehand drawn lines and shapes in an electronic document The invention improves the appearance of freehand drawn lines and shapes in an electronic document by first recognizing freehand drawn lines and shapes and generating a line made up of sequential straight line segments for the freehand drawn line when the line does ... | 04/05/2005 |
| 6869304 | Connector scheme for use with handheld computers and accessory devices A connector assembly is provided for use with a handheld computing system. The connector assembly includes a first connector including a plurality of contact elements. The first connector is adapted to reside on a handheld computer. A first coupling structure reside... | 03/22/2005 |
| 6865076 | Electronically-enabled housing apparatus for a computing device An electronically-enabled encasement for a handheld computer is provided. The encasement includes an encasement portion configured to cover at least a portion of the handheld computer, including a front surface of the handheld computer providing access to a display;... | 03/08/2005 |
| 6865121 | Programmable delay circuit within a content addressable memory An apparatus including a content addressable memory (CAM) array, a clocked circuit coupled to the CAM array, and a programmable delay circuit coupled to receive a reference clock signal and generate a programmable delayed clock signal using a delay element for the c... | 03/08/2005 |
| 6859831 | Method and apparatus for internetworked wireless integrated network sensor (WINS) nodes The Wireless Integrated Network Sensor Next Generation (WINS NG) nodes provide distributed network and Internet access to sensors, controls, and processors that are deeply embedded in equipment, facilities, and the environment. The WINS NG network is a new monitorin... | 02/22/2005 |
| 6859462 | Minimization and optimization of overall data transfer connect time between handheld wireless communicating devices and remote machines A sender platform and a receiver platform, at least one of which is a handheld wireless communicating device, communicate digital data packets that are grouped into sequentially transmitted transactions. The data packets include not only the information to be commun... | 02/22/2005 |
| 6856527 | Multi-compare content addressable memory cell A method and apparatus for simultaneously performing a plurality of compare operations in a content addressable memory (CAM) device. For one embodiment, the CAM device includes first and second memory cells to store first and second data, and first and second compar... | 02/15/2005 |
| 6845026 | Thyristor-based content addressable memory (CAM) cells A content addressable memory (CAM) cell includes a memory cell storing data values. The memory cell includes a surrounding-gate thyristor and an access transistor. The CAM cell also includes a compare circuit coupled among the memory cell and a match line. The compa... | 01/18/2005 |
| 6842358 | Content addressable memory with cascaded array A content addressable memory (CAM) device having a cascaded CAM array. The cascaded CAM array includes a first array of CAM cells and a second array of CAM cells. A first plurality of compare signal lines is coupled to the first array CAM cells and a second pluralit... | 01/11/2005 |
| 6842360 | High-density content addressable memory cell A content addressable memory (CAM) cell. The CAM cell includes a first and second memory cells and a diffusion region. First and second transistors are formed adjacent one another in the diffusion region and coupled to the first memory cell, and third and fourth tra... | 01/11/2005 |
| 6836657 | Upgrading of electronic files including automatic recovery from failures and errors occurring during the upgrade A portable communication device is provided that receives upgrade files via at least one wireless coupling. The contents of the upgrade file include information to repair errors in software components of the portable communication device and/or information to upgrad... | 12/28/2004 |
| 6832251 | Method and apparatus for distributed signal processing among internetworked wireless integrated network sensors (WINS) The Wireless Integrated Network Sensor Next Generation (WINS NG) nodes provide distributed network and Internet access to sensors, controls, and processors that are deeply embedded in equipment, facilities, and the environment. The WINS NG network is a new monitorin... | 12/14/2004 |