Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 4855743 | Analog interface system An analog interface system interfaces with a digital signal processor. The system receives analog signals, digitizes those signals and transmits them to the signal processor upon completion of the conversion. The system directs transmission of digital dat... | 08/08/1989 |
| 4853895 | EEPROM including programming electrode extending through the control gate electrode An electrically erasable, programmable read only memory (EEPROM) having an erase window directly overlying both a control gate layer (24) and a column line (12) is disclosed. Column lines (12) are implanted into a semiconductor substrate (16) and covered ... | 08/01/1989 |
| 4853842 | Computer memory system having persistent objects A uniform memory system for use with symbolic computers has a very large virtual address space. No separate files, not directly addressable in the address space of the virtual memory, exist. A special object, the peristent root, defines memory objects whi... | 08/01/1989 |
| 4853564 | GaAs monolithic true logarithmic amplifier A GaAs monolithic true logarithmic amplifier which includes at least one amplifier stage common to the two arms of the circuit, the two arms being independent thereafter, one having lower gain and higher compression point and the other arm having higher g... | 08/01/1989 |
| 4853503 | Pressure switch apparatus having improved longevity and widened tolerance for location of stationary contact An automotive transmission control is shown having pressure switches to sense the state of actuation of solenoid valves to provide logic signals to a microprocessor type of transmission control. The pressure switches, which sense the pressure of hydraulic... | 08/01/1989 |
| 4852083 | Digital crossbar switch A digital crossbar switch for switching data from an input/output data bus to an internal data bus and to the same or another input/output data bus which includes a plurality of multiplexer logic units, an m-bit internal data bus coupled to each of said m... | 07/25/1989 |
| 4852059 | Content addressable memory A content addressable memory consists of a plurality of memory units each of which may be an integrated circuit. Each unit receives an input group of digits forming all or part of an input key code, and compares it simultaneously with a plurality of equal... | 07/25/1989 |
| 4851886 | Binary superlattice tunneling device and method A resonant tunneling diode (30) with anode (40) and cathode (32) separated by binary short-period superlattice tunneling barriers (34,38) with a quantum well (36) between is disclosed. Enhancement and depletion mode diodes are disclosed.... | 07/25/1989 |
| 4851715 | Schottky-clamped transistor logic buffer circuit A high speed interstage STL buffer (27) is disclosed having a low threshold and high driving capability. A first Schottky-clamped grounded emitter transistor (28) receives input signals through a Schottky steering diode (38) and inverts the input signal. ... | 07/25/1989 |
| 4851360 | NMOS source/drain doping with both P and As A process for forming N-channel MOS sources and drains, by implanting both phosphorus and arsenic. The high diffusivity of phosphorus causes it to diffuse in advance of the bulk of the arsenic, so that, after annealling, the source/drain regions have grad... | 07/25/1989 |
| 4851311 | Process for determining photoresist develop time by optical transmission A reflective beam of light is used to analyze the optical transmission properties of a developer fluid during puddle develop of photoresist polymer for detercting the process endpoint.... | 07/25/1989 |
| 4849920 | Apparatus for locating and representing the position of an end "1" bit of a number in a multi-bit number format The position of an end "1" bit in an input number is detected by applying the inverted bits in parallel to inputs of respective NOR gates (61 to 68), the other inputs of which are connected to the nodes of a chain of dynamic field effect transistors (A1 t... | 07/18/1989 |
| 4849757 | Integrated dual-slope analog to digital converter with r/c variance compensation A dual-slope A/D converter circuit has an oscillator (14) whose timing frequency is determined by the value of an oscillator resistor (70) and a oscillator capacitor (72). An integrator (66) integrates an input voltage at a rate determined by an integrati... | 07/18/1989 |
| 4848090 | Apparatus for controlling the temperature of an integrated circuit package A thermoelectric heat pump is used to maintain the temperature of an integrated circuit under test. Temperature sensors placed on two sides of the integrated circuit measure and generate signals indicative of the temperature at the two surfaces, and the a... | 07/18/1989 |
| 4849067 | Method for etching tungsten A fluorine based metal etch chemistry, wherein an admixture of etch products (or species which are closely related to etch products) is added during the post etch stage, i.e. during the stage when the pattern has partially cleared by overetch is not yet c... | 07/18/1989 |
| 4849068 | Apparatus and method for plasma-assisted etching An apparatus for reactive ion etching or plasma etching wherein the wafer faces downward. The process gas is supplied through a distributor which is below the wafer and has orifices pointing away from the wafer. The vacuum (exhaust) port is below the dist... | 07/18/1989 |
| 4849248 | Ion implantation method for making silicon-rich silicon dioxide film A silicon dioxide film containing additional silicon in the form of segregates having controlled grain sizs is fabricated by forming a silicon dioxide, injecting silicon ions into the silicon dioxide film by ion implantation with a predetermined ion accel... | 07/18/1989 |
| 4849370 | Anodizable strain layer for SOI semiconductor structures A silicon on insulator semiconductor structure employs a strain layer fabricated of an electrically inactive material. The strain layer comprises silicon with a germanium additive to produce a sublayer exhibiting a low breakdown voltage and thus effective... | 07/18/1989 |
| 4846704 | Test socket with improved contact engagement A test socket has movable contact elements blanked from sheet metal to provide each element with a mounting leg part, a contact part at an edge of the blanked sheet metal, and a resilient curved part between the leg and contact parts permitting the contac... | 07/11/1989 |
| 4847792 | Process and apparatus for detecting aberrations in production process operations An apparatus and process for detecting aberrations in production process operations is provided. In one embodiment, operations of a plasma etch reactor (10) are monitored to detect aberrations in etching operations. A reference end-point trace (EPT) is de... | 07/11/1989 |
| 4845387 | Non-stacked ECL type and function A logic circuit which includes first and second differentially connected amplifying devices having first and second complementary output voltage nodes. Means for limiting the output voltage swing of the devices at the output nodes to a predetermined range... | 07/04/1989 |
| 4845675 | High-speed data latch with zero data hold time A data latch with substantially zero hold time and with immunity to input data changes occurring after the latch has slewed toward a definable logic state. An input data flip-flop (10) is coupled via transfer transistors (40, 42) to an output data flip-fl... | 07/04/1989 |
| 4845536 | Transistor structure The invention relates to a field-effect transistor (1;20) with insulated gate electrode (9;30) which comprises in a semiconductor body (5) a drain diffusion zone (2) connected to a drain electrode (6;32) and a source diffusion zone (3) which is disposed s... | 07/04/1989 |
| 4845047 | Threshold adjustment method for an IGFET Polysilicon gate insulated gate field effect transistors with threshold adjustment implants made after the gate oxide (156) and a split of the polysilicon gate (158) have been formed provides a shallow, tight dopant profile.... | 07/04/1989 |
| 4844773 | Process for etching silicon nitride film A process for etch of polysilicon films which utilizes the combination of remote and in situ plasma in a low pressure process module and the plasma is generated form a mixture of a source of Fluorine and Helium with the process chamber within the process ... | 07/04/1989 |
| 4842991 | Self-aligned nonnested sloped via A via (64, 66, 68) comprises a conductor (45, 46, 48) having a first surface (58, 60, 62) and at least one second surface (49) that forms at least one edge (52) with the first surface (58, 60, 62). A first insulator layer (33) is formed on the first surfa... | 06/27/1989 |
| 4842675 | Integrated circuit isolation process A multiple recess isolation technology avoids stress induced defects while providing a substantially planar surface. A silicon substrate (10) is patterned and etched, creating active moat regions (18) and recesses (20a-b and 21a-b). The recesses are fille... | 06/27/1989 |
| 4842676 | Process for etch of tungsten A process for etch of tungsten which utilizes both in situ and remote plasmas, and a gas mixture for the plasma which comprises SF6, HBr, and a source of hydrocarbons at low pressure and ambient temperature to product an etch which is both sele... | 06/27/1989 |
| 4842686 | Wafer processing apparatus and method A plasma reactor with in situ ultraviolet generation processing aparatus and method. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum processing chamber but is remote from the face of ... | 06/27/1989 |
| 4843453 | Metal contacts and interconnections for VLSI devices Metal contacts and interconnections for integrated circuits utilize copper as the primary conductor, with the copper being totally encased in refractory metal layers on both top and bottom surfaces and also sidewalls. The contact hole in silicon oxide may... | 06/27/1989 |
| 4843295 | Method and apparatus for starting single phase motors A solid state starting system for electric motors having main and start windings of the capacitor start, capacitor start-capacitor run and split phase types uses a triac serially connected to the start winding. The system turns on the triac upon energizat... | 06/27/1989 |
| 4842687 | Method for etching tungsten A thin film metal (e.g. tungsten) is anisotropically etched under plasma bombardment conditions by using a feed gas mixture which includes a fluorine source, such as SF6, plus a bromine source, such as HBr, plus a hydrocarbon source, e.g., an a... | 06/27/1989 |
| 4842680 | Advanced vacuum processor A complete integrated circuit processing module, wherein multiple processing stations, each with its own vacuum isolation, are located inside a single module which is held at hard vacuum. A wafer transport arm mechanism permits interchange of wafers among... | 06/27/1989 |
| 4839866 | Cascadable first-in, first-out memory A cascadable first-in, first-out memory unit (11, 12, 13) has a load/unload control (152) for write-addressing and read-addressing selected memory locations within its memory array (82). A write pointer (110, 112, 120) keeps track of the number of write o... | 06/13/1989 |
| 4839705 | X-cell EEPROM array An X-cell EEPROM array includes a plurality of common source regions (50) that each border on four gate regions (46), both formed at a face of a semiconductor substrate (10). Each gate region (46) further adjoins a common drain region (52). Each drain reg... | 06/13/1989 |
| 4839633 | Asymmetric voltage monitor for series supplies Disclosed is a supply voltage monitor for detecting the asymmetric decay of one voltage source (Vdd) with respect to another voltage source (Vss). The monitor circuit (24) includes a resistive voltage divider (26) having a plurality ... | 06/13/1989 |
| 4839538 | Impact bipolar integrated circuit designed to eliminate output glitches caused by negative chip ground spikes The disclosure relates to a circuit for compensation for ground glitches in an integrated circuit wherein there is provided a glitch fix circuit wherein a node is responsive to a negative shift in the level of ground relative to Vcc to turn on a transisto... | 06/13/1989 |
| 4839010 | Forming an antireflective coating for VLSI metallization Method of forming an antireflective coating on a face of a semiconductor which includes forming a metal oxide layer on the face, heating the oxide layer to a temperature sufficiently high to cause the migration of free metal atoms over the surface of the ... | 06/13/1989 |
| 4838984 | Method for etching films of mercury-cadmium-telluride and zinc sulfid A film of mercury-cadmium-telluride (HgCdTe) or zinc sulfide (ZnS) is anisotropically etched utilizing a remote plasma and an in situ plasma utilizing a gas mixture which includes a hydrogen containing and/or an alkyl bearing gas providing an anisotropic ... | 06/13/1989 |
| 4838799 | I.C. socket having conductive plastic contacts An IC socket which has contacts positioned corresponding to each pin position of an IC to be inserted and a body portion holding the contacts, characterized in that at least a part of the contact is formed of conductive resin.... | 06/13/1989 |
