Did You Know...
...that power steering was invented by independent inventor Francis W. Davis? As chief engineer in the 1920s of the truck division of the Pierce Arrow Motor Car Company, he saw how hard it was to steer heavy vehicles. So that he would be able to keep the profits from his future invention, Davis left his job, rented a small engineering shop in Waltham, Mass., and developed a hydraulic power steering system that led to power steering.
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| Number | Title | Issue Date |
| 6905397 | Apparatus for enhanced rate chemical mechanical polishing with adjustable selectivity A chemical mechanical polishing apparatus is described, which includes a platen, a polishing pad that is attached to the platen, and a means for adjusting the temperature of the polishing pad. ... | 06/14/2005 |
| 6897134 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, then forming a capping layer on the high-k gate dielectric layer. After oxidizing the capping layer to form a capping dielectric oxi... | 05/24/2005 |
| 6890807 | Method for making a semiconductor device having a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, and forming an impurity containing metal layer on the dielectric layer. A metal gate electrode is then formed from the impurity containing metal... | 05/10/2005 |
| 6887800 | Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction A method for making a semiconductor device is described. That method comprises modifying a first surface, and forming a high-k gate dielectric layer on an unmodified second surface. ... | 05/03/2005 |
| 6884361 | Method for making a mirror for photolithography A method for making a substrate for a mirror used in photolithography is described. That method comprises forming a crystalline layer on a first layer, which has a low coefficient of thermal expansion. Part of the crystalline layer is then removed to form on the fir... | 04/26/2005 |
| 6872666 | Method for making a dual damascene interconnect using a dual hard mask An improved method of forming a semiconductor device is described. Initially, a structure is formed that includes first and second hard masking layers that cover a dielectric layer. A first part of the second hard masking layer and a first part of the first hard mas... | 03/29/2005 |
| 6867102 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming on a substrate a high-k gate dielectric layer that includes impurities, then forming a silicon containing sacrificial layer on the high-k gate dielectric layer. After the silicon ... | 03/15/2005 |
| 6849896 | Flash memory with UV opaque passivation layer A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method forming a semiconductor that includes flash memory cell having floating gate, then forming a the substrate. Process induced charge that has accumul... | 02/01/2005 |
| 6833321 | Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an electromigration retarding amount of a dopant near the via than away fr... | 12/21/2004 |
| 6787440 | Method for making a semiconductor device having an ultra-thin high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming on a substrate a buffer layer and a high-k gate dielectric layer, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high... | 09/07/2004 |
| 6774032 | Method of making a semiconductor device by forming a masking layer with a tapered etch profile A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer th... | 08/10/2004 |
| 6743712 | Method of making a semiconductor device by forming a masking layer with a tapered etch profile A method for making a semiconductor device is described. That method includes forming a sacrificial layer on a substrate, then forming a layer of photoresist on the sacrificial layer. After the photoresist layer is patterned, to form a patterned photoresist layer th... | 06/01/2004 |
| 6741465 | Cooling method and apparatus for handheld devices A method and apparatus for cooling an electronic component within a handheld device comprised of an extension to the casing of the handheld device and at least one portion of a cooling apparatus within the extension. ... | 05/25/2004 |
| 6740579 | Method of making a semiconductor device that includes a dual damascene interconnect An improved method for making a semiconductor device is described. That method includes forming a first dielectric layer on a substrate, then forming on the first dielectric layer a second dielectric layer. The second dielectric layer is made from a material that is... | 05/25/2004 |
| 6737754 | COF packaged semiconductor A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface in... | 05/18/2004 |
| 6719920 | Slurry for polishing a barrier layer A slurry is described that comprises a mixture of between about 0.01 mole and about 0.1 mole per liter of an organic acid salt, between about 1% to about 20% by volume of an abrasive, and an oxidizer. ... | 04/13/2004 |
| 6716771 | Method for post-CMP conversion of a hydrophobic surface of a low-k dielectric layer to a hydrophilic surface A method of converting a hydrophobic surface of a dielectric layer to a hydrophilic surface is described. That method comprises forming on a substrate a dielectric layer that has a hydrophobic surface, then coupling a hydrophilic component to the surface of the diel... | 04/06/2004 |
| 6716707 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After removing impurities from that layer, and increasing its oxygen content, a gate electrode is formed on the high-k gate dielectr... | 04/06/2004 |
| 6713358 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After forming a silicon nitride layer on the high-k gate dielectric layer, a gate electrode is formed on the silicon nitride layer. | 03/30/2004 |
| 6711640 | Split delay transmission line A computer motherboard is described. That motherboard includes a memory controller and a memory section. A first trace couples the memory controller to the memory section, and a second trace couples the memory controller to the memory section. The first trace is joi... | 03/23/2004 |
| 6708243 | Computer assembly with stub traces coupled to vias to add capacitance at the vias A computer assembly is described. The computer assembly includes a motherboard and a socket mounted to the motherboard. The socket, which enables the motherboard to receive a memory card, has a mounting pin that is inserted into a via that is formed in the motherboa... | 03/16/2004 |
| 6696327 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, then forming a capping layer on the high-k gate dielectric layer. After oxidizing the capping layer to form a capping die... | 02/24/2004 |
| 6689675 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high-k gate ... | 02/10/2004 |
| 6680262 | Method of making a semiconductor device by converting a hydrophobic surface of a dielectric layer to a hydrophilic surface A method of converting a hydrophobic surface of a dielectric layer to a hydrophilic surface is described. That method comprises forming a dielectric layer on a substrate, then operating a PECVD reactor to generate a plasma that converts the surface of tha... | 01/20/2004 |
| 6664168 | Method of making an on-die decoupling capacitor for a semiconductor device A method of making an on-die decoupling capacitor for a semiconductor device is described. That method comprises forming a first barrier layer on a conductive layer. The upper surface of the first barrier layer is modified to enable a dielectric layer wit... | 12/16/2003 |
| 6661094 | Semiconductor device having a dual damascene interconnect spaced from a support structure A semiconductor device and an improved method for making it are described. The semiconductor device comprises a dual damascene interconnect that includes a conductive line. The device further includes a support structure that is spaced from the conductive... | 12/09/2003 |
| 6653229 | Integrated circuit with a recessed conductive layer An improved method for making an integrated circuit. That method includes forming a first dielectric layer on a substrate, etching a trench into that layer, then filling the trench with a conductive material. The conductive material is then electropolishe... | 11/25/2003 |
| 6640274 | Method and apparatus for reducing the disk drive data transfer interrupt service latency penalty A method and apparatus for reducing the disk drive data transfer interrupt service latency penalty is described. The method comprises beginning a data transfer between a disk drive and a host system, issuing an interrupt before the transfer is complete, a... | 10/28/2003 |
| 6630390 | Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layer A method for making a semiconductor device is described. That method comprises forming a carbon doped oxide containing layer and a dielectric layer on a substrate, such that at least part of the dielectric layer is located above at least part of the carbo... | 10/07/2003 |
| 6622243 | Method for securing CMOS configuration information in non-volatile memory A system and method for securing configuration information for a computer system. The method comprises saving configuration information in CMOS memory and automatically programming that configuration information into a non-volatile memory. The system incl... | 09/16/2003 |
| 6617210 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide. An insulating layer, which is compatib... | 09/09/2003 |
| 6617209 | Method for making a semiconductor device having a high-k gate dielectric A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide. The dielectric layer is modified so th... | 09/09/2003 |
| 6610362 | Method of forming a carbon doped oxide layer on a substrate A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that ... | 08/26/2003 |
| 6596646 | Method for making a sub 100 nanometer semiconductor device using conventional lithography steps A method of forming a semiconductor device is described. In that method, a masking layer is formed on a substrate. A layer of photoresist is then deposited and patterned on that layer to expose a first part of the masking layer while covering a second par... | 07/22/2003 |
| 6579795 | Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability A method of making a semiconductor device is described. That method comprises forming a copper containing layer on a substrate, introducing a void nucleation site into the copper containing layer, and forming a via that is located a distance removed from ... | 06/17/2003 |
| 6564811 | Method of reducing residue deposition onto ash chamber base surfaces A semiconductor manufacturing a method and an apparatus is described. That apparatus includes an ash chamber that has an ash chamber base, and a heating unit that is coupled to the ash chamber base. The heating unit applies heat to the ash chamber base to... | 05/20/2003 |
| 6564317 | Method and apparatus for securing computer firmware wherein unlocking of nonvolatile memory is prohibited unless address line masking Is disabled during an initialization event A method and apparatus for initializing a computer system, which includes a lockable nonvolatile memory coupled to a processor having maskable address lines and a cache, when a nonvolatile memory update is in process. When an update is in process, the non... | 05/13/2003 |
| 6548399 | Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layer A method for making a semiconductor device is described. That method comprises forming a carbon doped oxide containing layer and a dielectric layer on a substrate, such that at least part of the dielectric layer is located above at least part of the carbo... | 04/15/2003 |
| 6539449 | Capacitively loaded continuity module A continuity module for a memory channel for a computer system. The continuity module includes a connecting member for coupling the continuity module to a socket that is coupled to a motherboard. The continuity module also includes a printed circuit board... | 03/25/2003 |
| 6537706 | Method for making a photolithographic mask A method for making a photolithographic mask. The method comprises forming a film on a substrate that deforms the substrate, and applying a deformation reducing agent to the substrate to reduce the amount of deformation that the film caused. In a preferre... | 03/25/2003 |
