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| Number | Title | Issue Date |
| 4412238 | Simplified BIFET structure In a monolithic semiconductor integrated circuit, conventional bipolar transistors are fabricated along with thin ion implanted junction field effect transistors, to create BIFET structures. After the conventional isolation diffusion, the surface oxide is... | 10/25/1983 |
| 4405871 | CMOS Reset circuit A CMOS integrated circuit power-on reset circuit has two cascaded threshold detectors for independently sensing the supply voltage attaining an amplitude sufficient to operate N and P-channel devices respectively and for providing a reset signal in respon... | 09/20/1983 |
| 4404673 | Error correcting network An error correcting network adapted for encoding and decoding data transferred to and from a bubble memory has parallel linear encoder/decoder circuits. An error syndrome generated in response to a parity error in an initial read operation is used by one ... | 09/13/1983 |
| 4404660 | Circuit and method for dynamically adjusting the voltages of data lines in an addressable memory circuit A two-phase memory circuit provides for adjusting the precharge voltage of a data line to substantially equal the threshold voltage of a sense amplifier coupled to the data line during a first phase so that a relatively small voltage change on the data li... | 09/13/1983 |
| 4395774 | Low power CMOS frequency divider Means are described for generating a pair of oscillator signals that will respectively drive P and N channel transistors in Class B. These signals are used to clock a synchronous inverter stage that will only change state during the appropriate time inter... | 07/26/1983 |
| 4393575 | Process for manufacturing a JFET with an ion implanted stabilization layer A semiconductor device wherein surface stabilization is provided by a shallow layer of ion implanted doping material on the surface of the semiconductor and beneath the passivating oxide layer. One embodiment is a bipolar transistor including a collector ... | 07/19/1983 |
| 4392016 | AM Stereo carrier reinsertion In an AM stereo radio receiver a filter is coupled to the IF amplifier and is tuned to the IF carrier frequency. The filter will ring at the IF and, if desired, can be incorporated into an oscillator circuit. The resulting signal acts as a reinserted carr... | 07/05/1983 |
| 4390893 | Digital color modulator An interface circuit for converting a digital signal representing a dot-by-dot color video signal into a NTSC signal compatible with a television antenna input precompensates the digital for limitations in typical NTSC receivers. Various methods and circu... | 06/28/1983 |
| 4388699 | Bubble memory sense amplifier A bubble sense amplifier has a biasing circuit for adjusting the bias currents through magneto-resistive detectors so as to establish a preferred common mode operating voltage across the bubble detectors. The preamplifier is coupled through a junction cap... | 06/14/1983 |
| 4387349 | Low power CMOS crystal oscillator A two transistor CMOS inverter has the two transistor gates coupled together by a coupling capacitor. D-C gate bias is supplied to each transistor through high value resistors. The P-channel transistor is biased one threshold below VDD and the ... | 06/07/1983 |
| 4381460 | Bootstrap driver circuit A MOS two-phase boostrap driver circuit, having a bootstrap transistor with a gate selectively charged or discharged in response to the level of an input signal, provides for selectively charging the gate of the bootstrap transistor directly from a voltag... | 04/26/1983 |
| 4379208 | AM Stereo receiver logic In an AM stereo radio receiver, a pilot signal is recovered from the phase modulated channel. The pilot signal is sensed by means of a bandpass filter tuned to the subaudible signal frequency and is used to operate a detector-switching amplifier combinati... | 04/05/1983 |
| 4378529 | Differential amplifier input stage capable of operating in excess of power supply voltage A pair of common base connected transistors have their emitters coupled to provide the input terminals of a differential amplifier. The collectors are coupled to a current mirror that provides a small current bias that operates the transistors at equal cu... | 03/29/1983 |
| 4377855 | Content-addressable memory A content-addressable memory (CAM) has an array of four-transistor memory cells arranged in rows corresponding to stored words and columns corresponding to a selected search word. Complementary column lines couple signals associated with the bits of the s... | 03/22/1983 |
| 4375618 | Linearized FM quadrature detector In an FM receiver a multiplier is driven from the IF limiter. The limiter also drives a single tuned circuit which produces a quadrature signal that drives a second port in the multiplier. When the quadrature signal is multiplied by the IF signal an FM de... | 03/01/1983 |
| 4375580 | AM Stereo receiver separation control In AM radio receivers it is desirable to operate the automatic gain control so that strong signals are actually heard louder than weaker signals. This means that when AM stereo is incorporated into the radio, using a limiter and phase demodulator to recov... | 03/01/1983 |
| 4373253 | Integrated CMOS process with JFET A process for fabricating JFET devices into a conventional CMOS monolithic IC. The combination of devices provides linear circuit operation with low noise characteristics.... | 02/15/1983 |
| 4371792 | High gain composite transistor A composite transistor suitable for use in monolithic integrated circuits is characterized as having extremely high current gain, stable operation and low leakage current. Two vertical NPN transistors are coupled into a circuit configuration, along with t... | 02/01/1983 |
| 4362999 | AM Stereo phase modulation decoder A decoder for obtaining the L-R information in an AM stereo radio receiver. The decoder is basically a four-quadrant multiplier that has one pair of inputs driven from a limiter that operates from the receiver intermediate frequency amplifier. The limiter... | 12/07/1982 |
| 4361599 | Method of forming plasma etched semiconductor contacts In the fabrication of semiconductor devices it has been found useful to employ plasma etching to create contact holes in the insulating layers that cover the wafers being processed. In particular, when wafers are being fabricated that employ small diamete... | 11/30/1982 |
| 4359693 | Full wave amplitude modulation detector circuit A current comparator is supplied with differential currents based upon an amplitude modulated radio frequency carrier. The comparator outputs are summed in a combining stage the output of which will contain a direct current proportional to the average car... | 11/16/1982 |
| 4355463 | Process for hermetically encapsulating semiconductor devices A tape assembly process attaches semiconductor chips to a tape via thermocompression gang bonding and the tape is wound onto a reel. The tape is fabricated during its manufacture to have a plurality of spaced finger array patterns. The inner finger ends a... | 10/26/1982 |
| 4355455 | Method of manufacture for self-aligned floating gate memory cell A floating gate memory cell has its control gate self-aligned to the floating gate in the source to drain direction and its floating gate self-aligned to the channel region in that direction and the direction transverse thereto without overlaying the fiel... | 10/26/1982 |
| 4355719 | Mechanical shock and impact resistant ceramic semiconductor package and method of making the same A mechanical shock and impact resistant ceramic semiconductor package is formed by applying a resilient, non-conductive, non-absorbent, heat-resistant material onto the surfaces of said package. In a dual in-line ceramic package a silicone polymer is disc... | 10/26/1982 |
| 4354162 | Wide dynamic range control amplifier with offset correction A unity gain amplifier circuit has a control characteristic which permits a variation of the high frequency roll off as a function of a control voltage. Means are provided to prevent a change of output voltage resulting from the control voltage variation.... | 10/12/1982 |
| 4353105 | CMOS Latch-up protection circuit A protection circuit for bulk-silicon CMOS circuits detects the latch-up of parasitic SCR devices, current starves the CMOS circuit in response to detecting a SCR latch-up condition and reenables normal circuit operation once the latch-up condition has be... | 10/05/1982 |
| 4348602 | Current comparator circuit with deadband A pair of differentially related currents are caused to flow in a pair of current modes. A symmetrical current mirror is coupled to the nodes and level shifting means coupled from each node to the current mirror common terminal. A pair of output transisto... | 09/07/1982 |
| 4347654 | Method of fabricating a high-frequency bipolar transistor structure utilizing permeation-etching A method of fabricating a high-frequency bipolar transistor structure wherein the emitter, higher impurity concentration base, and lower impurity concentration base regions are defined in a single masking operation. Permeation etching is used to etch regi... | 09/07/1982 |
| 4346454 | Bubble memory with on chip error map storage on permalloy disk elements A bubble memory chip includes a plurality of data loops, some of which may be defective, for storing magnetic bubbles representative of data therein. A serial-parallel input propagation path and a parallel-serial output propagation path are provided for p... | 08/24/1982 |
| 4346351 | High frequency voltage-controlled oscillator A differential oscillator is supplied with a constant total current. A signal-controlled single-ended shunt circuit bypasses current around the oscillator thus varying the tail current oppositely. This in turn varies the signal delay in the oscillator tra... | 08/24/1982 |
| 4345218 | Two stage thermal shutdown In an amplifier circuit the output devices are thermally coupled to a shutdown circuit. A first latch is designed to operate at a first high temperature excursion. The first latch operation acts to shut the output devices off and to invoke a second latch.... | 08/17/1982 |
| 4339728 | Radio receiver signal amplifier and AGC circuit An integrated circuit is employed to provide a high gain signal amplifier having an automatic gain control function and an output suitable for driving signal detection circuitry in a radio receiver. The circuit operates at the receiver intermediate freque... | 07/13/1982 |
| 4338590 | Multi stage resistive ladder network having extra stages for trimming A multi-stage resistive ladder network which uses extra stages to trim out resistance discrepencies. All of the stages are interconnected in a series. Nominally, current is divided in half within each stage. Half of the current is gated onto a bus in resp... | 07/06/1982 |
| 4336489 | Zener regulator in butted guard band CMOS Butted guard band CMOS circuits have a typical breakdown of about 7 volts. It is often desirable to operate circuitry from supplies greater than 7 volts. For example, 9 volts is a commonly used supply value. An isolated zener diode is fabricated into a CM... | 06/22/1982 |
| 4335162 | Method of producing a fault transparent bubble memory by diffusing manganese in preselected permalloy elements A bubble memory includes a garnet film and a pattern of overlying propagation elements, each made of a layer of permalloy and a layer of manganese. The elements define a plurality of paths for propagating magnetic bubble domains under the influence of a Z... | 06/15/1982 |
| 4335371 | Digital error correcting trimming in an analog to digital converter A single chip integrated circuit analog-to-digital converter uses the successive approximation approach with resistor ladder-switching decoder digital-to-analog coverters coupled to a precision plural input comparator. An on board PROM is provided to stor... | 06/15/1982 |
| 4331740 | Gang bonding interconnect tape process and structure for semiconductor device automatic assembly A continuous tape is employed in the automatic assembly of semiconductor devices. The tape contains a sequential series of patterns, each one comprising a plurality of metal fingers. Each pattern includes fingers having an inward extension that terminates... | 05/25/1982 |
| 4330790 | Tape operated semiconductor device packaging A semiconductor device is bonded to a contact finger pattern which is located in a continuous tape. A metal package cup is fabricated from metal stock so as to have a flat rim portion around its periphery. A plastic insulating sheet is punched so that it ... | 05/18/1982 |
| 4326443 | Integrated organ circuit An MOS integrated organ circuit compensates an audio frequency signal for variations in amplitude, attack and decay characteristics caused by process variations by adjusting a single variable reference voltage. The circuit intrinsically provides for the t... | 04/27/1982 |
| 4327333 | AGC Current source A circuit for supplying a pair of currents that vary in opposite directions as a function of a control current. The pair of currents are coupled to an amplifying stage in which the gain varies in accordance with the relative magnitude of the currents. The... | 04/27/1982 |
