Did You Know...
...that the Eveready Battery began as an invention called the "electric flowerpot," which was a tube with a battery and light bulb inside? The idea was to fasten this gizmo to the side of a flowerpot so it would illuminate the flowers from the bottom. The idea died on the vine and the businessman who licensed the flower pot, Conrad Huber, was left with a pile of useless tubes -- until he found a way to market them as batteries to light the world!
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| Number | Title | Issue Date |
| 8176279 | Managing use of storage by multiple pageable guests of a computing environment Management of storage used by pageable guests of a computing environment is facilitated. An enhanced suppression-on-protection facility is provided that enables the determination of which level of protection (host or guest) caused a fault condition, in response to a... | 05/08/2012 |
| 8161476 | Processor exclusivity in a partitioned system A computer system including a plurality of physical processors (CPs) having physical processor performances (PCPs), a plurality of logical processors (LCPs), a plurality of logical partitions (LPARs) where each partition includes one or more of the logical processor... | 04/17/2012 |
| 8145961 | Fast ECC memory testing by software including ECC check byte The present invention relates to the architecture and operation of computer hardware memory logic, and in particular to a method and respective system for verifying hardware memory logic, wherein an Error Correction Code (ECC) is used for correcting single-bit or mu... | 03/27/2012 |
| 8140622 | Parallel metadata service in storage area network environment A method for data access in a multinode, shared storage data processing environment is provided by enhancing the file locking mechanism structure so as to permit nodes not normally designated as metadata controller nodes to fulfill that function for limited times th... | 03/20/2012 |
| 8131939 | Distributed shared I/O cache subsystem A method and system for a decentralized distributed storage data system. A plurality of central processors each having a cache may be directly coupled to a shared set of data storage units. A high speed network may be used to communicate at a physical level between ... | 03/06/2012 |
| 8117614 | Extract CPU time facility An efficient facility for determining resource usage, such as a processor time used by tasks. The determination is performed on behalf of user applications that do not require a call to operating system services. The facility includes an instruction that determines ... | 02/14/2012 |
| 8117574 | Implementing a serialization construct within an environment of parallel data flow graphs A serialization construct is implemented within an environment of a number of parallel data flow graphs. A quiesce node is appended to every active data flow graph. The quiesce node prevents a token from passing to a next data flow graph within a chain before an exe... | 02/14/2012 |
| 8117055 | Air cargo yield management system for utilizing booking profiles and unconstrained demand A yield management method and system, particularly for maximizing a revenue that can be obtained from a given capacity that is offered by a cargo flight; the capacity is defined by two different variables consisting of the weight and the volume of the freights that ... | 02/14/2012 |
| 8116210 | System and program product to recover from node failure/recovery incidents in distributed systems in which notification does not occur Epoch numbers are maintained in a pair wise fashion at a plurality of communication endpoints to provide communication consistency and recovery from a range of failure conditions including total or partial node failure and subsequent recovery. Once an epoch state in... | 02/14/2012 |
| 8108451 | System and program products for efficiently locking resources of a global data repository Concurrent access to a global data repository is provided, while minimizing the number of locks acquired to provide the concurrent access. One or more resources within the global data repository have predefined relationships with one or more other resources of the r... | 01/31/2012 |
| 8098155 | System and method for locating a target wireless device A method for locating a target wireless device is disclosed. At least one directional antenna is swept through a field of view at each of a plurality of sensing locations. A position is determined for each of the plurality of sensing locations. During the sweep at e... | 01/17/2012 |
| 8086811 | Optimizations of a perform frame management function issued by pageable guests Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations ma... | 12/27/2011 |
| 8078843 | Facilitating processing in a computing environment using an extended drain instruction An extended DRAIN instruction is used to stall processing within a computing environment. The instruction includes an indication of the one or more processing stages at which processing is to be stalled. It also includes a control that allows processing to be stalle... | 12/13/2011 |
| 8078841 | Parsing-enhancement facility using a translate-and-test instruction An instruction for parsing a buffer to be utilized within a data processing system including: an operation code field, the operation code field identifies the instruction; a control field, the control field controls operation of the instruction; and one or more gene... | 12/13/2011 |
| 8077062 | Pack ASCII zSeries instructions ASCII input data to be packed into memory is obtained. The ASCII input data includes a plurality of blocks of ASCII data. wherein each block of ASCII data includes a plurality of ASCII characters. A block of ASCII data to he packed is selected. The selected block is... | 12/13/2011 |
| 8055905 | Graphical password authentication based on pixel differences A password, unknown to a user to be authenticated by the password, is created by comparing an image provided by the user to a master image. Random differences between the images are found and used to create the password. The password is then validated to determine w... | 11/08/2011 |
| 8031639 | Efficient probabilistic duplicate packet detector in computer networks In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the ... | 10/04/2011 |
| 8019922 | Interruption facility for adjunct processor queues Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption signals to a processor that a reply to a request is waiting on the queu... | 09/13/2011 |
| 8018844 | Reliable message transfer over an unreliable network In a communications network having a plurality of nodes adapted to communicate with each other, and more than one path available between most source-destination node-pairs, a network interface is associated with each node. Each network interface has a plurality of r... | 09/13/2011 |
| 7987454 | System and method for emulating the processing of java server pages The processing of server pages is emulated at run time. The system includes a library of custom tags, and a server page emulator for reading the server page, including identifying any calls to the library of custom tags, and further for emulating any calls to the cu... | 07/26/2011 |
| 7987386 | Checkpoint/resume/restart safe methods in a data processing system to establish, to restore and to release shared memory regions A method is provided in which checkpointing operations are carried out in data processing systems running multiple processes which employ shared memory in a manner which preserves data coherence and integrity but which places no timing restrictions or constraints wh... | 07/26/2011 |
| 7979621 | Transparent PCI-based multi-host switch A transparent PCI-based multi-host switch. A switch is configured with multiple north facing ports to couple the switch to multiple hosts. The multi-host switch can be included in a variety of switch configurations, including configurations having one multi-host swi... | 07/12/2011 |
| 7975270 | Facilitating allocation of resources in a heterogeneous computing environment Allocation of resources in a heterogeneous computing environment is facilitated. A resource manager of the heterogeneous computing environment obtains information that describes which nodes of the heterogeneous computing environment are capable of supporting additio... | 07/05/2011 |
| 7970952 | Performance counters for virtualized network interfaces of communications networks Performance counters are provided for virtualized network interfaces of communications networks, while minimizing the use of hardware resources. A virtualized network interface includes physical resources, as well as logical resources. Dedicated performance counters... | 06/28/2011 |
| 7958393 | Conditional actions based on runtime conditions of a computer system environment Conditionally performing delegated actions based on runtime conditions of the environment. A component of an Information Technology environment conditionally performs an action, such as its own recovery, based on whether the component can have such action delegated ... | 06/07/2011 |
| 7958384 | Backup power source used in indicating that server may leave network A server of a network of servers determines that its power source is failing. In response, the server communicates to one or more other servers of this network that it is leaving the network. This communication is powered by another power source. ... | 06/07/2011 |
| 7952370 | On-chip detection of power supply vulnerabilities On-chip sensor to detect power supply vulnerabilities. The on-chip sensor employs a sensitive delay chain and an insensitive delay chain to detect power supply undershoots and overshoots without requiring external off-chip components. Undershoots and overshoots outs... | 05/31/2011 |
| 7945808 | Fanout connectivity structure for use in facilitating processing within a parallel computing environment A hierarchical fanout connectivity infrastructure is built and used to start a parallel application within a parallel computing environment. The connectivity infrastructure is passed to a checkpoint library, which employs the infrastructure and a defined sequence of... | 05/17/2011 |
| 7941799 | Interpreting I/O operation requests from pageable guests without host intervention Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment abse... | 05/10/2011 |
| 7940706 | Controlling the state of duplexing of coupling facility structures A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the duplexing of structures of the coupling facilities. Duplexing is performed on ... | 05/10/2011 |
| 7937610 | Fast node failure detection via disk based last gasp mechanism A method for communicating node liveness in a multinode data processing system employs an operating system function that provides a degree of self-awareness in “sensing” an imminent but still pending failure as the basis for providing special flag signals over a... | 05/03/2011 |
| 7934056 | Allocating space on data storage devices in proportion to weights associated with the devices Space is allocated on data storage devices in proportion to weights associated with the storage devices. The weights can be dynamically adjusted at any time in order to accommodate changes in the system and to better utilize the storage devices. The technique used t... | 04/26/2011 |
| 7930686 | Defining memory indifferent trace handles A handle for a trace is provided that is memory indifferent. The handle is created using contents of the trace rather than memory location of the trace. This enables the trace to be easily identified in subsequent runs of an application associated with the trace. | 04/19/2011 |
| 7925916 | Failsafe recovery facility in a coordinated timing network A failsafe recovery capability for a Coordinated Timing Network. The recovery capability facilitates recovery when communication is lost between two servers of the coordinated timing network. The capability includes checking another system's status in order to deter... | 04/12/2011 |
| 7913243 | Method and system for generating and applying patches to a computer program concurrently with its execution A method, a computer program product, and a system for generating and applying patches to a computer program concurrently with its execution. It provides full support for function pointers, transparent to the programmer and nearly transparent to the concurrent loade... | 03/22/2011 |
| 7911971 | Mapping tool for configuring communications environments Configuring of a communications environment is facilitated. A mapping tool is provided that aids in the configuring of various components of a communications environment, such as an input/output (I/O) subsystem of the environment. Data generated from an order proces... | 03/22/2011 |
| 7908596 | Automatic inspection of compiled code Automatic inspection of compiled code. In response to revising a compiler, the functionality of that compiler is verified. Specific code is compiled using a first version of the compiler, as well as a second version of the compiler. Each compiled code is then applie... | 03/15/2011 |
| 7899894 | Coordinated timing network configuration parameter update procedure In a networked data processing system, the updating of timing parameters is carried out via a process in which the detection of the loss of communications with the network is not immediately employed as an indication of parameter invalidity but rather the process em... | 03/01/2011 |
| 7899663 | Providing memory consistency in an emulated processing environment Memory consistency is provided in an emulated processing environment. A processor architected with a weak memory consistency emulates an architecture having a firm memory consistency. This memory consistency is provided without requiring serialization instructions o... | 03/01/2011 |
| 7890559 | Forward shifting of processor element processing for load balancing A data processing system, which is particularly useful for carrying out modular multiplication, especially for cryptographic purposes, comprises a plurality of independent, serially connected processing elements which are provided with data in a cyclical fashion via... | 02/15/2011 |
