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"Transmission of documents via telephone wires is possible in principle, but the apparatus required is so expensive that it will never become a practical proposition."
Dennis Gabor, British physicist
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| Number | Title | Issue Date |
| 8015148 | Selective profiler for use with transaction processing applications A server system suitable for processing transactions includes transaction processing means to process requests issued by client systems. A transaction profiler records information regarding transactions processed by the server. Profiled transactions are selected for... | 09/06/2011 |
| 7779378 | Computer program product for extending incremental verification of circuit design to encompass verification restraints An incremental verification method includes eliminating verification constraints from a first netlist and using the resulting netlist to create a constraint-free composite netlist suitable for determining equivalence between the first netlist and a second netlist of... | 08/17/2010 |
| 7664965 | Method and system for bootstrapping a trusted server having redundant trusted platform modules Multiple trusted platform modules within a data processing system are used in a redundant manner that provides a reliable mechanism for securely storing secret data at rest that is used to bootstrap a system trusted platform module. A hypervisor requests each truste... | 02/16/2010 |
| 7657772 | Thermally aware integrated circuit An integrated circuit having a temperature sensitive circuit (TSC) to generate a signal indicative of the substrate temperature near the TSC. The integrated circuit has circuitry configured to receive a TSC signal from at least one TSC and to convert the TSC signal ... | 02/02/2010 |
| 7624283 | Protocol for trusted platform module recovery through context checkpointing A computer implemented method for recovering a partition context in the event of a system or hardware device failure. Upon receiving a command from a partition to modify context data in a trusted platform module (TPM) hardware device, a trusted platform module input... | 11/24/2009 |
| 7614005 | Method for seamlessly crossing GUI toolkit boundaries A method, computer program product, and data processing system for facilitating the traversal of a hierarchy of GUI components containing components and/or containers from disparate GUI toolkits is disclosed. In a preferred embodiment, auxiliary associative data str... | 11/03/2009 |
| 7603703 | Method and system for controlled distribution of application code and content data within a computer network A secure communication methodology is presented. The client device is configured to download application code and/or content data from a server operated by a service provider. Embedded within the client is a client private key, a client serial number, and a copy of ... | 10/13/2009 |
| 7590952 | Compact chip package macromodels for chip-package simulation A computer implemented method, data processing system, and computer usable program code are provided for reducing a chip package model. Responsive to receiving the chip package model, an inductance and a resistance of the chip package model is measured. The inductan... | 09/15/2009 |
| 7574698 | Method and apparatus for protecting HTTP session data from data crossover using aspect-oriented programming A method, computer program product, and data processing system for detecting and identifying data crossover errors in servlet code are disclosed. According to a preferred embodiment, techniques of aspect-oriented programming (AOP) are used to instrument JAVA Servlet... | 08/11/2009 |
| 7561489 | System and method of selective row energization based on write data A system and method of selective row energization based on write data, with a selective row energization system including a storage array 102 having M rows 104 and N columns 106; an N-bit data word register 108; a uniform-detect circuit | 07/14/2009 |
| 7552240 | Method for user space operations for direct I/O between an application instance and an I/O adapter The present invention provides a method that enables application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from either the local operating system or hypervisor. In one aspect of the present inventio... | 06/23/2009 |
| 7549137 | Latch placement for high performance and low power circuits A novel iterative latch placement scheme wherein the latches are gradually pulled by increasing attraction force until they are eventually placed next to a clock distribution structure such as a local clock buffer (LCB). During the iterations, timing optimizations s... | 06/16/2009 |
| 7549095 | Error detection enhancement in a microprocessor through the use of a second dependency matrix A microprocessor error detection method, includes providing a primary dependency matrix, providing an issue logic for issuing a micro-op, providing a secondary dependency matrix comprising a copy of the primary dependency matrix, providing a results available vector... | 06/16/2009 |
| 7548823 | Correction of delay-based metric measurements using delay circuits having differing metric sensitivities Correction of delay-based metric measurements using delay circuits having differing metric sensitivities provides improved accuracy for environmental and other circuit metric measurements that used delay lines. A delay line measurement, which may be a one-shot measu... | 06/16/2009 |
| 7546561 | System and method of state point correspondence with constrained function determination A system and method for determining scan chain correspondence including defining a reference scan chain having reference latches and a reference constraint, each of the reference latches having a reference latch logic cone, the reference constraint having a referenc... | 06/09/2009 |
| 7546519 | Method and apparatus for detecting and correcting soft-error upsets in latches An error detection circuit for a latch precharges two dynamic nodes whose discharge paths are gated by true and complement storage nodes of the latch, such that one and only one of the dynamic nodes always discharges when the clock signal transitions from an active ... | 06/09/2009 |
| 7545690 | Method for evaluating memory cell performance A method for evaluating memory cell performance provides for circuit delay and performance measurements in an actual memory circuit environment. A row in a memory array is enabled along with a set of drive devices that couple each bitline pair to the next in complem... | 06/09/2009 |
| 7545176 | Energy-saving circuit and method using charge equalization across complementary nodes An energy-saving circuit and method using charge equalization across complementary nodes reduces power consumption in memory circuits and other circuits such as wide multiplexers having complementary high-capacitance nodes. A change detection circuit detects a state... | 06/09/2009 |
| 7542862 | Calibration of multi-metric sensitive delay measurement circuits A method and system for calibration of multi-metric sensitive delay measurement circuits provides for reduction of process-dependent variation in delays and their sensitivities to circuit metrics. A process corner for the delay circuit(s) is determined from at least... | 06/02/2009 |
| 7539841 | Machine memory power and availability management in a processing system supporting multiple virtual machines A processing system and computer program provides memory power management and memory failure management in large scale systems. Upon a decision to take a memory module off-line or place the module in an increased-latency state for power management, or upon a notific... | 05/26/2009 |
| 7537997 | Ensuring migratability of circuits by masking portions of the circuits while improving performance of other portions of the circuits Mechanisms for ensuring the migratability of circuits into future technologies while minimizing fabrication costs and maintaining or improving power efficiency are provided. A mask layer is introduced to portions of the integrated circuit prior to a stress inducing ... | 05/26/2009 |
| 7536604 | Method and system for reconfiguring functional capabilities in a data processing system with dormant resources A method, a computer program product and a system for reconfiguring functional capabilities in a data processing system with dormant resources. Dormant resources of a data processing system are used to replace (360) the functional characteristics of a broken ... | 05/19/2009 |
| 7536577 | Calibration technique for power measurement and management over multiple time frames A calibration technique provides for precision calibration of system power measurement. The calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply se... | 05/19/2009 |
| 7533321 | Fault tolerant encoding of directory states for stuck bits A method of handling a stuck bit in a directory of a cache memory, by defining multiple binary encodings to indicate a defective cache state, detecting an error in a tag stored in a member of the directory (wherein the tag at least includes an address field, a state... | 05/12/2009 |
| 7533297 | Fault isolation in a microcontroller based computer A method and data processing system for isolating a faulty component in a computer. A first microcontroller detects a fault in a component of a computer. Responsive to detecting the fault, the first microcontroller sets a first fault record for the component to pend... | 05/12/2009 |
| 7533047 | Method and system for securing card payment transactions using a mobile communication device A method and system for securing card payment transactions using a mobile communication device provides improved security in card payment transactions such as credit and debit card transactions. Upon receipt of a transaction at the card issuer or other service provi... | 05/12/2009 |
| 7533003 | Weighted event counting system and method for processor performance measurements A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provide... | 05/12/2009 |
| 7532078 | Scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics A scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics provides the ability to study random device characteristic variation as well as systematic differences between N-channel and P-channel devices using a ring... | 05/12/2009 |
| 7526631 | Data processing system with backplane and processor books configurable to support both technical and commercial workloads A processor book designed to support both commercial workloads and technical workloads based on a dynamic or static mechanism of reconfiguring the external wiring interconnect. The processor book is configured as a building block for commercial workload processing s... | 04/28/2009 |
| 7522670 | Digital transmission circuit and method providing selectable power consumption via single-ended or differential operation A digital transmission circuit and method providing selectable power consumption via single-ended or differential operation improves the flexibility of an interface while reducing power consumption when possible. A differential path is provided through the transmitt... | 04/21/2009 |
| 7521968 | Slew rate control for driver circuit The slew rate of signals output from an integrated circuit is selectively controlled to optimize the quality of the output data signal depending upon whether the communication channels require a faster or slower slew rate. Faster slew rates may be utilized when the ... | 04/21/2009 |
| 7519928 | Method for propagating phase constants in static model analysis of circuits A method for propagating phase constants for static circuit model analysis is provided. The mechanisms of the illustrative embodiments make use of multiple phases of constant propagation to handle sequential elements in a circuit model. The phases are determined bas... | 04/14/2009 |
| 7519699 | Method, system, and computer program product for delivering data to a storage buffer assigned to an application A method, system, and computer program product in a computer-readable medium for delivering data, received from a network, to a storage buffer assigned to an application is proposed. An application designates a communication buffer within a local data processing sys... | 04/14/2009 |
| 7519650 | Split socket send queue apparatus and method with efficient queue flow control, retransmission and sack support mechanisms A mechanism for offloading the management of send queues in a split socket stack environment, including efficient split socket queue flow control and TCP/IP retransmission support. As consumers initiate send operations, send work queue entries (SWQEs) are created by... | 04/14/2009 |
| 7515491 | Method for evaluating leakage effects on static memory cell access time A method for evaluating leakage effects on static memory cell access time provides a mechanism for raising the performance of memory arrays beyond present levels/yields. By altering the states of other static memory cells connected to the same bitline as a static me... | 04/07/2009 |
| 7514947 | Method of and system for functionally testing multiple devices in parallel in a burn-in-environment A method of and a system for testing semiconductor devices heat a plurality of devices to a burn-in temperature, and perform functional tests in parallel on the plurality of devices at the burn-in temperature. Systems include a burn-in oven and a test multiplexer. T... | 04/07/2009 |
| 7512887 | Method to employ multiple, alternative presentations within a single presentation A method of creating multiple, alternative presentations within a single electronic presentation, by assigning one or more presentation constraint parameters to the electronic slides, and generating a sequence for presenting less than all of the electronic slides ba... | 03/31/2009 |
| 7512742 | Data processing system, cache system and method for precisely forming an invalid coherency state indicating a broadcast scope A cache coherent data processing system includes at least first and second coherency domains. In a first cache memory within the first coherency domain of the data processing system, a memory block is held in a storage location associated with an address tag and a c... | 03/31/2009 |
| 7512183 | Differential transmitter circuit A driver circuit is configured as a frequency compensated differential amplifier having one input coupled to a first data signal and a second input coupled to a second data signal. Each stage of the differential amplifier is biased with a current source. The driver ... | 03/31/2009 |
| 7509605 | Extending incremental verification of circuit design to encompass verification restraints An incremental verification method includes eliminating verification constraints from a first netlist and using the resulting netlist to create a constraint-free composite netlist suitable for determining equivalence between the first netlist and a second netlist of... | 03/24/2009 |
