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| Number | Title | Issue Date |
| 7948044 | Low switching current MTJ element for ultra-high STT-RAM and a method for making the same A STT-RAM MTJ that minimizes spin-transfer magnetization switching current (Jc) while achieving a high dR/R is disclosed. The MTJ has a MgO tunnel barrier formed by natural oxidation to achieve a low RA, and a CoFeB/FeSiO/CoFeB composite free layer with a middle nan... | 05/24/2011 |
| 7936604 | High speed operation method for twin MONOS metal bit array The present invention provides a novel operational method of twin MONOS metal bit or diffusion bit structure for high-speed application. In a first embodiment of the present invention, the alternative control gates are set at the same voltage. In a second embodiment... | 05/03/2011 |
| 7936539 | Bottom spin valve GMR sensor incorporating plural oxygen surfactant layers A bottom spin-valve GMR sensor has been fabricated that has ultra-thin layers of high density and smoothness. In addition, these layers are inherently furnished with sub-monolayer thick oxygen surfactant layers. The sensor is fabricated using a method in which the l... | 05/03/2011 |
| 7936292 | Diode smart track Systems and methods to achieve a logarithmic digital-to-analog converter (DAC), which is easy to be implemented, and requiring reduced chip space have been disclosed. The logarithmic DAC is created by a simple and easy to scale linear DAC, which is linearly scaling ... | 05/03/2011 |
| 7936027 | Method of MRAM fabrication with zero electrical shorting An MTJ cell without footings and free from electrical short-circuits across a tunneling barrier layer is formed by using a Ta hard mask layer and a combination of etches. A first etch patterns the Ta hard mask, while a second etch uses O2 applied in a sin... | 05/03/2011 |
| 7934310 | Process to manufacture a magnetic write head Prior art designs of single pole writers have been limited by premature saturation at the tip. This limits the head field that can be achieved without simultaneously widening the write profile. This problem has bee solved by means of a vertical main pole whose thick... | 05/03/2011 |
| 7932735 | Probeless DC testing of CMOS I/O circuits A method and implementation is described by which I/O input and output circuitry of a CMOS chip are measured without the need to probe the chip. Output driver transistors are used to provide marginal voltages to test input circuits, and the output driver transistors... | 04/26/2011 |
| 7929370 | Spin momentum transfer MRAM design We describe the structure and method of formation of a STT MTJ or GMR MRAM cell element that utilizes transfer of spin torque as a mechanism for changing the magnetization direction of a free layer. The critical current is reduced by constructing the free layer as a... | 04/19/2011 |
| 7924641 | Data flow scheme for low power DRAM Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determ... | 04/12/2011 |
| 7919407 | Method of high density field induced MRAM process Described herein are novel, cost effective and scalable methods for integrating a CMOS level with a memory cell level to form a field induced MRAM device. The memory portion of the device includes N parallel word lines, which may be clad, overlaid by M parallel bit ... | 04/05/2011 |
| 7919139 | CPP with elongated pinned layer CPP magnetic read head designs have been improved by increasing the length of the AFM layer relative to that of both the free and spacer layers. The length of the pinned layer is also increased, but by a lesser amount, an abutting conductive layer being inserted to ... | 04/05/2011 |
| 7918014 | Method of manufacturing a CPP structure with enhanced GMR ratio A CPP-GMR spin valve having a CoFe/NiFe composite free layer is disclosed in which Fe content of the CoFe layer ranges from 20 to 70 atomic % and Ni content in the NiFe layer varies from 85 to 100 atomic % to maintain low Hc and λS values. A small positi... | 04/05/2011 |
| 7913411 | Digital bore gage handle Disclosed is a method and apparatus for measuring inside diameters of holes using a dial bore gage with a packaged digital transducer providing an amplified readable output to both dial indicator and digital display enabling wireless data transmission for recording ... | 03/29/2011 |
| 7906844 | Multiple integrated circuit die package with thermal performance A multi-die package comprises a heat spreader disposed on a printed circuit substrate, at least one integrated circuit die disposed on a top side of the heat spreader and at least one other integrated circuit die disposed on a bottom side of the heat spreader wherei... | 03/15/2011 |
| 7901096 | Illumination for projecting an image The invention is directed to a method for illuminating an object and projecting its image on a ground glass screen. Optical comparators conventionally use incandescent illumination, either mercury arc or halogen. The use of an array of high intensity LED devices, pr... | 03/08/2011 |
| 7898777 | Detection of magnetic beads using a magnetoresistive device together with ferromagnetic resonance A method and apparatus for detecting the presence of magnetic beads is disclosed. By providing both a static magnetic field and a magnetic field that alternates in the MHz range, or beyond, the bead can be excited into FMR (ferromagnetic resonance). The appearance o... | 03/01/2011 |
| 7898773 | Perpendicular magnetic recording head with a side write shield A perpendicular magnetic recording (PMR) head is fabricated with a pole tip shielded laterally by a separated pair of side shields and shielded from above by an upper shield. The side shields are formed by a RIE process using specific gases applied to a shield layer... | 03/01/2011 |
| 7898766 | Four sided shield structure for a perpendicular write head The traditional single pole perpendicular writer has two major problems—insufficient field gradient in the down track direction and adjacent track erasure (ATE) caused by side fringing fields. These problems have been overcome by tapering the main pole and then sh... | 03/01/2011 |
| 7898319 | Efficiency improvement in charge pump system for low power application A method and apparatus are provided for improving the efficiency in charge pump systems for low power applications. This first embodiment provides a method and apparatus which defines a charge pump output voltage high target which turns off a charge pump enable sign... | 03/01/2011 |
| 7894162 | Method to protect the magnetic recording head from thermal asperities during disk drive operation A slider mounted read/write head is protected from thermal asperities due to head-disk interactions by a ridge formed along an interfacial plane that extends above the ABS plane of the slider. The ridge is formed as part of a lapping process that is directed from th... | 02/22/2011 |
| 7891081 | Process of manufacturing a side pinned magnetic recording sensor A process is described for the fabrication of a magnetic read head in which contact between the pinned layer and the AFM is limited to their edges. The principal steps are to deposit an antiferromagnetic layer and to then pattern it into a pair of antiferromagnetic ... | 02/22/2011 |
| 7885094 | MRAM with cross-tie magnetization configuration The incidence of half-select errors during MRAM programming has been significantly reduced by giving the free layer a shape that approximates an X so that, when the free layer switches, the magnetization in the arms of the X guides the magnetization in the central s... | 02/08/2011 |
| 7885040 | Suspension with locally strengthened gimbal An apparatus with a head gimbal assembly designed to reduce movement and rotation of components of the head gimbal assembly structure is disclosed. One embodiment head gimbal assembly may comprise a flexure including a ramp limiter, a suspension assembly further com... | 02/08/2011 |
| 7884433 | High density spin-transfer torque MRAM process A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascen... | 02/08/2011 |
| 7880249 | Spacer structure in MRAM cell and method of its fabrication Methods are presented for fabricating an MTJ element having a precisely controlled spacing between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents bet... | 02/01/2011 |
| 7848062 | Method to reduce sensitivity of a perpendicular recording head to external fields In a read-write head, the shields can serve as magnetic flux conductors for external fields, so that they direct a certain amount of flux into the recording medium. This problem has been overcome by the addition to the shields of a pair of tabs located at the edges ... | 12/07/2010 |
| 7847821 | On chip test mode implementation An improved on chip test method for determining the photon transfer curve (PTC) and dark current in an image sensor is described. Cost and time savings is achieved by reducing the number of frames necessary for the measurements to three including two exposure frames... | 12/07/2010 |
| 7877614 | Process for securing the access to the resources of an information handling system (I.H.S.) A process for securing the access to the resources of an Information Handling System (I.H.S.) in accordance with the present invention which involves the steps of: initiating a first preliminary qualification process for the purpos... | 01/25/2011 |
| 7876151 | R/2R programmable gate array Systems and methods to achieve an IC audio volume control requiring minimum silicon area and having an accurate volume control gain setting are disclosed. A resistive element in form of a R/2R ladder is deployed between an output node of an operational amplifier and... | 01/25/2011 |
| 7872838 | Uniformity in CCP magnetic read head devices Improved performance uniformity among CPP magnetic read devices that include an oxide barrier has been achieved by fabricating the oxide layer from at least two separately formed CCP layers. Each CCP layer is given its own PIT and IAO treatment which is of shorter d... | 01/18/2011 |
| 7872835 | Optimized write pole flare angle for side shield or semi side shield PMR writer application Improved writability and a reduction in adjacent track erasure are achieved in a PMR writer with a large flare angle of 45 and 90 degrees in the main write pole and a full side shield or partial side shield configuration around the narrow write pole section and writ... | 01/18/2011 |
| 7864490 | CPP head with parasitic shunting reduction The series resistance of a CPP GMR stack can be reduced by shaping it into a small upper, on a somewhat larger, lower part. Because of the sub-micron dimensions involved, good alignment between these is normally difficult to achieve. The present invention discloses ... | 01/04/2011 |
| 7863060 | Method of double patterning and etching magnetic tunnel junction structures for spin-transfer torque MRAM devices A method for forming a MTJ in a STT-MRAM is disclosed in which the easy-axis CD is determined independently of the hard-axis CD. One approach involves two photolithography steps each followed by two plasma etch steps to form a post in a hard mask which is transferre... | 01/04/2011 |
| 7861420 | Concrete form alignment device This invention provides a device and a method for aligning concrete forms. It relates to a device and a method which is used in conjunction with hollow, shaped concrete forms such as Sonotube forms in order to align, square and properly site said forms to produce op... | 01/04/2011 |
| 7861401 | Method of forming a high performance tunneling magnetoresistive (TMR) element A high performance TMR element is fabricated by inserting an oxygen surfactant layer (OSL) between a pinned layer and AlOx tunnel barrier layer in a bottom spin valve configuration. The pinned layer preferably has a SyAP configuration with an outer pinned layer, a R... | 01/04/2011 |
| 7861399 | Tool for loading a head onto a disk of a hard disk drive A method for loading single head in a hard disk drive includes the following steps: mounting a head assembly (30) in a baseplate (10) of a hard disk drive, the head assembly comprising an actuator arm (32), a suspension (34) and a HGA, th... | 01/04/2011 |
| 7855912 | Circuit and method for multiple-level programming, reading, and erasing dual-sided nonvolatile memory cell A control apparatus programs, reads, and erases trapped charges representing multiple data bits from a charge trapping region of a NMOS dual-sided charge-trapping nonvolatile memory cell includes a programming circuit, an erasing circuit, and a reading circuit. The ... | 12/21/2010 |
| 7852662 | Spin-torque MRAM: spin-RAM, array A spin-torque MRAM array has MRAM cells arranged in rows and columns. Bit lines are connected to each of the MRAM cells on each column. Source select lines are connected to each MRAM cell of a pair of rows and are oriented orthogonally to the bit lines. Write lines ... | 12/14/2010 |
| 7843251 | HVNMOS/HVPMOS switched capacitor charge pump having ideal charge transfer An integrated circuit for a charge pump with a charge stage and a pump stage and a single High-Voltage PMOS (HVPMOS) transistor as the main switch for each stage and two times two minimum HVPMOS transistors in series as a bulk switch with fixed bulk connections, whe... | 11/30/2010 |
| 7843021 | Double-side mountable MEMS package The MEMS package has a mounting substrate on which one or more transducer chips are mounted wherein the mounting substrate has an opening. A top cover is attached to and separated from the mounting substrate by a spacer forming a housing enclosed by the top cover, t... | 11/30/2010 |
