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| Number | Title | Issue Date |
| 6686212 | Method to deposit a stacked high-.kappa. gate dielectric for CMOS applications A method of forming a layer of high-.kappa. dielectric material in an integrated circuit includes preparing a silicon substrate; depositing a first layer of metal oxide using ALD with a metal nitrate precursor; depositing another layer of metal oxide usin... | 02/03/2004 |
| 6607971 | Method for extending a laser annealing pulse A method for an efficient extended pulse laser annealing process is provided. The method comprises: supplying a substrate with a thickness; selecting an energy density; selecting an extended pulse duration; laser annealing a substrate region; in response ... | 08/19/2003 |
| 6596344 | Method of depositing a high-adhesive copper thin film on a metal nitride substrate A method for chemical vapor deposition of copper metal thin film on a substrate includes heating a substrate onto which the copper metal thin film is to be deposited in a chemical vapor deposition chamber; vaporizing a precursor containing the copper meta... | 07/22/2003 |
| 6593161 | System and method for cleaning ozone oxidation A method has been provided for the removal of oxidation from a substrate surface formed as the result of an ozone cleaning process in the fabrication of a liquid crystal display (LCD). A first method uses a dry etchant, such as CL2 gas, to remo... | 07/15/2003 |
| 6590243 | Ferroelastic lead germanate thin film and deposition method A Pb3 GeO5 phase PGO thin film is provided. This film has ferroelastic properties that make it ideal for many microelectromechanical applications or as decoupling capacitors in high speed multichip modules. This PGO film is uniquely ... | 07/08/2003 |
| 6586344 | Precursors for zirconium and hafnium oxide thin film deposition A method of making a precursor for a thin film formed by chemical vapor deposition processes, includes mixing ZCl4 with H(tmhd)3 solvent and benzene to form a solution, where Z is an element taken from the group of elements consistin... | 07/01/2003 |
| 6585821 | Method of monitoring PGO spin-coating precursor solution synthesis using UV spectroscopy A method of monitoring the synthesis of a PGO spin-coating precursor solution includes monitoring heating of the solution with a UV spectrometer and terminating the heating step when a solution property reaches a predetermined value. The method utilizes t... | 07/01/2003 |
| 6583000 | Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation A method of forming a CMOS device includes preparing a silicon substrate, including forming plural device regions on the substrate; epitaxially forming a strained SiGe layer on the substrate, wherein the SiGe layer has a germanium content of between about... | 06/24/2003 |
| 6579793 | Method of achieving high adhesion of CVD copper thin films on TaN Substrates A fabrication process provides for achieving high adhesion of CVD copper thin films on metal nitride substrates, and in particular, on substrates having an outermost TaN layer. The method comprises introducing a certain amount of water vapor to the initia... | 06/17/2003 |
| 6576293 | Method to improve copper thin film adhesion to metal nitride substrates by the addition of water A method of forming a copper thin film by chemical vapor deposition, includes introducing a wafer into a chemical vapor deposition chamber; humidifying helium gas with water to form a wet helium gas for use as the atmosphere in the chemical vapor depositi... | 06/10/2003 |
| 6576292 | Method of forming highly adhesive copper thin films on metal nitride substrates via CVD A method of forming a highly adhesive copper thin film on a metal nitride substrate includes preparing a substrate having a metal nitride barrier layer formed on a portion thereof; heating the substrate in a chemical vapor deposition chamber to a temperat... | 06/10/2003 |
| 6573134 | Dual metal gate CMOS devices and method for making the same A method of fabricating a dual metal gate CMOS includes forming a gate oxide in a gate region and depositing a place-holder gate in each of a n-well and p-well; removing the place-holder gate and gate oxide; depositing a high-k dielectric in the gate regi... | 06/03/2003 |
| 6566753 | Composite iridium barrier structure with oxidized refractory metal companion barrier An Ir--M--O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film effectively prevents oxygen diffusion, and is resistant to high temp... | 05/20/2003 |
| 6566148 | Method of making a ferroelectric memory transistor A method of making a ferroelectric memory transistor includes preparing a silicon substrate including forming plural active areas thereon; depositing a layer of gate insulator on the substrate, and depositing a layer of polysilicon over the gate insulator... | 05/20/2003 |
| 6562703 | Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content A method is provided for forming a relaxed silicon germanium layer with a high germanium content on a silicon substrate. The method comprises: depositing a single-crystal silicon (Si) buffer layer overlying the silicon substrate; depositing a layer of sin... | 05/13/2003 |
| 6555916 | Integrated circuit prepared by selectively cleaning copper substrates, in-situ, to remove copper oxides A system and method of selectively etching copper surfaces free of copper oxides in preparation for the deposition of an interconnecting metallic material is provided The method removes metal oxides with ଲ-diketones, such as Hhfac. The Hhfac is deli... | 04/29/2003 |
| 6555874 | Method of fabricating high performance SiGe heterojunction bipolar transistor BiCMOS on a silicon-on-insulator substrate A semiconductor structure includes, on a SOI substrate, a CMOS formed on the substrate; and a SiGe HBT formed on the substrate. A method of fabricating a semiconductor structure includes preparing a SOI substrate having plural active regions thereon; form... | 04/29/2003 |
| 6555456 | Method of forming iridium conductive electrode/barrier structure A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC processes involving annealing. Separating silicon substrate from ... | 04/29/2003 |
| 6551947 | Method of forming a high quality gate oxide at low temperatures A method of low-temperature oxidation of a silicon substrate includes placing a silicon wafer in a vacuum chamber; maintaining the silicon wafer at a temperature of between about room temperature and 350° C.; introducing an oxidation gas in the vacuum ch... | 04/22/2003 |
| 6548364 | Self-aligned SiGe HBT BiCMOS on SOI substrate and method of fabricating the same A SiGe HBT BiCMOS on a SOI substrate includes a self-aligned base/emitter junction to optimize the speed of the HBT device. The disclosed SiGe BiCMOS/SOI device has a higher performance than a SiGe BiCMOS device on a bulk substrate. The disclosed device a... | 04/15/2003 |
| 6537361 | Method of the synthesis and control of PGO spin-coating precursor solutions A method of synthesizing a PGO spin-coating precursor solution includes utilizing the starting materials of lead acetate trihydrate (Pb(OAc)2.cndot.3H.sub.2 O) and germanium alkoxide (Ge(OR)4 (R=C2 H5 and CH(CH | 03/25/2003 |
| 6534871 | Device including an epitaxial nickel silicide on (100) Si or stable nickel silicide on amorphous Si and a method of fabricating the same An integrated circuit device, and a method of manufacturing the same, comprises an epitaxial nickel silicide on (100) Si, or a stable nickel silicide on amorphous Si, fabricated with a cobalt interlayer. In one embodiment the method comprises depositing a... | 03/18/2003 |
| 6534787 | Asymmetrical MOS channel structure with drain extension A method of forming a MOS transistor without a lightly doped drain (LDD) region between the channel region and drain is provided. The channel region and a drain extension are formed from two separate tilted ion implantation processes, after the deposition... | 03/18/2003 |
| 6531325 | Memory transistor and method of fabricating same A ferroelectric memory transistor includes a substrate having active regions therein; a gate stack, including: a high-k insulator element, including a high-k cup and a high-k cap; a ferroelectric element, wherein said ferroelectric element is encapsulated... | 03/11/2003 |
| 6531324 | MFOS memory transistor & method of fabricating same A ferroelectric transistor gate structure with a ferroelectric gate and passivation sidewalls is provided. The passivation sidewalls serve as an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroelectric gate. A method o... | 03/11/2003 |
| 6510073 | Two transistor ferroelectric non-volatile memory A two transistor ferroelectric non-volatile memory cell includes a ferroelectric capacitor connected to a word line and having an upper electrode and a lower electrode; a first MOS transistor having a linear capacitor located at a gate oxide region thereo... | 01/21/2003 |
| 6509268 | Thermal densification in the early stages of copper MOCVD for depositing high quality Cu films with good adhesion and trench filling characteristics A method of forming a copper thin film on an integrated circuit substrate having a nitride component includes preparing the substrate; treating the substrate prior to copper deposition; depositing copper during a very short duration copper deposition step... | 01/21/2003 |
| 6509260 | Method of shallow trench isolation using a single mask A method of shallow trench isolation includes preparing a substrate, including forming mesa structures thereon; forming a barrier cap on the mesa structures; forming an oxide multi-layer structure over the mesas and barrier caps, including: depositing a f... | 01/21/2003 |
| 6506643 | Method for forming a damascene FeRAM cell structure A three-dimensional ferroelectric structure and fabrication method are provided. The ferroelectric capacitor structure permits immediate contact between a noble metal capacitor electrode and a transistor electrode. This direct connection minimizes process... | 01/14/2003 |
| 6506637 | Method to form thermally stable nickel germanosilicide on SiGe A thermally stable nickel germanosilicide on SiGe integrated circuit device, and a method of making the same, is disclosed. During fabrication of the device iridium or cobalt is added at the Ni/SiGe interface to decrease the sheet resistance of the device... | 01/14/2003 |
| 6503763 | Method of making MFMOS capacitors with high dielectric constant materials A MFMOS one transistor memory structure for ferroelectric non-volatile memory devices includes a high dielectric constant material such as ZrO2, HfO2, Y2 O3, or La2 O3, or the like, or mixt... | 01/07/2003 |
| 6503314 | MOCVD ferroelectric and dielectric thin films depositions using mixed solvents A ferroelectric and dielectric source solution for use in chemical vapor deposition processes includes a ferroelectric/dielectric chemical vapor deposition precursor; and a solvent for carrying the ferroelectric/dielectric chemical vapor deposition precur... | 01/07/2003 |
| 6495401 | Method of forming an ultra-thin SOI MOS transistor A transistor structure includes a main gate silicon active region having a thickness of less than or equal to 30 nm; and auxiliary gate active regions located on either side of said main gate silicon active region, said auxiliary gate active regions being... | 12/17/2002 |
| 6495378 | Ferroelastic lead germanate thin film and deposition method A Pb3 GeO5 phase PGO thin film is provided. This film has ferroelastic properties that make it ideal for many microelectromechanical applications or as decoupling capacitors in high speed multichip modules. This PGO film is uniquely ... | 12/17/2002 |
| 6495377 | Method of fabricating ferroelectric memory transistors A method of fabricating a ferroelectric memory transistor includes preparing a substrate, including isolating an active region; forming a gate region; depositing an electrode plug in the gate region; depositing an oxide side wall about the electrode plug;... | 12/17/2002 |
| 6495000 | System and method for DC sputtering oxide films with a finned anode A system and method have been provided for an improved oxide deposition process using a DC sputtering magnetron. The invention prolongs the useful life of the anode by providing shielded electron collection surfaces, to minimize the deposition of insulato... | 12/17/2002 |
| 6479304 | Iridium composite barrier structure and method for same An Ir combination film has been provided that is useful in forming an electrode of a ferroelectric capacitor. The combination film includes tantalum and oxygen, as well as iridium. The Ir combination film effectively prevents oxygen diffusion, and is resi... | 11/12/2002 |
| 6475813 | MOCVD and annealing processes for C-axis oriented ferroelectric thin films A method of fabricating a c-axis ferroelectric thin film includes preparing a substrate; depositing a layer of ferroelectric material by metal organic chemical vapor deposition, including using a precursor solution having a ferroelectric material concentr... | 11/05/2002 |
| 6472337 | Precursors for zirconium and hafnium oxide thin film deposition A method of making a precursor for a thin film formed by chemical vapor deposition processes, includes mixing ZCl4 with H(tmhd)3 solvent and benzene to form a solution, where Z is an element taken from the group of elements consistin... | 10/29/2002 |
| 6468901 | Nickel silicide including iridium for use in ultra-shallow junctions with high thermal stability and method of manufacturing the same An integrated circuit device, and a method of manufacturing the same, including nickel silicide on a silicon substrate fabricated with an iridium interlayer. In one embodiment the method comprises depositing an iridium (Ir) interface layer between the Ni ... | 10/22/2002 |
