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| Number | Title | Issue Date |
| 8181178 | Online batch execution Online batch processing. A job request is received from a user for processing. The job request includes a job configuration and a plurality of operations to process the data. The job configuration is extracted from the job request and stored in a configuration cache... | 05/15/2012 |
| 8179171 | Power up circuit Power up circuit. An example power up circuit includes a switch for charging a power node of an electronic device. A level detector is used for monitoring charge level of the power node. Further, the power up circuit includes one or more power switches for providing... | 05/15/2012 |
| 8176089 | Efficient storage and manipulation of structured documents A method and system for efficient processing of structured documents is provided. The method includes creating fragments of the structured document. The method also includes creating an ordered list including a plurality of descriptors pointing to the structured doc... | 05/08/2012 |
| 8149152 | Capacitor based digital to analog converter layout design for high speed analog to digital converter A method and system for capacitor based digital to analog converter design layout for high speed analog to digital converter are provided. The method includes arranging a plurality of metal plates to form the capacitor. Each of the plurality of metal plates includes... | 04/03/2012 |
| 8117188 | Evaluation of multiple Xpath queries in a streaming XPath processor Evaluation of Multiple XPath Queries in a Streaming XPath Processor. A hit of a location path is determined in a SAX event. All XPath queries corresponding to the location path are then identified. XML nodes associated with the SAX event is identified as potential o... | 02/14/2012 |
| 8106706 | DC biasing circuit for a metal oxide semiconductor transistor A method for biasing a MOS transistor includes AC coupling an input signal from an amplifier stage to a gate of the MOS transistor. The method includes connecting a pair of diodes in an opposing parallel configuration to a bias transistor and a current source. Furth... | 01/31/2012 |
| 8055652 | Dynamic modification of Xpath queries Modifying Xpath queries dynamically during an ongoing Xpath evaluation. A modification request comprising at least one Xpath query in response to an input is received in an ongoing Xpath evaluation on an online stream of XML messages. A current generation of Nondete... | 11/08/2011 |
| 8055611 | Simplified XPath evaluation in XML document validation Simplified XPath evaluation in Extensible Markup Language (XML) document validation. XML schema is compiled into a one dimensional array of schema nodes, where a schema node represents a complex/simple type definition in the XML scheme. Identity constraints are proc... | 11/08/2011 |
| 8031542 | Low leakage ROM architecture A Read only memory (ROM) with minimum leakage includes a ROM array including a first transistor, wherein a drain, a source, a gate, and a bulk of the first transistor is electrically connected to a logic zero in the idle state for ensuring zero junction and sub-thre... | 10/04/2011 |
| 8031541 | Low leakage ROM architecture Read only memory (ROM) with minimum leakage is provided. The ROM includes a read only memory array. The read only memory array includes a first transistor, wherein a drain, a source, a gate, and a bulk of the first transistor is electrically connected to a logic zer... | 10/04/2011 |
| 8004310 | Power supply regulation Power supply regulation. A power supply regulation system includes a transistor through which power is carried. The system also includes a switch connected to a gate of the transistor. Further, the system includes a transmission gate responsive to an input signal to... | 08/23/2011 |
| 7937392 | Classifying uniform resource identifier (URI) using xpath expressions Classifying Uniform Resource Identifier (URI) expression using one or more XPath expressions. A request comprising a URI expression and additional network information is modeled as a logical XML document representation. One or more XPath expressions are then created... | 05/03/2011 |
| 7925940 | Enhancing speed of simulation of an IC design while testing scan circuitry A computer is programmed to prepare a computer program for simulating operation of an integrated circuit (IC) chip, in order to test scan circuitry therein. The computer is programmed to trace a path through combinational logic in a design of the IC chip, starting f... | 04/12/2011 |
| 7911873 | Digital delay locked loop implementation for precise control of timing signals An efficient implementation of a digital delay locked loop (DLL) circuit is disclosed. The delay locked loop (DLL) circuit includes a phase detector circuit, a clock divider circuit, a delay, a delay control finite state machine (FSM) and an output low pass filter. ... | 03/22/2011 |
| 7904766 | Statistical yield of a system-on-a-chip Improving statistical yield of a system-on-a-chip. The system-on-a-chip includes several memory systems. Each memory system includes a large number of memories. The memories are tested to identify any faulty memories. One or more margins of the faulty memories are t... | 03/08/2011 |
| 7882138 | Progressive evaluation of predicate expressions in streaming XPath processor Progressive evaluation of predicate expressions in streaming XPath processor. A method for evaluating multiple XPath predicate expressions of multiple XPath queries includes identifying includes determining hit of a location path in a SAX event. All XPath predicate ... | 02/01/2011 |
| 7868688 | Leakage independent very low bandwith current filter A current filter circuit is provided. The current filter circuit comprises a source transistor comprising a drain, a gate, and a source. The source of the source transistor is coupled to a reference voltage terminal, the gate of the source transistor is coupled to t... | 01/11/2011 |
| 7821436 | System and method for reducing power dissipation in an analog to digital converter A system and method for reducing the power dissipated in an Analog to Digital Converter (ADC). The method includes the steps of: receiving a residue output from a previous phase of a plurality of clock phases where the plurality of clock phases includes a sample-and... | 10/26/2010 |
| 7675333 | Multi-phase delay locked loop with equally-spaced phases over a wide frequency range and method thereof A Delay Locked Loop (DLL) and method for generating multiple equally spaced phases over a wide frequency range is disclosed. The DLL includes a delay line, and a control module. The delay line receives a reference clock signal and outputs a final delay clock signal ... | 03/09/2010 |
| 7570191 | Methods and systems for designing high resolution analog to digital converters Methods and systems for designing a high resolution analog to digital converter (ADC) by eliminating the errors in the ADC stages. An error correction architecture and method eliminate the gain error and settling error of the residue amplifier in a pipelined ADC sta... | 08/04/2009 |
| 7570181 | Method and system for input voltage droop compensation in video/graphics front-ends Methods and systems for input voltage droop compensation in video/graphics front-end systems. The method of an embodiment of the invention captures input voltage information supplied to an Analog-to-Digital Converter (ADC) operatively coupled to a bypass capacitor i... | 08/04/2009 |
| 7548104 | Delay line with delay cells having improved gain and in built duty cycle control and method thereof A delay line including a sequence of identical delay cells with improved gain and in built duty cycle distortion control and a method thereof is disclosed. Each delay cell of the sequence includes a current source, four transistors, and a load capacitor. A gate of t... | 06/16/2009 |
| 7538701 | System and method for improving dynamic performance of a circuit A system and method for improving the dynamic performance in an analog-to-digital converter (ADC) by randomizing the differential mismatch. The differential mismatch in an input analog signal is randomized by flipping the input signal and output signal randomly.... | 05/26/2009 |
