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| Number | Title | Issue Date |
| 6682399 | Pressure monitoring system for chemical-mechanical polishing A pressure monitoring system arranged in a close loop circuit, intended to facilitate chemical mechanical polishing (CMP), is disclosed. The pressure monitoring circuit includes an air regulator, a pressure transducer, a pressure difference transducer and... | 01/27/2004 |
| 6680256 | Process for planarization of flash memory cell A process for planarization of a flash memory cell is described. A first polysilicon pattern having a top is formed over a substrate. A high-density plasma (HDP) oxide layer is deposited on the first polysilicon pattern, wherein the HDP oxide layer has a ... | 01/20/2004 |
| 6606244 | Pointing device having computer host The present invention discloses a pointing device having a computer host. The present invention comprises a cursor move device for moving the cursor and a command input device for inputting commands to the computer host. Among these, the computer host fur... | 08/12/2003 |
| 6593182 | Method for forming multiple gate oxide layer with the plasma oxygen doping First of all, a semiconductor substrate is provided, and then a photoresist layer is formed and defined on the semiconductor substrate. The pulsed plasma doping is then performed by the photoresist layer as a mask to form a doping region and an undoping r... | 07/15/2003 |
| 6576511 | Method for forming nitride read only memory A semiconductor substrate having a source/drain region is initially provided, wherein a channel is formed in the space between the source/drain region within the semiconductor substrate. Then the oxide-nitride-oxide layers are formed on the semiconductor ... | 06/10/2003 |
| 6555405 | Method for forming a semiconductor device having a metal substrate The present invention provides a method for forming a semiconductor device with a metal substrate. The method includes providing at least one semiconductor substrate; forming at least one semiconductor layer on the semiconductor substrate; forming the met... | 04/29/2003 |
| 6541749 | Photodetector pixel cell A photodetector pixel cell is proposed by the invention. Herein, the presented pixel cell comprises a diode region and a circuit region, and is enclosed by isolation. Moreover, the doped region is existed inside both regions. The structure of the presente... | 04/01/2003 |
| 6537652 | Biaxially oriented electrical insulation film having improved shrinkage at elevated temperatures A biaxially oriented polypropylene film is described. The n-heptane-insoluble content of the film has a chain isotacticity index, measured by 13-C-NMR spectroscopy, of at least 95%. In particular, the film should have the lowest possible shrinkage (transv... | 03/25/2003 |
| 6531393 | Salicide integrated solution for embedded virtual-ground memory A salicide integrate solution for embedded virtual-ground memory of the present invention provides a controlled distance between poly gates. In this way, the spacers formed on the sidewalls of the poly gates become self fill-upon spacers, and the surface ... | 03/11/2003 |
| 6524962 | Method for forming dual-damascene interconnect structure The present invention provides a method for forming a dual-damascene structure and comprises following steps. First, a substrate is provided. Then, a first low-k dielectric layer and a second low-k dielectric layer are sequentially formed on the substrate... | 02/25/2003 |
| 6524772 | Method of manufacturing phase grating image sensor A method of manufacturing a phase grating image sensor is disclosed. The method uses conventional photolithography and etching methods to form a plurality of phase grating lenses into the conventional flattening layer on which the conventional micro-lens ... | 02/25/2003 |
| 6526545 | Method for generating wafer testing program A method for generating a semiconductor test program is disclosed. The method is practiced by first creating a test plan according to a test key database, then take out the related parameters from the other databases in light of the test item in the test ... | 02/25/2003 |
| 6519869 | Method and apparatus for drying semiconductor wafers A method and an apparatus for drying semiconductor wafers by using an IPA drying apparatus. The present invention uses a vapor generator to generate an IPA vapor. The IPA vapor is generated and saved in a closed surrounding and then transferred in a porou... | 02/18/2003 |
| 6521333 | Polymeric films Biaxially oriented films having a substantially non-voided pigmented core layer of a propylene homopolymer, an intermediate layer of a voided propylene homopolymer, and two outer layers of a heat sealable olefin polymer. Such films can be heat sealed to f... | 02/18/2003 |
| 6521470 | Method of measuring thickness of epitaxial layer A method of measuring the thickness of an epitaxial layer is disclosed. The method is particularly useful in measuring the epitaxial layer with a doping concentration lower than or similar to the substrate on which the epitaxial layer is formed. The metho... | 02/18/2003 |
| 6509228 | Etching procedure for floating gate formation of a flash memory device A method of forming floating gates for flash memory is disclosed to improve contact properties with erase gates. The method includes formation of a tunnel oxide layer, a polysilicon layer and an interpoly insulating layer. These layers are patterned in tw... | 01/21/2003 |
| 6506500 | Polyolefin film, its use, and process for its production A biaxially oriented polyolefin film having more than one layer and made from a base layer and from at least one outer layer. The base layer include a fatty amide and the outer layer include at least 80% by weight of a linear olefin polymer. The film is s... | 01/14/2003 |
| 6500972 | Synthesis of TMBQ with transition metal-containing molecular sieve as catalysts A method of oxidizing trimethylphenol (TMP) to trimethylbenzoquinone (TMBQ) by various molecular sieves containing various transition metals. In this method, TMP, a molecular sieve containing a transition metal in its framework, an oxidant and a solvent a... | 12/31/2002 |
| 6495472 | Method for avoiding erosion of conductor structure during removing etching residues A method for avoiding erosion of a conductor structure during a procedure of removing etching residues is provided. The method provides a semiconductor structure and the conductor structure formed therein. A cap layer is formed on the conductor structure ... | 12/17/2002 |
| 6495417 | Method for increasing tolerance of contact extension alignment in COB DRAM A method for increasing tolerance of contact extension alignment in a capacitor over a bit line of a dynamic random access memory is disclosed. Firstly, a substrate having a gate, a bit line and a source/drain region is provided and a insulating layer is ... | 12/17/2002 |
| 6492968 | Method for detecting color mixing defects on liquid crystal monitors A method for detecting defects when mixed colors among color channels on a liquid crystal monitor is disclosed. The disclosed method utilizes the interference of four channels of red, green, blue and white colors to check whether a detected liquid crystal... | 12/10/2002 |
| 6492235 | Method for forming extension by using double etch spacer A method for forming extension by using double etch spacer. The method includes at least the following steps. First a semiconductor substrate is provided. Then, the gate is formed on the substrate. A first spacer is formed on a sidewall of the gate. Then,... | 12/10/2002 |
| 6492240 | Method for forming improved high resistance resistor by treating the surface of polysilicon layer Performance of the high resistance resistor, which is polysilicon, is improved by treating the surface of the polysilicon layer in mixed signal integrated circuits for ADSL (Asymmetric Digital Subscriber Line) broadband service application. This treated s... | 12/10/2002 |
| 6488269 | Wet scrubber A scrubber for removing soluble materials from harmful gaseous effluents with high efficiency and safety is disclosed. By using twice mixes of the scrubbing liquid and the harmful gaseous effluent, the scrubber meets the standards of environmental protect... | 12/03/2002 |
| 6489206 | Method for forming self-aligned local-halo metal-oxide-semiconductor device A method for forming a self-aligned local-halo metal-oxide-semiconductor device is provided. The present method is characterized in that a pair of first sidewall spacers is firstly formed on opposite sides of a gate electrode over a semiconductor substrat... | 12/03/2002 |
| 6489196 | Method of forming a capacitor with high capacitance and low voltage coefficient The present invention provides a method of forming a capacitor in an integrated circuit. The method comprises providing a semiconductor substrate having a conductive layer thereon. The partial conductive layer is removed to form an electrode. A plurality ... | 12/03/2002 |
| 6487114 | Method of reading two-bit memories of NROM cell A method of reading two-bit information in Nitride Read only memory (NROM) cell simultaneously. According to outputted voltage in drain or source of the NROM, it can identify a logical two-bit combination massage of the NROM. The method includes: groundin... | 11/26/2002 |
| 6486500 | Led structure having a schottky contact and manufacturing method A structure and manufacturing method of LED is disclosed. The manufacturing method of the structure of LED comprises: providing a substrate; on the substrate, forming in sequence a buffer layer, a first confining layer, an active layer, a second confining... | 11/26/2002 |
| 6483605 | Method for transforming an image from a resolution to a lower resolution A method for transforming a source image into a target image with the original resolution N time to the target resolution is disclosed. The original image data of pixels is read and stored for N scan lines and grouped into a series of matrices each includ... | 11/19/2002 |
| 6482739 | Method for decreasing the resistivity of the gate and the leaky junction of the source/drain This invention relates to a method for decreasing the resistivity of the gate and leaky junction of the source/drain, more particularly, to the method for forming a metal silicide layer at the gate region and the source/drain region by using two times in ... | 11/19/2002 |
| 6484023 | Apparatus of a wireless electronic account book An apparatus and a control system to communicate with a portable wireless communication device to act as an electronic account book. The system comprises: an information providing dealer to provide a personal bank savings; an information transmission deal... | 11/19/2002 |
| 6479317 | Method for integrating anti-reflection layer and salicide block The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises the following steps: A substrate is provided that is divided into at least a sensor area and a transistor area, wherein the sensor area c... | 11/12/2002 |
| 6465837 | Scaled stack-gate non-volatile semiconductor memory device A scaled stack-gate non-volatile semiconductor memory device having atapered floating-gate structure is disclosed by the present invention, in which a stack-gate structure including a masking dielectric layer over a control-gate layer over an intergate di... | 10/15/2002 |
| 6458608 | Alignment check method on printed circuit board The present invention provides a checking alignment method for a printed circuit board (PCB). The present method comprises following steps. First, a substrate and a PCB are provided. Then, a tape automated bonding process is performed to attach the substr... | 10/01/2002 |
| 6458705 | Method for forming via-first dual damascene interconnect structure In accordance with the present invention, a method for forming a via-first dual damascene interconnect structure by using gap-filling material whose thickness is easily controlled by a developer is provided. The essential part of the present invention is ... | 10/01/2002 |
| 6455371 | Method for forming capacitor of a DRAM having a wall protection structure The present invention provides a method for forming capacitor of a dynamic random access memory cell. The method comprises providing a substrate and the word line structures formed thereon. A first dielectric layer is deposited on the substrate and the wo... | 09/24/2002 |
| 6455389 | Method for preventing a by-product ion moving from a spacer This invention relates to a method that prevents by-productions from moving from a spacer. In particular by using an offset liner, a liner with a treated surface and a spacer that is formed by using the atomic layer deposition method or the rapid thermal ... | 09/24/2002 |
| 6455943 | Bonding pad structure of semiconductor device having improved bondability A bonding pad structure of semiconductor device having improved bondability is disclosed. The bonding pad structure uses at least one level comprising conductive islands and conductive plugs used as fasteners to prevent the bonding pad layer from peeling ... | 09/24/2002 |
| 6455383 | Methods of fabricating scaled MOSFETs The scaled MOSFETs having a conductive barrier-metal layer sandwiched between a metal layer or a thick silicide layer on the top and a first conductive gate layer at the bottom are disclosed by the present invention, in which the first conductive gate lay... | 09/24/2002 |
| 6451680 | Method for reducing borderless contact leakage by OPC This invention increases the overlapped area between the diffusion area and the borderless contact by using optical proximity correction (OPC) method. The method includes performing an optical proximity correction on an outer corner of an active area mask... | 09/17/2002 |
