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| Number | Title | Issue Date |
| 5045729 | TTL/ECL translator circuit A TTL/ECL translation circuit for translating TTL level input signals, which have a high voltage state and a low voltage state, to ECL level output signals, which have a high voltage state and a low voltage state. The translation circuit includes a TTL in... | 09/03/1991 |
| 4985643 | Speed enhancement technique for CMOS circuits A speed enhancement technique for CMOS circuits is disclosed. In the series of logic stages, nodes in the signal path of a pulse are set by preceding logic stages, then reset by feedback from subsequent logic stages. This eliminates the capacitive burden ... | 01/15/1991 |
| 4908679 | Low resistance Schottky diode on polysilicon/metal-silicide A Schottky diode is fabricated according to the following steps: forming a layer of metal-silicide on an underlying dielectric layer, forming a polysilicon layer on the upper surface of the metal-silicide layer, forming a second dielectric layer on the up... | 03/13/1990 |
| 4903087 | Schottky barrier diode for alpha particle resistant static random access memories An improved Schottky barrier diode for increasing the alpha particle resistance of static random access memories includes an extra implanted N-type region at the surface of the epitaxial layer to increase the impurity concentration there to about 1×10 | 02/20/1990 |
