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| Number | Title | Issue Date |
| 4820944 | Method and apparatus for dynamically controlling the timing of signals in automatic test systems Apparatus for delaying an electrical signal includes a sequence of stages, each for delaying the signal. A coarser stage delays the signal by multiples of a predetermined fundamental delay interval and a finer stage provides for fine adjustment of the del... | 04/11/1989 |
| 4718018 | Digital method for synthesizing composite video signals A digital test system for generating a test signal in the form of an amplitude and/or phase modulated sinusoidal signal at a given carrier frequency is disclosed. Arbitrary amplitude and phase modulation functions may be selected and are provided to the s... | 01/05/1988 |
| 4710747 | Method and apparatus for improving the accuracy and resolution of an analog-to-digital converter (ADC) A system for increasing the accuracy and resolution of an ADC comprising a digital filter connected to the output of the ADC, a system clock for providing a digital filter clock signal, a low/pass filter/amplifier for generating a large-scale, rapidly var... | 12/01/1987 |
| 4465995 | Method and apparatus for analyzing an analog-to-digital converter with a nonideal digital-to-analog converter A method for statistically calibrating an analog-to-digital converter with an electronic test system. A digital-to-analog converter which has been calibrated by premeasured weighting coefficients with respect to two-state orthogonal signals is excited wit... | 08/14/1984 |
| 4396980 | Combined integrated injection logic and transistor-transistor logic microprocessor integrated circuit design A microprocessor integrated circuit design has improved partitioning between integrated injection logic (I2 L) and transistor-transistor logic (T2 L) in the integrated circuit. An information bus structure incorporating a bidirection... | 08/02/1983 |
| 4393473 | Random access memory preset circuitry Circuitry for presetting a bipolar random access memory includes switching transistors, responsive to an applied memory preset signal, for opening the circuit between the memory word lines and their respective current sources, for applying a positive volt... | 07/12/1983 |
| 4387145 | Lift-off shadow mask A method for forming a predetermined configuration of a film material comprises the steps of forming a layer of a first material on a surface, forming a layer of a second material on the first material wherein the first material has an etch rate greater t... | 06/07/1983 |
| 4384353 | Method and means for internal error check in a digital memory A semiconductor digital memory such as a charge coupled device is provided with error detection capability. Error logic responsive to a group of data on the input bus generates a first error code which is stored in memory along with the group of data. Whe... | 05/17/1983 |
| 4384350 | MOS Battery backup controller for microcomputer random access memory MOS Control circuitry for incorporation on a microcomputer IC chip for assuring adequate power to maintain the data in an associated static random access memory. A rechargeable battery provides standby power, and the voltage level of the battery is compar... | 05/17/1983 |
| 4380566 | Radiation protection for integrated circuits utilizing tape automated bonding A technique is disclosed for protecting integrated circuits from alpha particles. A central portion of a radiation resistant insulating substrate upon which electrically conductive leads are disposed is positioned in proximity to the integrated circuit. W... | 04/19/1983 |
| 4374011 | Process for fabricating non-encroaching planar insulating regions in integrated circuit structures A method for fabricating insulating regions in an integrated circuit structure is disclosed in which the insulating regions do not encroach upon the surrounding integrated circuit and in which a substantially planar surface across the top of the insulatin... | 02/15/1983 |
| 4354177 | Method and apparatus for calibrating an analog-to-digital converter for a digital-to-analog converter test system A method and apparatus for exciting the analog input of an analog-to-digital converter and examining the output by means of analysis with histograms to determine the amplitude probability distribution of each digital output value. The amplitude probabilit... | 10/12/1982 |
| 4352492 | Data storage apparatus A video game apparatus for connection to a standard television set and including an electronics-containing console having a plurality of parameter selection buttons and a chute mechanism for receiving a replaceable cartridge-containing supplementary elect... | 10/05/1982 |
| 4352061 | Universal test fixture employing interchangeable wired personalizers A universe of probes is contained within a platen in a spaced-apart, substantially parallel relationship with one another with their tips pointing in the same direction. Each probe is free to move longitudinally between an advanced or test position and a ... | 09/28/1982 |
| 4347434 | Hand held data bus analyzer A hand held logic probe serially clocks applied data bits into a shift register in response to a user actuated thumb switch. The shift register is coupled to a hexidecimal/octal converter which drives a digital display. The display is reset in response to... | 08/31/1982 |
| 4335333 | Raster scan color display system and method having improved pin cushion non-linearity correction A raster scan color display system for a CRT includes a vertical sweep system wherein a parabolic signal repeating at the horizontal sweep rate is multiplied with a vertical sweep signal corresponding to a linear ramp repeating at a vertical deflection ra... | 06/15/1982 |
| 4334157 | Data latch with enable signal gating A data latch of the kind having at least two operative modes, a transmitting or transparent mode or condition for transmitting data signals through the latch, and a latching mode or condition for latching and temporary storage by feedback of data signals ... | 06/08/1982 |
| 4331452 | Apparatus for crystal shaping In the present invention, a length of elongated single crystal ingot is mounted adjacent its ends and is ground while being rotated to provide a cylindrical shape. While still mounted, the crystal is rotated into a position to be x-rayed for the grinding ... | 05/25/1982 |
| 4330723 | Transistor logic output device for diversion of Miller current A transistor logic output device is provided with an active element discharging transistor coupled between the base of the pulldown element transistor and ground or low potential for actively controlling a route to ground or low potential for diverting an... | 05/18/1982 |
| 4322882 | Method for making an integrated injection logic structure including a self-aligned base contact An integrated injection logic device is formed in a pocket of semiconductor material surrounded by oxide isolation, and separated from a substrate by an intervening region of opposite conductivity. The steps for forming the integrated injection logic devi... | 04/06/1982 |
| 4321490 | Transistor logic output for reduced power consumption and increased speed during low to high transition In a transistor logic output device the improvement comprising an active element discharging transistor coupled between the base of the pulldown element transistor and ground or low potential for actively controlling a route to ground or low potential for... | 03/23/1982 |
| 4311927 | Transistor logic tristate device with reduced output capacitance A transistor logic tristate output gate or device is provided with active or passive element arrangements coupled between the enable gate on the one hand and the base of the pull down element transistor on the other hand. This coupling affords a low imped... | 01/19/1982 |
| 4308470 | Digital-to-analog switching interface circuit A transistor interface circuit for switching analog differential pairs in response to a flip-flop or combinational logic, both output signals of which remain either high or low during switching transitions. This circuitry prevents the differential pair fr... | 12/29/1981 |
| 4307307 | Bias control for transistor circuits incorporating substrate bias generators Control circuitry for sensing excessive substrate bias voltage in a circuit, such as an LSI N-channel MOS transistor circuit incorporating a substrate bias generator, and for maintaining an optimum bias voltage level by bypassing the excess to ground.... | 12/22/1981 |
| 4307324 | Phase locked loop motor speed control A precision motor speed control system employing a phase locked loop in which the inertial mass of the motor, its tachometer and motor driven devices, such as fly wheels, tape transports, etc., perform the functions of the usual low pass filter and voltag... | 12/22/1981 |
| 4298402 | Method of fabricating self-aligned lateral bipolar transistor utilizing special masking techniques A surface oriented lateral bipolar transistor having a base of narrow width is fabricated by using a doped polycrystalline silicon layer as an ion implantation mask when implanting ions for the emitter and base regions. In forming the doped polysilicon ma... | 11/03/1981 |
| 4289574 | Process for patterning metal connections on a semiconductor structure by using an aluminum oxide etch resistant layer A process for patterning plasma etchable regions on a semiconductor structure includes the steps of forming a layer of an oxide of aluminum over the surface of the semiconductor structure, forming an overlying layer of plasma etchable material on the laye... | 09/15/1981 |
| 4277882 | Method of producing a metal-semiconductor field-effect transistor A metal-semiconductor field-effect transistor is formed by providing a blanket layer of the same conductivity type as the semiconductor body, with field oxide subsequently being grown, and with a region of opposite conductivity type being formed to extend... | 07/14/1981 |
| 4276616 | Merged bipolar/field-effect bistable memory cell A compact bistable semiconductor memory cell usable in static electronic information storage devices includes a field-effect transistor merged with a bipolar transistor for storing a binary information bit.... | 06/30/1981 |
| 4257059 | Inverse transistor coupled memory cell A semiconductor memory cell comprising first and second bipolar cell transistors cross-coupled by the inverse transistor action of third and fourth bipolar transistors. Each cross-coupling transistor is formed by a single emitter diffusion in an existing ... | 03/17/1981 |
| 4255670 | Transistor logic tristate output with feedback A TTL transistor logic tristate output device particularly suitable for common bus applications including transistor and diode means for feedback of a portion of current from any output load and from stray capacitances to drive the pulldown element to gre... | 03/10/1981 |
| 4251317 | Method of preventing etch masking during wafer etching As a cassette holding wafers in an etchant bath is rotated, nitrogen gas is bubbled through the cassette adjacent the wafers to agitate the wafers, so as to ensure that etchant reaches all edge portions of the wafers.... | 02/17/1981 |
| 4230550 | Radiation curable barrier coating having flexibility and selective gloss A radiation curable barrier coating having chemical resistance to many solvents, flexibility when cured, selective gloss and excellent abrasion resistance at a coating thickness provided by lithographic printing methods comprises acrylated melamine resin ... | 10/28/1980 |
| 4122874 | Apparatus for straightening the leads of dual in-line packages Two movable members are selectable positioned to form a passageway for handling dual in-line packages. A wheel, comprising resilient material, and a spreader member are selectable positioned in correspondence with the movable members to engage the leads o... | 10/31/1978 |
| 4117347 | Charged splitting method using charge transfer device A charge-splitting device and method include a plurality of charge cells coupled to receive a charge in response to being simultaneously clocked into a charge receiving state by an applied clock signal. The received charge is split into predetermined char... | 09/26/1978 |
| 4014011 | Variable resolution display A display having variable resolution includes a plurality of discrete light emitting elements arranged in an array. Intervals between elements are quantized into a plurality of levels representing information to be displayed. Selected light emitting eleme... | 03/22/1977 |
| 4009379 | Portable programmable calculator displaying absolute line number addresses and key codes and automatically altering display formats A battery-powered hand-held programmable calculator for performing arithmetic, trigonometric and logarithmic functions and displaying the results thereof is provided with the capability of being fully programmable including branching based on data value. ... | 02/22/1977 |
| 3975648 | Flat-band voltage reference A flat-band voltage reference includes two insulated-gate field-effect transistors, hereinafter IGFETs, which are substantially identical except for their flat-band voltage characteristics and which are biased to carry equal drain currents at equal drain ... | 08/17/1976 |
| 3970923 | Apparatus for measuring sheet resistivity of semiconductor materials and diffused layers A device for measuring sheet resistivity of semiconductor materials and diffused layers uses a linear four-point probe having pneumatically-actuated contact pins coupled to a self-zeroing voltage amplifier and a current source having extremely high output... | 07/20/1976 |
| 3967266 | Display apparatus having improved cursor enhancement A non-interlaced raster-type display includes interface circuitry for displaying character patterns indicative of data signals manipulated by a processor under the control of a manually-operable keyboard. The displayed character patterns are enhanced by h... | 06/29/1976 |
