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| Number | Title | Issue Date |
| 7941654 | Local and global branch prediction information storage Embodiments of the invention provide an apparatus of storing branch prediction information. In one embodiment, an integrated circuit device includes a first table for storing local branch prediction information, a second table for storing global branch prediction in... | 05/10/2011 |
| 7940265 | Multiple spacial indexes for dynamic scene management in graphics rendering According to embodiments of the invention, separate spatial indexes may be created which correspond to dynamic objects in a three dimensional scene and static objects in the three dimensional scene. By creating separate spatial indexes for static and dynamic objects... | 05/10/2011 |
| 7937530 | Method and apparatus for accessing a cache with an effective address A method and apparatus for accessing a processor cache. The method includes executing an access instruction in a processor core of the processor. The access instruction provides an untranslated effective address of data to be accessed by the access instruction. The ... | 05/03/2011 |
| 7930569 | Firmware controlled dynamic voltage adjustment Methods, apparatus, articles of manufacture, and systems for providing a supply voltage to an electronic component, such as a processor, are provided. An executable software component, such as system firmware, may access a voltage selection value embedded in the com... | 04/19/2011 |
| 7900087 | Method and apparatus for correlating an out-of-range condition to a particular power connection Techniques for identifying UPS-sub-system interconnections using manual data, UPS identification signals, and variations in UPS voltage variations that produce error signals. Once interconnections have been identified an operating system can check the UPS/sub-system... | 03/01/2011 |
| 7884819 | Pixel color accumulation in a ray tracing image processing system By merging or adding the color contributions from objects intersected by secondary rays, the image processing system may accumulate color contributions to pixels from objects intersected by secondary rays as the further color contributions are determined. Furthermor... | 02/08/2011 |
| 7877548 | Shared buffer having hardware-controlled buffer regions Buffer memories having hardware controlled buffer space regions in which the hardware controls the dimensions of the various buffer space regions to meet the demands of a particular system. The hardware monitors the usage of the buffer data regions over time and sub... | 01/25/2011 |
| 7865769 | In situ register state error recovery and restart mechanism Embodiments of the invention relate to methods and systems for error detection and recovery from errors during pipelined execution of data. A cascaded, delayed execution pipeline may be implemented to maintain a precise machine state. In some embodiments, a delay of... | 01/04/2011 |
| 7852336 | Dynamic determination of optimal spatial index mapping to processor thread resources By mapping leaf nodes of a spatial index to processing elements, efficient distribution of workload in an image processing system may be achieved. In addition, processing elements may use a thread table to redistribute workload from processing elements which are exp... | 12/14/2010 |
| 7840757 | Method and apparatus for providing high speed memory for a processing unit Computer systems with direct updating of cache (e.g., primary L1 cache) memories of a processor, such as a central processing unit (CPU) or graphics processing unit (GPU). Special addresses are reserved for high speed memory. Memory access requests involving these r... | 11/23/2010 |
| 7836258 | Dynamic data cache invalidate with data dependent expiration According to embodiments of the invention, a distributed time base signal may be coupled to a memory directory which provides address translation for data located within a memory cache. The memory directory may have attribute bits which indicate whether or not the m... | 11/16/2010 |
| 7818503 | Method and apparatus for memory utilization One embodiment of the invention provides a method and apparatus for utilizing memory. The method includes reserving a first portion of a cache in a processor for an inbox. The inbox is associated with a first thread being executed by the processor. The method also i... | 10/19/2010 |
| 7808500 | Method for improving spatial index efficiency by jittering splitting planes Embodiments of the invention provide methods and apparatus to improve the efficiency of a ray tracing image processing system. According to one embodiment of the invention, when building a spatial index the position of a splitting plane used to create a bounding vol... | 10/05/2010 |
| 7796128 | Dynamically load balancing game physics using real-time object scaling The present invention provides methods and apparatus for dynamically varying a physics workload by scaling the classification of objects within a three-dimensional scene. According to embodiments of the invention, a physics engine may classify a plurality of objects... | 09/14/2010 |
| 7783860 | Load misaligned vector with permute and mask insert Embodiments of the invention provide logic within the store data path between a processor and a memory array. The logic may be configured to misalign vector data as it is stored to memory. By misaligning vector data as it is stored to memory, memory bandwidth may be... | 08/24/2010 |
| 7777197 | Vacuum reaction chamber with x-lamp heater Methods and apparatus for electron beam treatment of a substrate are provided. An electron beam apparatus that includes a vacuum chamber, at least one thermocouple assembly in communication with the vacuum chamber, a heating device in communication with the vacuum c... | 08/17/2010 |
| 7769987 | Single hot forward interconnect scheme for delayed execution pipelines A method and apparatus for forwarding data in a processor. The method includes providing at least one cascaded delayed execution pipeline unit having a first pipeline and a second pipeline, wherein the second pipeline executes instructions in a common issue group in... | 08/03/2010 |
| 7768863 | Package-based voltage control A device package that receives a voltage from a power supply on a motherboard and that includes provisions for a voltage control element that controls the power supply voltage. The provisions for the voltage control element are such that the voltage from the power s... | 08/03/2010 |
| 7758664 | Integrated containment system Embodiments of the invention generally provide a containment system having integrated bubble tight-dampers. In another embodiment, the containment system includes an integral auto-scan mechanism disposed in the housing of the containment system so that a filter elem... | 07/20/2010 |
| 7752413 | Method and apparatus for communicating between threads A method and apparatus for communicating between threads in a processor. The method includes reserving a first portion of a cache in a processor for an inbox. The inbox is associated with a first thread being executed by the processor. The method also includes recei... | 07/06/2010 |
| 7743646 | Axial flow scan testable filter system A filter system having in-situ scan capabilities is provided. In one embodiment of the invention, the system includes a downstream probe which may be rotated to scan the field of a filter installed in the system. The probe may be utilized for leak detection, velocit... | 06/29/2010 |
| 7739926 | Method and apparatus for v-bank filter bed scanning Embodiments of the invention generally related to a method and apparatus for scanning a v-bank filter. In one embodiment, a method for testing a v-bank filter includes providing an aerosol challenge to an upstream side of a v-bank filter, scanning a downstream side ... | 06/22/2010 |
| 7737974 | Reallocation of spatial index traversal between processing elements in response to changes in ray tracing graphics workload Embodiments of the invention provide methods and apparatus for reallocating workload related to traversal of a ray through a spatial index. In a first operating state a workload manager may be experiencing a first or a normal workload. In the first operating state t... | 06/15/2010 |
| 7730288 | Method and apparatus for multiple load instruction execution A method and apparatus for executing instructions. The method includes receiving a first load instruction and a second load instruction. The method also includes issuing the first load instruction and the second load instruction to a cascaded delayed execution pipel... | 06/01/2010 |
| 7730283 | Simple load and store disambiguation and scheduling at predecode Embodiments of the invention provide a processor for executing instructions. In one embodiment, the processor includes circuitry to receive a load instruction and a store instruction to be executed in the processor and detect a conflict between the load instruction ... | 06/01/2010 |
| 7720990 | Method and apparatus for handling service requests in a data processing system A method for handling service requests in a data processing system is disclosed. In response to a service request, a priority of the service request is determined by mapping a context of the service request to a service level agreement (SLA). SLA-aware and timeout-c... | 05/18/2010 |
| 7713435 | Heat exchange fluids comprising amine carboxylates Carboxylate salts of amines are used as components of heat exchange fluids. The amines may have a ratio of N to C of 1:0 to 1:12 and the carboxylate anion may be derived from an acid of the formula H(CH2)0-3COOH. A preferred monoamine heat exch... | 05/11/2010 |
| 7712528 | Process for dispersing nanocatalysts into petroleum-bearing formations Embodiments include methods for recovering petroleum products from a formation containing heavy crude oil. In one embodiment, a method includes flowing a catalytic material containing the nanocatalyst into the formation containing the heavy crude oil and exposing th... | 05/11/2010 |
| 7680985 | Method and apparatus for accessing a split cache directory A method and apparatus for accessing a cache. The method includes receiving a request to access the cache. The request includes an address of requested data to be accessed. The method also includes using a first portion of the address to perform an access to a first... | 03/16/2010 |
| 7676656 | Minimizing unscheduled D-cache miss pipeline stalls in a cascaded delayed execution pipeline A method and apparatus for minimizing unscheduled D-cache miss pipeline stalls is provided. In one embodiment, execution of an instruction in a processor is scheduled. The processor may have at least one cascaded delayed execution pipeline unit having two or more ex... | 03/09/2010 |
| 7675742 | Rack-mounted KVM module with positioning mechanism A rack-mounted KVM module is configured for a server rack. An L-shaped supporting frame, which has a vertical plane and a horizontal plane, is coupled to the sever rack. A flat panel display is coupled to the vertical sliding rail to move along the L-shaped supporti... | 03/09/2010 |
| 7667016 | Fluorescent proteins from and methods for using the same The present invention provides nucleic acid compositions encoding a novel colorless GFP-like protein, acGFP, from Aequorea coerulscens and fluorescent and non-fluorescent mutants and derivatives thereof, as well as peptides and proteins encoded by these nucle... | 02/23/2010 |
| 7660247 | Dynamic load-based credit distribution Methods and systems for dynamically adjusting credits used to distribute available bus bandwidth among multiple virtual channels, based on the workload of each virtual channel, are provided. Accordingly, for some embodiments, virtual channels with higher workloads r... | 02/09/2010 |
| 7657756 | Secure memory caching structures for data, integrity and version values Methods and apparatus that may be utilized to reduce latency associated with encryption based on externally stored security metadata are provided. When encrypted data is accessed for the first time, a cache line containing corresponding metadata used for decryption ... | 02/02/2010 |
| 7652223 | Electron beam welding of sputtering target tiles Embodiments of the invention provide a method of welding sputtering target tiles to form a large sputtering target. Embodiments of a sputtering target assembly with welded sputtering target tiles are also provided. In one embodiment, a method for welding sputtering ... | 01/26/2010 |
| D608743 | Shadow frame | 01/26/2010 |
| D608742 | Shadow frame | 01/26/2010 |
| 7650266 | Method of simulating deformable object using geometrically motivated model A method of simulating a deformable object comprises modeling deformable elasticity for the object by defining an actual shape and a goal shape and pulling points in the goal shape towards corresponding points in the goal shape. ... | 01/19/2010 |
| 7641247 | End effector assembly for supporting a substrate Generally, an end effector assembly for a substrate transfer robot is provided. In one embodiment, an end effector assembly for supporting a quadrilateral substrate during substrate transfer includes an end effector having an inner edge support disposed on a first e... | 01/05/2010 |
| 7633760 | KVM switching device, sever rack assembly and sliding mechanism thereof A KVM switch device is provided. The KVM switch device comprises a frame, a switch part fixed to the frame, a console unit movably connected to the switch part, and a sliding mechanism disposed between the console unit and the frame, wherein the switch part communic... | 12/15/2009 |
