Nordstrom; Erik R. - US Patent Attorneys and Agents

Attorney: Nordstrom; Erik R.

Number of patents: 65
Last date: March 06, 2012

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Number	Title	Issue Date
8129971	Multi-cell voltage regulator In some embodiments, the number of active cells in a multi-cell voltage regulator is controlled so that the current-per-active-cell approaches a predefined target or to be within an acceptable range so that the active cells operate with suitable efficiency. ...	03/06/2012
8099619	Voltage regulator with drive override Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When ...	01/17/2012
8064536	Link calibration In some embodiments, provided are methods and circuits to control the power efficiency of a transceiver or a transmitter in a scalable I/O link (a link whose bandwidth and power can be adjusted to meet changing performance demands). ...	11/22/2011
8045666	Spread spectrum clock generator Disclosed are embodiments of methods and circuits to generate spread spectrum clocks. ...	10/25/2011
8009475	Device selection circuit and method Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable...	08/30/2011
8004043	Logic circuits using carbon nanotube transistors In accordance with some embodiments, logical circuits comprising carbon nanotube field effect transistors are disclosed herein. ...	08/23/2011
7991992	Power reduction for system on chip Disclosed herein are SOC devices with peripheral units having power management logic. ...	08/02/2011
7898805	Central pressuring fan with bottom inlets for notebook cooling A cooling system may include a fan which may be placed near the center of the system board. The fan may include bottom inlet and may draw air through an opening in the bottom skin of the computer system and may generate a positive pressure within the computer system...	03/01/2011
7890287	Link transmitter swing compensation To allow for reference current settings per multi-bit link (or alternatively, per apparatus), approaches for implementing closed-loop Tx swing control based on monitoring of a dummy circuit is provided herein. In accordance with some embodiments, provided is a dummy...	02/15/2011
7885368	Analog phase controller Disclosed are embodiments of a phase control circuit with an analog phase controller that is able to effectively generate control signals for all four quadrants of phase control operation. ...	02/08/2011
7880284	Embedded power gating With embodiments disclosed herein, the distribution of gated power is done using on-die layers without having to come back out and use package layers. ...	02/01/2011
7873134	Clock generation system Disclosed herein are clock generator systems comprising first and second stage PLLs thereby allowing for both lower PLL bandwidth filtering and higher bandwidth response, in accordance with some embodiments. Other systems may be disclosed and/or described herein.	01/18/2011
7812631	Sleep transistor array apparatus and method with leakage control circuitry In some embodiments, an array of sleep transistors is provided, wherein a combination of said transistors may be enabled during an active mode to reduce leakage depending on the leakage characteristics of a chip or associated chip. ...	10/12/2010
7805619	Circuit technique to reduce leakage during reduced power mode Provided herein are schemes for reducing leakage in dynamic circuits during sleep modes. ...	09/28/2010
7795935	Bias signal delivery Provided herein are approaches for controlling remote slave DLL circuits with a master DLL circuit by conveying a relevant bias signal as a current signal instead of as a voltage signal. ...	09/14/2010
7783959	Apparatus and method for reduced power consumption communications over a physical interconnect A system and method for reduced power consumption communications over a physical interconnect is described. In an embodiment, an input/output circuit includes a port to receive a transmission unit via an interconnect, a combining module coupled to the port to append...	08/24/2010
7751274	Extended synchronized clock Some embodiments are directed to circuits comprising first and second PLLs. The first PLL generates a first clock signal based on a reference clock signal. The second PLL generates a second clock signal based on the reference clock signal and is synchronized with th...	07/06/2010
7746135	Wake-up circuit Disclosed herein is a wake-up circuit for a bias input of a circuit such as a slave DLL circuit, to allow it to be placed in a reduced power mode and be “awoken” (brought up to a control bias level) in a sufficiently small enough amount of time. The wake-up circ...	06/29/2010
7725945	Discouraging unauthorized redistribution of protected content by cryptographically binding the content to individual authorized recipients In one aspect of the invention is a method for discouraging unauthorized redistribution of protected content. Content is bound to a customer I.D. associated with a customer requesting the content, such that the customer I.D. is needed to access the content. ...	05/25/2010
7724078	Adjusting PLL/analog supply to track CPU core supply through a voltage regulator A processing device includes a Phase Locked Loop (PLL) system with an adjustable power supply designed to track the power supply provided to one or more of the cores in the processor device. The PLL no longer operates at a fixed voltage level that is held constant a...	05/25/2010
7711932	Scalable rename map table recovery Checkpoints may be used to recover from branch mispredictions using scalable rename map table recovery. ...	05/04/2010
7697601	Equalizers and offset control In some embodiments, equalizer circuits with controllably variable offsets at their outputs are provided. ...	04/13/2010
7688628	Device selection circuit and method Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable...	03/30/2010
7688150	PLL with controllable bias level Embodiments disclosed herein may provide circuits having two or more different supplies to separately power analog and digital components in a circuit. In some embodiments, circuits such as PLLs may be provided with adjustable analog supplies. Other embodiments may ...	03/30/2010
7679404	Missing clock pulse detector A method to detect a missing a clock pulse is provided. The method begins by providing a clock signal and a delayed clock signal. The delayed clock signal is then sampled to generate a sample of the delayed clock signal. A missing clock pulse may be detected if the ...	03/16/2010
7671456	Power management integrated circuit An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout. ...	03/02/2010
7659762	Clock synchronizer Disclosed herein are synchronization latch solutions. ...	02/09/2010
7652910	Floating body memory array Provided herein are embodiments of layouts for applying impact ionization potentials across the channel of a selected floating body cell in an array without having to impose the potential on other unselected cells. ...	01/26/2010
7649385	Logic with state retentive sleep mode Embodiments disclosed herein provide sleep mode solutions for retaining state information while reducing power in a logic block. ...	01/19/2010
7636864	Mechanism for adaptively adjusting a direct current loadline in a multi-core processor A central processing unit (CPU) is disclosed. The CPU includes two or more processing cores and a power control unit to regulate voltage applied to the CPU based upon the number of processing cores that are active. ...	12/22/2009
7636242	Integrated inductor An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein. ...	12/22/2009
7609091	Link transmitter with reduced power consumption With some transmitter embodiments disclosed herein, static power consumption in low power modes may be reduced without excessively increasing latency. ...	10/27/2009
7605668	Delay stage with controllably variable capacitive load Disclosed herein are embodiments of controllably variable capacitor loads that may be used with delay stages or other elements, for example, in a voltage controlled oscillator. ...	10/20/2009
7592840	Domino circuit with disable feature Some embodiments provide dynamic circuits with dynamic nodes that may float during a disable mode to reduce leakage. ...	09/22/2009
7590805	Monitor implementation in a multicore processor with inclusive LLC A method and apparatus to implement monitor primitives when a processor employs an inclusive shared last level cache. By the employing an inclusive last level cache, the processor is almost always able to complete a monitor transaction without requiring self snoopin...	09/15/2009
7590392	Transmitter compensation In some embodiments, a chip with a transmitter having a transmitter driver is provided. Also provided is a general compensation circuit coupled to the transmitter to generally compensate the transmitter driver and a specific compensation circuit coupled to the trans...	09/15/2009
7583151	VCO amplitude control Disclosed are circuits and methods to control the amplitude of a signal generated by a VCO. ...	09/01/2009
7581152	Fault free store data path for software implementation of redundant multithreading environments A method for a fault free store data path in a software implementation of redundant multithreading environments is described. In one embodiment, after a check is performed by a hardware/software checker, the processor still needs to ensure that the data just checked...	08/25/2009
7564299	Voltage regulator In some embodiments, regulator circuits are provided. ...	07/21/2009
7558097	Memory having bit line with resistor(s) between memory cells For one disclosed embodiment, an integrated circuit may comprise a memory array on the integrated circuit and access control circuitry on the integrated circuit. The memory array may have a bit line with one or more resistors along the bit line and may have a plural...	07/07/2009

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Attorney: Nordstrom; Erik R.