Musgrove; Jack V. - US Patent Attorneys and Agents

Attorney: Musgrove; Jack V.

Number of patents: 142
Last date: May 15, 2012

Browse patents
Browse applications

Number	Title	Issue Date
8180815	Redundancy-free circuits for zero counters A more efficient method of counting the number of zeros in a 4-bit value generates three output bits (q0, q1 and q2) from four input bits (a0, a1, a2 and a3) according to the logic equations q0=not(a1+a	05/15/2012
8176185	Method of switching Internet personas based on URL A method of communicating with a remote site on a network by establishing different user personas respectively associated with different remote sites on the network, each user persona containing one or more attributes used in accessing the remote sites, and then acc...	05/08/2012
8171230	PCI express address translation services invalidation synchronization with TCE invalidation A PCI Express (PCIe) computer system utilizes address translation services to translate virtual addresses from I/O device adaptors to physical addresses of system memory. A combined memory controller and host bridge uses a translation agent to convert the I/O addres...	05/01/2012
8138820	Peak power reduction methods in distributed charge pump systems A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal di...	03/20/2012
8137220	Electronic marker stakes for sports fields A marker stake for locating a boundary reference point on a sports field can be buried and out of sight when not in use, and then quickly located using an electronic receiver which detects a signal emitted by an electronic marker in the marker stake. Various field b...	03/20/2012
8112833	Table assembly for patient transfer device A table assembly for a patient transfer device has upper and lower tables surrounded by belts which counter-rotate as the table assembly moves between a patient and a supporting surface such as a bed. The table assembly includes integrated means for laterally retrac...	02/14/2012
8104014	Regular local clock buffer placement and latch clustering by iterative optimization Power, routability and electromigration have become crucial issues in modem microprocessor designs. In high performance designs, clocks are the highest consumer of power. Arranging clocking components with regularity so as to minimize the capacitance of the clock ne...	01/24/2012
8103983	Electrically-driven optical proximity correction to compensate for non-optical effects A contour of a mask design for an integrated circuit is modified to compensate for systematic variations arising from non-optical effects such as stress, well proximity, rapid thermal anneal, or spacer thickness. Electrical characteristics of a simulated integrated ...	01/24/2012
8102194	Dual frequency divider having phase-shifted inputs and outputs A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal di...	01/24/2012
8096004	Patient lift and transfer device A transfer device has a carriage supported on a base, movable between a home position and an extended position. A table assembly includes a lower table fixed to the carriage and an upper table coupled to the lower table, movable between a downward position in forcib...	01/17/2012
8086852	Providing a trusted platform module in a hypervisor environment A method is presented for implementing a trusted computing environment within a data processing system. A hypervisor is initialized within the data processing system, and the hypervisor supervises a plurality of logical, partitionable, runtime environments within th...	12/27/2011
8070630	Electronic marker stakes for sports fields A marker stake for locating a boundary reference point on a sports field can be buried and out of sight when not in use, and then quickly located using an electronic receiver which detects a signal emitted by an electronic marker in the marker stake. Various field b...	12/06/2011
8065522	Method and system for virtualization of trusted platform modules A method, an apparatus, a system, and a computer program product is presented for virtualizing trusted platform modules within a data processing system. A virtual trusted platform module along with a virtual endorsement key is created within a physical trusted platf...	11/22/2011
8055912	Method and system for bootstrapping a trusted server having redundant trusted platform modules Multiple trusted platform modules within a data processing system are used in a redundant manner that provides a reliable mechanism for securely storing secret data at rest that is used to bootstrap a system trusted platform module. A hypervisor requests each truste...	11/08/2011
8015532	Optimal timing-driven cloning under linear delay model A timing-driven cloning method iteratively partitions sinks of the net into different sets of clusters and for each set computes a figure of merit for a cloned gate location which optimizes timing based on linear delay, that is, a delay proportional to the distance ...	09/06/2011
8015358	System bus structure for large L2 cache array topology with different latency domains A cache memory which loads two memory values into two cache lines by receiving separate portions of a first requested memory value from a first data bus over a first time span of successive clock cycles and receiving separate portions of a second requested memory va...	09/06/2011
8001330	L2 cache controller with slice directory and unified cache structure A cache memory logically partitions a cache array having a single access/command port into at least two slices, and uses a first directory to access the first array slice while using a second directory to access the second array slice, but accesses from the cache di...	08/16/2011
8000950	Random initialization of latches in an integrated circuit design for simulation Latches in a net of a simulated integrated circuit design are initialized to known logical states prior to application of a reset signal at the beginning of the simulation. The logical states may be set by generating a list of the latches, sorting them in random ord...	08/16/2011
7994845	Switched-capacitor charge pumps A switched-capacitor charge pump comprises a two-phase charging circuit, cross-coupled transistors connected to output nodes of the switched capacitors, and a pump output connected to source terminals of the cross-coupled transistors. The charge pump has side transi...	08/09/2011
7991816	Inverting data on result bus to prepare for instruction in the next cycle for high frequency execution units A method of operating an arithmetic logic unit (ALU) by inverting a result of an operation to be executed during a current cycle in response to control signals from instruction decode logic which indicate that a later operation will require a complement of the resul...	08/02/2011
7979729	Method for equalizing performance of computing components A performance measure (e.g., processor speed) for computing components such as servers is optimized by creating models of power consumption versus the performance measure for each server, adding the power models to derive an overall power model, and calculating an o...	07/12/2011
7975329	Patient lift and transfer device A transfer device has a carriage supported on a base, movable between a home position and an extended position. A table assembly includes a lower table fixed to the carriage and an upper table coupled to the lower table, movable between a downward position in forcib...	07/12/2011
7936638	Enhanced programmable pulsewidth modulating circuit for array clock generation A pulsewidth modulation circuit uses a plurality of programmable paths to connect its output line to ground connections. The paths have different numbers of serially-connected NFETs to provide different pulldown rates. A desired programmable paths is selected based ...	05/03/2011
7934188	Legalization of VLSI circuit placement with blockages using hierarchical row slicing A hierarchical method of legalizing the placement of logic cells in the presence of blockages selectively classifies the blockages into at least two different sets based on size (large and small). Movable logic cells are relocated first among coarse regions between ...	04/26/2011
7915894	Service tee marker fixture with concentric attachment sleeve A service tee marker fixture comprises a disk marker and a cylindrical attachment sleeve fastened concentrically to the disk marker and constructed of a flexible material which provides a releasable friction fit with a service tee cap. For certain sleeve materials a...	03/29/2011
7901306	Electronic marker stakes for sports fields A marker stake for locating a boundary reference point on a sports field can be buried and out of sight when not in use, and then quickly located using an electronic receiver which detects a signal emitted by an electronic marker in the marker stake. Various field b...	03/08/2011
7890905	Slew constrained minimum cost buffering A buffer insertion technique addresses slew constraints while minimizing buffer cost. The method builds initial solutions for the sinks, each having an associated cost, slew and capacitance. As a solution propagates toward a source, wire capacitance and wire slew ar...	02/15/2011
7885801	Modeling asynchronous behavior from primary inputs and latches Asynchronous behavior of a circuit is emulated by modifying a netlist to insert additional logic at a driving element such as a latch. The additional logic outputs one of (i) a present output from the driving element, (ii) a delayed output from the driving element, ...	02/08/2011
7885798	Closed-loop modeling of gate leakage for fast simulators A method for circuit simulation using a netlist in which a first device having an unmodeled, nonlinear behavior is modified by inserting a second device which has a nonlinear response approximating the unmodeled nonlinear behavior. The first device may be for exampl...	02/08/2011
7885412	Pre-generation of generic session keys for use in communicating within communications environments Generic session keys are pre-generated and stored in a pool of session keys for later use in communicating within a communications environment. The session keys that are stored in the pool are pre-encrypted with the private key of the entity storing those keys. To c...	02/08/2011
7881135	Method for Qmeasurement in bulk CMOS using a switched capacitor circuit A test setup for estimating the critical charge of a circuit under test (CUT) uses a charge injection circuit having a switched capacitor that is selectively connected to a node of the CUT. A voltage measurement circuit measures the voltage at a tap in the charge in...	02/01/2011
7847618	Peak power reduction methods in distributed charge pump systems A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal di...	12/07/2010
7877580	Branch lookahead prefetch for microprocessors A method of handling program instructions in a microprocessor which reduces delays associated with mispredicted branch instructions, by detecting the occurrence of a stall condition during execution of the program instructions, speculatively executing one or more pe...	01/25/2011
7870528	Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation A net of an integrated circuit design is analyzed by unfolding paths on the receive side of an asynchronous boundary to facilitate modeling of the propagation of a metastable value from a receive latch to sinks of the net. The paths are unfolded by replicating combi...	01/11/2011
7864625	Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator A delay circuit has a fixed delay path at a lower voltage level, a level converter, and an adjustable delay path at a higher voltage level. The fixed delay path includes an inverter chain, and the adjustable delay path includes serially-connected delay elements sele...	01/04/2011
7861336	Table assembly for patient transfer device A table assembly for a patient transfer device has upper and lower tables surrounded by belts which counter-rotate as the table assembly moves between a patient and a supporting surface such as a bed. The table assembly includes integrated means for laterally retrac...	01/04/2011
7856682	Patient lift and transfer device A patient transfer device has four casters and two counter-rotating steering wheels. The steering wheels provide a turning path whose center of curvature lies along a transverse centerline of the device. A foot pedal selectively lifts the steering wheels off the flo...	12/28/2010
7840643	System and method for movement of non-aligned data in network buffer model A method is provided for transferring data between first and second nodes of a network. Such method includes requesting first data to be transferred by a first upper layer protocol (ULP) operating on the first node of the network; and buffering second data for trans...	11/23/2010
7834649	Method and apparatus for statistical CMOS device characterization A unified test structure having a large number of electronic devices under test is used to characterize both capacitance-voltage parameters (C-V) and current-voltage parameters (I-V) of the devices. The devices are arranged in an array of columns and rows, and selec...	11/16/2010
7827514	Efficient electromagnetic modeling of irregular metal planes A method of modeling electromagnetism in an irregular conductive plane, by dividing the surface into a grid of unequal and unaligned rectangles, assigning a circuit node location to a center of each rectangle, and calculating capacitive and inductive parameters base...	11/02/2010

«First «Previous1 2 3 4 Next»Last»

PatentStorm

Did You Know...

PatentStorm News

Attorney: Musgrove; Jack V.