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| Number | Title | Issue Date |
| 8170558 | Method and system for performing a handoff in a wireless communication system, such as a hard handoff A method for minimizing search time and disruption of current service on an originating frequency during a frequency search excursion to a target frequency as part of an inter-frequency hard handoff between cells on different RF CDMA channels. Disruption of service ... | 05/01/2012 |
| 8159255 | Methodologies and tool set for Iverification, debugging and failure diagnosis Quiescent supply current (IDDQ) verification, prediction, and debugging of low power semiconductor devices are enhanced by IDDQ defect diagnosis. If all IDDQ patterns fail verification, per module analysis is performed to sort out po... | 04/17/2012 |
| 8155965 | Time warping frames inside the vocoder by modifying the residual In one embodiment, the present invention comprises a vocoder having at least one input and at least one output, an encoder comprising a filter having at least one input operably connected to the input of the vocoder and at least one output, a decoder comprising a sy... | 04/10/2012 |
| 8150339 | Switchable-level voltage supplies for multimode communications Switchable voltage level supplies for circuitry in a multi-mode communications chipset are disclosed. In an embodiment, a first voltage level is supplied to TX circuitry operating in a first mode having a first set of linearity and/or noise requirements. A second vo... | 04/03/2012 |
| 8145164 | Methods and apparatus for handling a signaling message the relates to transmission rate restrictions A method for handling a signaling message that specifies transmission rate restrictions may include operating in a first state. The method may also include receiving the signaling message from a network. The signaling message may include an activation time, the tran... | 03/27/2012 |
| 8139545 | Method and apparatus for forwarding messages among multiple radio networks Techniques to forward unsolicited messages from an (IS-2000) CDMA radio network via an HDR radio network to an access terminal. A session is first established between the access terminal and the HDR radio network. During session establishment or thereafter, the acce... | 03/20/2012 |
| 8132072 | System and method for providing H-ARQ rate compatible codes for high throughput applications In one embodiment, the present patent application comprises a method and apparatus to generate low rate protographs from high rate protographs, comprising copying a base graph; permuting end points of edges of a same type in copies of the base graph to produce a per... | 03/06/2012 |
| 8132041 | Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals An electronic device is provided for generating or utilizing one or more cycle-swallowed clock signals derived based on one or more first clock signals. The device includes a module configured to receive a first clock signal having a first frequency. The module is c... | 03/06/2012 |
| 8130020 | Switched-capacitor decimator A switched-capacitor decimator that can attenuate undesired signal components at odd harmonics of an output sample rate is described. In one design, the switched-capacitor decimator includes at least one sampling capacitor and multiple switches. For each sampling ca... | 03/06/2012 |
| 8102872 | Method for discontinuous transmission and accurate reproduction of background noise information The present invention comprises a method of communicating background noise comprising the steps of transmitting background noise, blanking subsequent background noise data rate frames used to communicate the background noise, receiving the background noise and updat... | 01/24/2012 |
| 8086207 | Linear transconductor for RF communications The present patent application comprises a linear transconductor having at least one input and at least one output, comprising a differential amplifier having a plurality of transistors and a plurality of inputs, wherein a difference of input signals is amplified, a... | 12/27/2011 |
| 8077822 | System and method of controlling power consumption in a digital phase locked loop (DPLL) An apparatus comprising a programmable frequency device adapted to generate a reference clock selected from a set of distinct frequency clocks, wherein the programmable frequency device is further adapted to maintain the same temporal relationship of the triggering ... | 12/13/2011 |
| 8073416 | Method and apparatus for controlling a bias current of a VCO in a phase-locked loop A local oscillator includes a phase-locked loop. The phase-locked loop includes voltage controlled oscillator (VCO) and a novel VCO control circuit. The VCO control circuit may be programmable and configurable. In one example, an instruction is received onto the VCO... | 12/06/2011 |
| 8073087 | Multi-carrier incremental redundancy for packet based wireless communications Methods and apparatus are disclosed herein for providing incremental redundancy in a wireless communication system to aid in error recovery. One or more redundancy versions are sent on different carriers than the primary version of information to be transmitted. At ... | 12/06/2011 |
| 8072255 | Quadrature radio frequency mixer with low noise and low conversion loss In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into... | 12/06/2011 |
| 8068859 | Dual event slotted paging A novel and improved method and system for paging a cellular telephone or other wireless terminal using two paging channels that reduces standby mode power consumption described. In one embodiment of the invention, a minimally encoded quick paging channel is establi... | 11/29/2011 |
| 8054116 | Threshold dithering for time-to-digital converters Techniques for dithering quantization thresholds of time-to-digital converters (TDC's) in all-digital phase-locked loops (ADPLL's) are disclosed. In an embodiment, the delay introduced by an individual buffer in a TDC delay line may be dithered. In another embodimen... | 11/08/2011 |
| 8050225 | Assignment of primary and secondary synchronization code sequences to cells in a wireless communication system Techniques for assigning primary synchronization code (PSC) sequences and secondary synchronization code (SSC) sequences to cells in a wireless communication system are described. At least one PSC sequence and multiple SSC sequences may be used for multiple cells in... | 11/01/2011 |
| 8046005 | Dual event slotted paging A novel and improved method and system for paging a cellular telephone or other wireless terminal using two paging channels that reduces standby mode power consumption described. In one embodiment of the invention, a minimally encoded quick paging channel is establi... | 10/25/2011 |
| 8045944 | Offset correction for passive mixers A downconversion mixer includes a configurable gate or bulk bias voltage to allow calibration and correction of device offsets. Calibration may be performed on the configurable bias voltages to minimize IM2 distortion in the mixer. The techniques have minimal impact... | 10/25/2011 |
| 8044723 | Oscillator signal generation with spur mitigation in a wireless communication device Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for d... | 10/25/2011 |
| 8027645 | Systems and methods for automatically tuning a frequency modulator in a mobile device A method for automatically tuning a frequency modulator in a mobile device is described. A frequency band is automatically scanned using a frequency modulation (FM) receiver. The FM receiver is integrated as a part of the mobile device. Quality associated with chann... | 09/27/2011 |
| 8022849 | Phase to digital converter in all digital phase locked loop A phase to digital converter, all digital phase locked loop, and apparatus having an all digital phase locked loop are described herein. The phase to digital converter includes a phase to frequency converter driving a time to digital converter. The time to digital c... | 09/20/2011 |
| 8018269 | Fast-switching low-noise charge pump In one embodiment of the invention, a method for a charge pump is disclosed. The method includes biasing a plurality of transistors; switching a pair of main transistor switches to apply or remove a net charge on an output terminal though the biased transistors; and... | 09/13/2011 |
| 7986756 | Method and apparatus for filtering noisy estimates to reduce estimation errors Techniques for filtering noisy estimates to reduce estimation errors are described. A sequence of input values (e.g., for an initial channel impulse response estimate (CIRE)) is filtered with an infinite impulse response (IIR) filter having at least one coefficient ... | 07/26/2011 |
| 7983695 | Dual event slotted paging A novel and improved method and system for paging a cellular telephone or other wireless terminal using two paging channels that reduces standby mode power consumption described. In one embodiment of the invention, a minimally encoded quick paging channel is establi... | 07/19/2011 |
| 7970420 | Dual event slotted paging A novel and improved method and system for paging a cellular telephone or other wireless terminal using two paging channels that reduces standby mode power consumption described. In one embodiment of the invention, a minimally encoded quick paging channel is establi... | 06/28/2011 |
| 7957263 | Method and apparatus for acknowledging reverse link transmissions in a communications system A method and apparatus for acknowledging reverse link transmissions in a communications system. An information bit is set and then repeated. The repeated information bit is covered with a code having a frame length defined by S=M*N*R, where S is the frame length, M ... | 06/07/2011 |
| 7944298 | Low noise and low input capacitance differential MDS LNA A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmet... | 05/17/2011 |
| 7920884 | Frame structures for a wireless communication system with multiple radio technologies Frame structures and transmission techniques for a wireless communication system are described. In one frame structure, a super-frame includes multiple outer-frames, and each outer-frame includes multiple frames, and each frame includes multiple time slots. The time... | 04/05/2011 |
| 7876265 | Methods and systems for providing enhanced position location in wireless communications Embodiments disclosed herein relate to methods and systems for providing improved position-location (e.g., time-of-arrival) measurement and enhanced position location in wireless communication systems. In an embodiment, an access point may replace information (e.g.,... | 01/25/2011 |
| 7872543 | Bi-polar modulator A bi-polar modulator that can perform quadrature modulation using amplitude modulators is described. In one design, the bi-polar modulator includes first and second amplitude modulators and a summer. The first amplitude modulator amplitude modulates a first carrier ... | 01/18/2011 |
| 7821917 | Method and apparatus for data and pilot structures supporting equalization Techniques for transmitting data in a manner to facilitate equalization at a receiver are described. Guard intervals are appended to data blocks such that each data block has a guard interval at the beginning of the data block and a guard interval at the end of the ... | 10/26/2010 |
| 7821913 | Method and apparatus for data and pilot structures supporting equalization Techniques for transmitting data in a manner to facilitate equalization at a receiver are described. Guard intervals are appended to data blocks such that each data block has a guard interval at the beginning of the data block and a guard interval at the end of the ... | 10/26/2010 |
| 7817760 | Delay lock loops for wireless communication systems Techniques for deriving sample timing for multiple signal instances received on multiple antennas for a given propagation path. In one scheme, a DLL is maintained for each path, and each DLL tracks the timing of the best signal instance for the assigned path. In ano... | 10/19/2010 |
| 7817596 | Verification methods and apparatus for improving acquisition searches of asynchronous cells Methods and apparatus are presented to optimize the likelihood of a successful acquisition of frame timing information of an asynchronous base station by providing a mechanism that copes with short-term degradations caused by a dynamic radio environment. An acquisit... | 10/19/2010 |
| 7792184 | Apparatus and method for determining coefficient of an equalizer The linear equalizer (LE) coefficients for code-division-multiplexed (CDM) pilot systems can be determined based upon frequency-domain calculations involving channel impulse responses. A channel impulse response can be formed at the mobile terminal by suitably filte... | 09/07/2010 |
| 7787389 | Method and system for utilization of an outer decoder in a broadcast services communication system A Method and System for Utilization of an Outer Decoder in a Broadcast Services Communication System is described. An outer decoder and an inner decoder encode a block of information to be transmitted, to improve protection by adding redundancy. The redundancy permi... | 08/31/2010 |
| 7746970 | Method and apparatus for filtering noisy estimates to reduce estimation errors Techniques for filtering noisy estimates to reduce estimation errors are described. A sequence of input values (e.g., for an initial channel impulse response estimate (CIRE)) is filtered with an infinite impulse response (IIR) filter having at least one coefficient ... | 06/29/2010 |
| 7728690 | Method and apparatus for compensating for tuning nonlinearity of an oscillator Techniques to compensate for nonlinearity of a tuning function of an oscillator are described. The tuning nonlinearity of the oscillator may be modeled as a disturbance input to the oscillator and may be compensated with an equal but opposite disturbance. In one des... | 06/01/2010 |
