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Attorney: McBurney; Mark E., Salys; Casimer K., Dillon; Andrew J.


Number of patents: 1
Last date: June 25, 1996

NumberTitleIssue Date
5530832System and method for practicing essential inclusion in a multiprocessor and cache hierarchy
A system and method for managing caches in a multiprocessor having multiple levels of caches. An inclusion architecture and procedure are defined through which the L2 caches shield the L1 caches from extraneous communication at the L2, such as main memory...
06/25/1996
 
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