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"I watched his countenance closely, to see if he was not deranged ... and I was assured by other senators after he left the room that they had no confidence in it."
U.S. Senator Smith of Indiana ; After seeing Samuel Morse demonstrate the telegraph.
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| Number | Title | Issue Date |
| 7975238 | Identifying previously bookmarked hyperlinks in a received Web page in a World Wide Web network browser system for searching Presenting to a user at a receiving Web station, who is viewing a received Web document or Web page, a very clear picture of which hyperlinks in each Web page are linked to a Web page/document that has already been bookmarked by the user. A system for tracking bookm... | 07/05/2011 |
| 7848943 | System and method for supporting purchase or production of products by potential demand prediction To support a purchase or a production of a product by accurately predicting a sold amount of the product. A system that supports a purchase or a production of a product, the system including an input section for accepting an input of a history of a supplied amount a... | 12/07/2010 |
| 7865912 | Method and system for managing tables that are used by network processors to control traffic through a network A method for managing tables that are used by network processors to control network traffic through a network. The method comprises including a first table management software application in a first network processor, in which the first table management software is ... | 01/04/2011 |
| 7855966 | Network congestion detection and automatic fallback: methods, systems and program products A codec detects congestion in a packet network and responds via a session control protocol to re-negotiate codec-type and/or parameters with the receiving codec to reduce bit rate for supporting a session. Once the connection and session are established, encoded pac... | 12/21/2010 |
| 7839797 | Event-driven flow control for a very high-speed switching node A method for controlling the flows of data packets that are switched or routed at nodes of high-speed communication networks is disclosed. According to the invention, resource metering units are assigned to resources shared between devices of the switch or router e.... | 11/23/2010 |
| 7817582 | Path controller, path control method, and program therefor A path controller 10 creates a logical tree LT having a plurality of member trees MT1 and MT2 within a routing table 52 at the time of initial setting. Direct tables DT1 and DT2 for the member trees MT1 and MT2... | 10/19/2010 |
| 7813163 | Single-ended read and differential write scheme A method to read and write at least one static memory cell is provided, said cell comprising a cross-coupled inverter pair and two pass-devices wherein said method is characterized in that during read only one of the two pass-devices is selected, while for write bot... | 10/12/2010 |
| 7796508 | Method of generically specifying congestion control and avoidance behavior A method for controlling congestion control and avoidance behavior of a plurality of heterogeneous network processors in a network is disclosed. The network also includes at least one host processor that utilizes at least one congestion control application. The meth... | 09/14/2010 |
| 7788406 | Method and system for reducing look-up time in packet forwarding on computer networks Lookup time in packet forwarding on computer networks is reduced. A first lookup is performed in a memory tree to find a first protocol forwarding entry in the memory tree. The forwarding entry includes first protocol (e.g., EGP) information and cached associated se... | 08/31/2010 |
| 7787446 | Packet unstopper system for a parallel packet switch A system for controlling egress buffer saturation includes, for each data packet flow, a comparator for comparing the number of data packets ‘WPC’ temporarily stored within an egress buffer to a predefined threshold value ‘WPCth’. The packet sequence number ... | 08/31/2010 |
| 7784012 | System and method for creating a standard cell library for use in circuit designs A standard cell library including a first set of cells including mixed threshold voltage cells. Each mixed threshold voltage cell includes a first threshold voltage device having a first threshold voltage and a second threshold voltage device having a second thresho... | 08/24/2010 |
| 7784002 | Systems for using relative positioning in structures with dynamic ranges Systems for using relative positioning of items or components in a structure with dynamic ranges, such as an elastic I/O bus design for an Integrated Circuit (IC), are disclosed. Embodiments may include a user-defined type module having user-defined types representi... | 08/24/2010 |
| 7779235 | Using performance data for instruction thread direction A method for dispatching instructions in the data processing system, having in memory for storing instructions and a plurality of central processing units, where each central processing unit includes a circuit to provide data indicating internal performance, the met... | 08/17/2010 |
| 7778178 | Oversubscribing bandwidth in a communications network A system and computer readable medium for oversubscribing bandwidth in a communication network, is disclosed. The system and computer readable medium includes policing a first data flow and outputting a first output data flow from the first meter, in relation to a f... | 08/17/2010 |
| 7773602 | CAM based system and method for re-sequencing data packets An embodiment of the system operates in a parallel packet switch architecture having at least one egress adapter arranged to receive data packets issued from a plurality of ingress adapters and switched through a plurality of independent switching planes. Each recei... | 08/10/2010 |
| 7769858 | Method for efficiently hashing packet keys into a firewall connection table A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function... | 08/03/2010 |
| 7768315 | Multiplexor with leakage power regulator A circuit for a multiplexer includes a pair of NAND gates with outputs coupled to an OAI gate constructed from a complementary circuit formed from solid state devices. A current flow controller formed from solid state devices is coupled to one of the NAND gates. Whe... | 08/03/2010 |
| 7764084 | Apparatus for reducing power consumption with configurable latches and registers Reducing power consumption in latches and similar electronic devices. In one aspect, an apparatus for configuring power consumption of sequential logic includes a sequential logic device including a first latch, a second latch, and first and second enable inputs. Th... | 07/27/2010 |
| 7752396 | Promoting a line from shared to exclusive in a cache Embodiments include a cache controller adapted to determine whether a memory line for which the processor is to issue an address-only kill request resides in a fill buffer for the cache line in a shared state. If so, the cache controller may mark the fill buffer as ... | 07/06/2010 |
| 7752155 | System and computer program for compressing multi-field classification rules The present invention relates to a system and computer-readable medium for storing a plurality of multi-field classification rules in a computer system. Each multi-field classification rule includes a rule specification that itself includes a plurality of fields and... | 07/06/2010 |
| 7751312 | System and method for packet switch cards re-synchronization The disclosed invention relates to a re-synchronization system that operates in a switching arrangement receiving a plurality of incoming data packets. The switching arrangement is made of an active switch card that transmits the incoming data packets and a backup s... | 07/06/2010 |
| 7749816 | Systems and arrangements to interconnect components of a semiconductor device Systems and arrangements to interconnect cells and structures within cells of an integrated circuit to enhance cell density are disclosed. Embodiments comprise an adjusted polysilicon gate pitch to metal wire pitch relationship to improve area scalars while increasi... | 07/06/2010 |
| 7742909 | Reconstruction of data from simulation models Systems and media for reconstructing data from simulation models are disclosed. Embodiments may include a media containing instructions for accessing an alias from an alias file. The media may include instructions for searching for a net name and, if the net name is... | 06/22/2010 |
| 7730282 | Method and apparatus for avoiding data dependency hazards in a microprocessor pipeline architecture using a multi-bit age vector A method and system for avoiding various hazards for instructions which are propagating through a microprocessor pipeline. When a plurality of instructions exist within the pipeline which read and write the same value, a vector is established to distinguish the olde... | 06/01/2010 |
| 7728362 | Creating integrated circuit capacitance from gate array structures Using gate arrays to create capacitive structures within an integrated circuit are disclosed. Embodiments comprise having a gate array of P-type field effect transistors (P-fets) and N-type field effect transistors (N-fets) in an integrated circuit design, coupling ... | 06/01/2010 |
| 7725684 | Speculative instruction issue in a simultaneously multithreaded processor A method for optimizing throughput in a microprocessor that is capable of processing multiple threads of instructions simultaneously. Instruction issue logic is provided between the input buffers and the pipeline of the microprocessor. The instruction issue logic sp... | 05/25/2010 |
| 7720948 | Method and system of generically specifying packet classification behavior A method and system for controlling packet classification behavior of a plurality of heterogeneous network processors in a network is disclosed. The network also includes at least one host processor that utilizes at least one packet classification application. The m... | 05/18/2010 |
| 7714635 | Digital adaptive voltage supply Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. These measurement circuits include registers that are connected to a voltage regulation circuit that provides the integrated circuit voltage source and to a... | 05/11/2010 |
| 7712003 | Methodology and system to set JTAG interface A method and apparatus determines and sets operating voltage on a JTAG interface by incrementally increasing a test voltage applied thereto. The contents of a register is monitored to detect when the contents switch (change) from a first value to a second value. The... | 05/04/2010 |
| 7711992 | Generating a regression suite database Systems and media for generating an improved regression suite by applying harvesting models and/or regression algorithms to tests utilized in verification of a system are disclosed. In one embodiment, a regression manager responsive to user input may be coupled to a... | 05/04/2010 |
| 7711930 | Apparatus and method for decreasing the latency between instruction cache and a pipeline processor A method and apparatus for executing instructions in a pipeline processor. The method decreases the latency between an instruction cache and a pipeline processor when bubbles occur in the processing stream due to an execution of a branch correction, or when an inter... | 05/04/2010 |
| 7710874 | System and method for automatic management of many computer data processing system pipes A process control method and system including partitioning transmit decisions and certain measurements into one logical entity (Data Plane) and partitioning algorithm computation to update transmit probabilities into a second logical entity (Control Plane), the two ... | 05/04/2010 |
| 7693678 | Integrated circuit temperature measurement methods and apparatuses Methods and apparatuses to measure temperatures of integrated circuits are disclosed. New circuit arrangements for measuring temperature using various types of integrated circuit sensor elements are discussed. Embodiments comprise methods and apparatuses arranged to... | 04/06/2010 |
| 7689400 | Reconstruction of data from simulation models Systems, method, and media for reconstructing data from simulation models are disclosed. Embodiments may include a method for accessing an alias from an alias file. The method may generally include searching for a net name and, if the net name is not found, searchin... | 03/30/2010 |
| 7689295 | Method and system for monitoring and control of complex systems based on a programmable network processor A method and apparatus for monitoring and control of a system is disclosed. The method and apparatus include providing a plurality of sensors, a table, and a network processor. The sensors monitor attributes of the system. The table includes a plurality of entries. ... | 03/30/2010 |
| 7684517 | Reducing power consumption in signal detection Embodiments include a time-sharing detector that is designed to enable comparison of a first reference voltage and a second reference voltage against the serial data transmission in a specified pattern. In many embodiments, the pattern is pre-defined and, in some em... | 03/23/2010 |
| 7683670 | High-speed low-power integrated circuit interconnects Embodiments that decrease power consumption of interconnecting devices in integrated circuits are disclosed. Embodiments reduce power consumption in integrated circuits by generating full and reduced swing signals at an output of a driver module in response to a con... | 03/23/2010 |
| 7661052 | Using statistical signatures for testing high-speed circuits A method and system for testing a high-speed circuit is disclosed. The method and system include obtaining a high-speed statistical signature of the high-speed circuit using a conventional tester. The method and system further include comparing the high-speed statis... | 02/09/2010 |
| 7657771 | Method and apparatus for reducing latency associated with read operations in a memory system Methods and system for reducing latency associated with a read operation in a processor memory system are provided. In one implementation, the method includes receiving an early indicator corresponding to read data from a memory, delaying the early indicator in acco... | 02/02/2010 |
| 7656628 | Apparatus for providing fault protection in a circuit supplying power to an electronic device Apparatus is provided to limit the current drawn from a power supply output connected to furnish power to a docking station or electronic device, when a fault connects the output to ground or other docking connection. The power supply is disconnected when such fault... | 02/02/2010 |
