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| Number | Title | Issue Date |
| 7305602 | Merged MISR and output register without performance impact for circuits under test The output register of an array and the Multiple Input Signature Register (MISR) logic is implemented with one set of L1/L2 master/slave latches and single additional slave latch. This new combined logic uses less critical area on a chip without a perf... | 12/04/2007 |
| 7301320 | On-chip high frequency power supply noise sensor The on-chip power supply noise sensor detects high frequency overshoots and undershoots of the power supply voltage. By creating two identical current sources and attaching a time constant circuit to only one, the high frequency transient behavior differs while the ... | 11/27/2007 |
| 7295458 | Eight transistor SRAM cell with improved stability requiring only one word line An SRAM cell that is accessed by a single word line and separate access transistors for read and write operations. A pair of write bit line transfer devices provide respectively access to the right and left sides of cross coupled pull-up, pull-down transistor pairs ... | 11/13/2007 |
| 7293209 | Split L2 latch with glitch free programmable delay A programmable delay circuit that delays the C2 clock signal by a variable amount that allows the output from the L1 latch to be captured even when there is a large delta between the L1 latch and its L2 latch. This allows the C2 si... | 11/06/2007 |
| 7142064 | SRAM ring oscillator An SRAM design evaluation circuit topology has the gates of the SRAM cell pass Gate Field Effect Transistors (FETs) connected to the cross-coupled gates of the inverter pair of the SRAM cell. This evaluation circuit typology is used in a full cell implementation. A ... | 11/28/2006 |
| 7113433 | Local bit select with suppression of fast read before write A domino SRAM is provided with active pull-up PFET devices that overwhelm “slow to write but very fast to read” cells and allow the cells to recover from timing mismatch situations. This approach allows the traditional “bit select” clamp to actively control ... | 09/26/2006 |
| 7102946 | Local bit select circuit with slow read recovery scheme Local bit line pairs in a domino SRAM include an amplifier to amplify the voltage differential across the bit lines during a read operation if a cell in the local group of cells has been identified as a slow to read cell. The amplifier includes a transistor switch t... | 09/05/2006 |
| 7054184 | Cache late select circuit A late select circuit topology has pseudo-static circuits that provide fast dynamic circuit operation without the use of dynamic clock timing signals. An output from a selected set is enabled by the conjunction of bit line pulse and set select signal. ... | 05/30/2006 |
| 6958943 | Programmable sense amplifier timing generator A SRAM sense amplifier timing circuit provides various delay settings for the sense amplifier enable signal (sae) and the sense amplifier reset signal (rse) in order to allow critical timing adjustments to be made for early mode, late mode conditions by varying the ... | 10/25/2005 |
| 6850460 | High performance programmable array local clock generator An SRAM array local clock generator has variable delay settings that are programmable via level scan bits. Program bits from the level scan operation are decoded and used to adjust the number of delay elements in the local clock generator path. ... | 02/01/2005 |
| 6667929 | Power governor for dynamic RAM Apparatus for limiting the power consumption of a random access memory (RAM), having in combination a counter for counting the number of memory commands in a sample interval, and power governor control logic responsive to the number of memory commands, fo... | 12/23/2003 |
| 6249545 | Video compression decompression and transmission A computer method for compressing, then decompressing an image frame of a specified size, by multiplying the image frame size with a specified color depth coding to obtain an image frame binary code or word, then writing out a mathematical expression that... | 06/19/2001 |
| 6246599 | Constant frequency resonant inverters with a pair of resonant inductors A constant frequency, DC/AC inverters that employs a coupled inductor to achieve ZVS in a wide range of load current and input voltage with a reduced circulating energy. In the circuits of the invention, the two windings of the coupled inductors are conne... | 06/12/2001 |
| 6237382 | Method and apparatus for hydroforming metallic tube A method for hydroforming a metallic tube comprising primary hydroforming and secondary hydroforming, wherein in the primary hydroforming step, the metallic tube is formed such that a circumferential length of an expanded portion of the primary-hydroforme... | 05/29/2001 |
| 6208938 | Apparatus and method for monitoring and reporting weather conditions A weather monitoring, measuring and reporting system which uses unattended, high-resolution digital cameras and laser rangers to both measure and display weather conditions in a local region, such as the region surrounding an airport. Visibility is estima... | 03/27/2001 |
| 6151058 | Dynamic control of laser power in electrophotographic device to produce accurate positive and negative printed output A method for controlling the intensity of an imaging laser of an electrophotographic device in order to produce both positive and negative output. This is accomplished by using a software controlled digital circuit to increase or decrease the power suppli... | 11/21/2000 |
| 5756878 | Thermal conductivity measuring device A thermal conductivity measuring device includes a diaphragm portion, a thermal conductivity detector, a temperature sensor, a control section, and a thermal conductivity calculating section. The diaphragm portion is formed on a base. The thermal conducti... | 05/26/1998 |
| 5327491 | Method for pacing calls to reduce nuisance calls Briefly, this invention contemplates the provision of a call pacing method in which the number of calls to dial is periodically (e.g. every two seconds) determined on the basis of anticipated operator availability. The determined number of calls are diale... | 07/05/1994 |
| 4799314 | Method of mounting a printed circuit board A mounting method for printed circuit boards provides improved electromagnetic interference reduction while minimizing the required number of mounting screws. A conductive base plate formed with supporting members is configured to mate with a grounding ci... | 01/24/1989 |
| 4791560 | Macro level control of an activity switch in a scientific vector processor which processor requires an external executive control program A system for controlling an activity (program) switch on a scientific processor having an external executive control program. It includes the sequencing of the hardware at a macro level rather than at the more detailed lower levels previously used. This s... | 12/13/1988 |
| 4789925 | Vector data logical usage conflict detection A system for detecting and resolving logical usage conflicts is described for use in a scientific data processing system. A plurality of pipelined overlapping macro instructions request access to the system memory. Often the information required by a subs... | 12/06/1988 |
| 4786797 | Electro-optical data handling system with noise immunity A source of light modulated by input data provides the modulated light to a phototransistor. A capacitor couples the emitter of the phototransistor to ground. A discharging transistor switch is coupled across the capacitor and a voltage comparator is coup... | 11/22/1988 |
| 4782991 | Hot liquid solder reflow machine A solder reflow machine for removing and replacing electronic components of the pin-grid array type having a large number of leads soldered into a very densely populated printed circuit board. The machine utilizes a heat-transfer liquid and a vacuum to re... | 11/08/1988 |
| 4777479 | Switch position indicator A remote indicator for displaying the position of a power control switch whether or not power is applied to the switch. An auxiliary DC power supply provides a reference potential to a plurality of voltage dividers. One voltage divider provides a first re... | 10/11/1988 |
| 4771426 | Isochronous clock reconstruction An electronic system for providing a stable, isochronous clock signal with very low jitter and slew rate to thereby permit multiplexing of data from an external source which is not synchronous with the multiplexer frame rate.... | 09/13/1988 |
| 4767198 | SAW/BAW Bragg cell An acoustic signal is launched as a surface acoustic wave (SAW) by a hyperbolically tapered transducer and then reflected into a bulk acoustic wave (BAW) by a tapered reflector. At each frequency the tapered reflector must satisfy the phase match conditio... | 08/30/1988 |
| 4763941 | Automatic vacuum gripper The automatic vacuum gripper comprises a gripper member with a resilient seal coupled to a hollow piston and shaft. The piston is spring loaded downward in a cylinder coupled to a vacuum source. With vacuum applied, the piston does not move until the grip... | 08/16/1988 |
| 4763338 | Synchronous signal decoder A synchronous decoder for recovering a train of binary data encoded in a biphase format and decoding into NRZ format. Encoded data is sampled during the first half of a bit period and the second half of a bit period and stored respectively into two storag... | 08/09/1988 |
| 4761975 | Module security locking device Apparatus for locking together modules of a computer system includes first and second members that are secured, by screws, proximate adjacent edges of adjacent modules. Tabs on the members and holes through the tabs align so that a padlock may be utilized... | 08/09/1988 |
| 4761725 | Digitally controlled A.C. to D.C. power conditioner An A.C. to D.C. power conditioner, which draws sinusoidal input current utilizes digital proportional-integral control to provide output voltage regulation by adjusting the gain of a current program loop. The current program loop controls the state of a p... | 08/02/1988 |
| 4759020 | Self-healing bubble memories A block replicate magnetic bubble memory organization is disclosed in which a number of storage loops are arranged between write and read tracks. Data in the read track is supplied to a deskewing circuit under the control of one section of an EAPROM so th... | 07/19/1988 |
| 4759041 | Local area network control system synchronization with phase-lock loop A local area network packet receiving system synchronizes the passage of packets through a receive buffer through a synchronizing circuit which supplies clock pulses to the receive buffer. The clock system utilizes a sensing circuit that senses the rate a... | 07/19/1988 |
| 4755150 | Memory cartridge security locking device The locking apparatus is used to secure one or more memory cartridges in a housing in a computer system module. An L-shaped member is fastened to the module by a screw in an existing threaded screw hole in the module. A second member is inserted into the ... | 07/05/1988 |
| 4749884 | Low power, high level driver An improved driver interface circuit for interfacing between low voltage, low drive capability logic signals and large capacitive loads requiring high speed, high voltage logic signals. The improvement comprising the use of the logic input signal to power... | 06/07/1988 |
| 4749971 | Saw delay line with multiple reflective taps A delay line with multiple taps is provided in which a hyperbolically tapered input transducer directs a wave to a plurality of hyperbolically tapered partial reflectors. A plurality of hyperbolically tapered output transducer taps are aligned with each o... | 06/07/1988 |
| 4746882 | Saw multiplexer using tapered transducers A simple compact, high performance SAW multiplexer is provided by utilizing an input transducer in which hyperbolic tapered electrode fingers are provided. These hyperbolic electrode fingers provide a low frequency output acoustic wave at locations where ... | 05/24/1988 |
| 4743835 | Output hold-up circuit for a step-up voltage regulator An arrangement for enhancing the available energy storage capability of a hold-up energy storage element for use with the step-up or boost regulator stage of a power supply enables use of smaller hold-up storage elements, such as capacitors. The circuit s... | 05/10/1988 |
| 4737743 | Single mode waveguide saw dispersive filter A single mode waveguide dispersive surface acoustic wave (SAW) delay line is formed by aligning an elongated input transducer, which has a pattern of interdigital electrode fingers which launches a wideband SAW, with a beam compressor that feeds an input ... | 04/12/1988 |
| 4734909 | Versatile interconnection bus A bus arbitration system comprising a plurality of bus lines and a clock which produces first and second phrases in which a drive generates a first logic state during the first phase to precharge the capacitance associated with the bus lines and generates... | 03/29/1988 |
| 4729114 | Signal processing circuit for instantaneous fourier transformation A feedback loop circuit that may be used for Fourier Transform analysis, for carrier acquisition, or for other related purposes, sums the inputs signal, passes it through a delay line to provide an output signal, samples a portion of the output signal in ... | 03/01/1988 |
