Quotables
"What can be more palpably absurd than the prospect held out of locomotives traveling twice as fast as stagecoaches?"
The Quarterly Review ; March edition, 1825
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 6052851 | Mattress for minimizing decubitus ulcers A mattress which increases the surface area contacting the patient's skin, and which conforms evenly to the skin over the skin/surface interface. A mattress includes a flat layer of foam that is temperature sensitive and which has rate-dependent deflectio... | 04/25/2000 |
| 5989244 | Method of use of a sheet of elastin or elastin-based material The present invention relates to an elastin-based biomaterial and to a method of using same to effect tissue repair or replacement. The invention further relates to a method of securing the biomaterial to existing tissue.... | 11/23/1999 |
| 5841978 | Network linking method using steganographically embedded data objects A given data object can effectively contain both a graphical representation to a network user and embedded information, such as the URL address of another network node, thereby to permit the object itself to serve as an automated hot link. The underlying ... | 11/24/1998 |
| 5838189 | Substrate voltage generating circuit of semiconductor memory device A substrate voltage generating circuitry for a dynamic random access memory (DRAM) generates the substrate voltage using an intermittently enabled charge pump. The value to which the substrate voltage is regulated is adjusted responsive to the static refr... | 11/17/1998 |
| 5838945 | Tunable software control of harvard architecture cache memories using prefetch instructions Disclosed is an instruction-level method and system for prefetching data or instructions of variable size to specified cache sets. A prefetch instruction containing binary fields allows the compiler, loader or runtime software to control cache prefetching... | 11/17/1998 |
| 5835871 | Method and system for diagnosing and reporting failure of a vehicle emission test Disclosed is a system and method which systematically diagnoses emissions test failure by applying the rules of a knowledge base to predict the cause of vehicle emissions failures. Classifiers are used to form predictions. The classifier is the data struc... | 11/10/1998 |
| 5835380 | Simulation based extractor of expected waveforms for gate-level power analysis tool A simulation based power analysis tool extracts "expected" current waveforms from simulation results. These expected waveforms are then used to represent the power consumption for a corresponding circuit cell or groups of cells from which the waveform is ... | 11/10/1998 |
| 5835661 | Light expanding system for producing a linear or planar light beam from a point-like light source A light expanding system for converting a light beam generated from a point-like light source into a collimated linear or planar light beam is disclosed herein. According to an embodiment of the invention, a system for producing a linear light beam includ... | 11/10/1998 |
| 5832431 | Non-looped continuous sound by random sequencing of digital sound records Several short segments of an otherwise continuous sound are recorded and stored in a digital memory. The stored segments are concatenated together to form a sound sequence of arbitrary length, based on selecting the next sound segment according to some st... | 11/03/1998 |
| 5817144 | Method for contemporaneous application OF laser energy and localized pharmacologic therapy A method for contemporaneously applying laser energy and locally delivering pharmacologic therapy to a selected site in a body lumen using a liquid core or fiber optic laser catheter or angioscope. The method comprises preparing a solution of a pharmacolo... | 10/06/1998 |
| 5819220 | Web triggered word set boosting for speech interfaces to the world wide web A computer system for user speech actuation of access to stored information, the system including a central processing unit, a memory and a user input/output interface including a microphone for input of user speech utterances and audible sound signal pro... | 10/06/1998 |
| 5807591 | Method and apparatus for forming concrete products A mold box is flexibly mounted to a product forming machine having upper and lower vertically displaceable beams. A feed drawer dispenses concrete material into the mold box while a vibration system vertically vibrates the mold box while dampening horizon... | 09/15/1998 |
| 5803627 | Combination ink or dye ribbon and apparatus for nonimpact printing A nonimpact printer accommodates ribbons of selected panel types such as y, m, c and black thermal transfer or dye diffusion, precoat, overcoat, and the like, or combinations thereof, on which ribbon identification data is recorded in terms of the number ... | 09/08/1998 |
| 5803192 | Drill bit retainer for a down hole hammer assembly A down hole hammer assembly for percussive drilling of ground holes has a drill bit slidably carried in a chuck housed within a barrel of the assembly. Drill bit travel is limited by a retainer sleeve in place about a reduced segment of the drill bit. The... | 09/08/1998 |
| 5805748 | Laser beam shaping system A horizontally elongated laser beam is divided into a plurality of beam sections which are arranged along the horizontal direction and vertically deflected to different degrees by a beam deflecting beam guide, and the beam sections leaving the beam deflec... | 09/08/1998 |
| 5801417 | Self-aligned power MOSFET device with recessed gate and source A recessed gate power MOSFET is formed on a substrate (20) including a P-body layer (26), N-drain layer (24) and optional P+ layer (22) for IGBT. A trenching protective layer (30) formed on the substrate upper surface (28) is patterned to define exposed a... | 09/01/1998 |
| 5798969 | Data output buffer control circuit of a synchronous semiconductor memory device A method of controlling the buffering of output data by synchronizing with an external system clock, including the steps of generating an internal clock pulse, transferring data from a chip to a pair of data output lines in response to the internal clock ... | 08/25/1998 |
| 5796971 | Method for generating prefetch instruction with a field specifying type of information and location for it such as an instruction cache or data cache Disclosed is a method and system for providing for the prefetching of data or instructions. A prefetch instruction which is in an instruction stream is processed by memory management unit (MMU) where prefetch cache control information is placed as part of... | 08/18/1998 |
| 5796273 | Sense amplifier for semiconductor memory device A sense amplifier has a pair of output terminals and a first pair of pull-up transistors. A second pair of transistors is connected between the output terminals and a pull-down node. The gate electrodes of the second pair are cross-coupled to the output t... | 08/18/1998 |
| 5791897 | Multiwire arch system with improved interarch connector A multiarch assembly comprises first and second parallel archwires, each formed into a segment of an orthodontic archform spanning a plurality of a patient's teeth, a multiarch bracket having a bracket body defining reentrant archwire slots along opposite... | 08/11/1998 |
| 5790458 | Sense amplifier for nonvolatile semiconductor memory device A sense amplifier for transferring data between a data input/output line and a bit line in a nonvolatile semiconductor memory device includes two isolated current paths to prevent data collisions. A transistor transfers a bit of input data from the data i... | 08/04/1998 |
| 5789908 | Lighting dimmer rack with removable connector modules A dimmer rack utilizes removable connector modules for interfacing the rack to various types of standard electrical connectors in pre-existing lighting systems. The dinner rack includes a front bay for receiving dimmer modules, a rear bay for receiving th... | 08/04/1998 |
| 5783935 | Reference voltage generator and method utilizing clamping A reference voltage generating circuit has a divider circuit for decreasing a received external power-supply voltage and for providing the decreased voltage at a reference voltage output terminal. A PMOS transistor clamps the reference voltage at a predet... | 07/21/1998 |
| 5777934 | Semiconductor memory device with variable plate voltage generator A semiconductor memory device achieves high speed operation while operating at a low power supply voltage by boosting the voltage level at the plate node of a memory cell during an access operation. The memory device includes a plate voltage generator whi... | 07/07/1998 |
| 5768213 | Clock generating circuit for use in semiconductor memory device In a semiconductor memory integrated circuit device, power consumption and clock noise are reduced by providing a plurality of separately controlled internal clock signal generators. All of the internal clock signal generators receive an external clock si... | 06/16/1998 |
| 5767732 | Circuit for permanently adjusting a circuit element value in a semiconductor integrated circuit using fuse elements In a semiconductor integrated circuit, an internal passive circuit element value, such as a resistance, is permanently configured to a desired value by selectively fusing one or more fusing elements in response to corresponding input signals. An internal ... | 06/16/1998 |
| 5767710 | Power-up reset signal generating circuit for an integrated circuit A power-up reset signal generating circuit ensures proper operation of an integrated circuit upon power up by inhibiting operation, or forcing predetermined logic states, until the applied power supply voltage reaches at least an acceptable operating volt... | 06/16/1998 |
| 5766129 | Ultrasound diagnostic apparatus and method of forming an ultrasound image by the apparatus An ultrasound diagnosing apparatus comprises an ultrasound transducer for emitting ultrasound beams and receiving reflected beams to form a scanning plane, and for displacing the scanning plane three-dimensionally for N steps; image data processor for obt... | 06/16/1998 |
| 5768145 | Parametrized waveform processor for gate-level power analysis tool A power analysis tool includes a power arc identifier that extracts power arc information from simulation results including the occurrence time of each arc. These occurrence times are then stored in an arc occurrence database on which power analysis can b... | 06/16/1998 |
| 5761468 | Hardware mechanism for optimizing instruction and data prefetching by forming augmented prefetch instructions Disclosed is a prefetch execution unit, prefetch instruction buffer and a prefetch victim buffer which operate to optimize prefetching by recording a particular cache miss' history. To record cache misses, victimized (overwritten) lines and/or a prefetch ... | 06/02/1998 |
| 5761146 | Data in/out channel control circuit of semiconductor memory device having multi-bank structure A data in/out channel control circuit for a semiconductor memory device with multi-bank structure includes a plurality of split banks each provided with memory cell arrays, each split bank having a plurality of bit line pairs and a sub in/out line pair co... | 06/02/1998 |
| 5755744 | Electro-convulsive therapy (ECT) system with enhanced safety features An electro-convulsive therapy (ECT) system includes both hardware and software safety detectors and monitors, including a pulse generator that generates a pulse train of a plurality of pulses with parameters specified by the user. The safety monitors moni... | 05/26/1998 |
| 5747974 | Internal supply voltage generating circuit for semiconductor memory device Internal supply voltage generating circuits generate internal supply voltages at voltage levels below an external supply voltage. The internal supply voltages operate peripheral circuits and array circuits. A reference voltage generates a constant referen... | 05/05/1998 |
| 5748531 | Common source line control circuit for preventing snap back breakdown A common source line control circuit for a semiconductor memory device includes a resistor connected in series with a transistor to reduce the voltage across the transistor, thereby preventing snap back breakdown. The resistor and transistor are connected... | 05/05/1998 |
| 5739680 | Constant voltage control device The present invention relates to a constant voltage control device for preventing parasitic transistors from operating, which comprises a constant voltage generating section, an undervoltage lock-out section, an operation control section, and a supply vol... | 04/14/1998 |
| 5739413 | Forced dilution system and method for emissions measurement systems The combination of ambient air, exhaust and premeasured calibration gases is used according to this invention in the analysis of either low or high pollutant concentration gases measured by a single range analyzer. By using ambient air as a diluent and em... | 04/14/1998 |
| 5739476 | Multilayer printed circuit board laminated with unreinforced resin A printed circuit board laminated without reinforced binder. The invention makes possible reduced board thickness and increased layer count without excessive reduction in the thickness of core material. Laser or plasma drilling can be performed with incre... | 04/14/1998 |
| 5732415 | Adjustable pet eyewear The present invention is an eye protection device adapted to be worn by a canine. The device comprises an eye enclosure element such as a transparent plastic goggle which is adapted to rest snugly against the face of a canine. A pair of side straps extend... | 03/31/1998 |
| 5732032 | Semiconductor memory device having a burn-in control circuit and burn-in test method thereof A burn-in test circuit for a semiconductor memory device tests for defective memory cells. The test circuit applies a test signal that turns "off" transistors in a precharge circuit and applies a select signal to memory cells at predetermined intervals. T... | 03/24/1998 |
| 5726939 | Semiconductor memory device having fast writing circuit for test thereof The time required for testing high-density semiconductor memory devices is reduced by circuits and methodology for rapidly writing test data bits into the memory array. A common word line enable signal is arranged to turn on all of the word lines in the a... | 03/10/1998 |
