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...that Kleenex tissue was originally designed to be a gas mask filter? It was developed at the beginning of World War I to replace cotton, which was then in short supply as a surgical dressing.
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| Number | Title | Issue Date |
| 7945695 | Smart secretary A message-processing agent receives an object from a space in a Scalable Infrastructure System. The message-processing agent determines the destination of the object and checks a preference setting for the destination. The message-processing agent then routes the ob... | 05/17/2011 |
| 7253394 | Image sensor and method for fabricating the same An image sensor includes a substrate in which photoelectric elements have been formed, and an array of optical path conversion elements formed at a light so that the optical path converted light may be incident on the substrate, wherein each of the optical path conv... | 08/07/2007 |
| 7542366 | Nonvolatile semiconductor memory device with wired-or structure blocking data transmission from defective page buffer A nonvolatile semiconductor memory device includes a fuse, a switching enable circuit to generate a switching enable signal in response to a state of the fuse, and a switching unit to couple an internal output line of a page buffer set to a global output line in res... | 06/02/2009 |
| 7542328 | Method of detecting bit line bridge by selectively floating even-or odd-numbered bit lines of memory device Provided is a bit line bridge detection method for selectively floating even-numbered or odd-numbered bit lines. The bit line bridge detection method simultaneously activates even-numbered sense amplifiers and odd-numbered sense amplifiers in response to a sense amp... | 06/02/2009 |
| 7540193 | Triaxial acceleration sensor module and method of manufacturing the same A triaxial acceleration sensor module 100 includes: a hollow housing 30 provided with a partition plate 31 having a through-hole 32; a triaxial acceleration sensor 1 provided inside the housing 30; and a sensor driving IC | 06/02/2009 |
| 6844251 | Method of forming a semiconductor device with a junction termination layer A method and apparatus are provided for improving a breakdown voltage of a semiconductor device. The method includes the steps of coupling an electrode of the silicon-carbide diode to a drift layer of the semiconductor device through a charge transfer junction, said... | 01/18/2005 |
| 7539826 | System, device, and method for improved mirror mode operation of a semiconductor memory device By using the combination of a pre-existing command signal that is common to two memory devices and a non-shared command signal that is applied individually to each of the devices, embodiments of the invention may operate in a mirror mode, thereby preventing unwanted... | 05/26/2009 |
| 7538386 | MOS transistor having protruded-shape channel and method of fabricating the same A MOS transistor that has a protruding portion with a favorable vertical profile and a protruded-shape channel that requires no additional photolithography process, and a method of fabricating the same are provided. A first mask that defines an isolation region of a... | 05/26/2009 |
| 7537940 | Method of manufacturing electronic device capable of controlling threshold voltage and ion implanter controller and system that perform the method A method of manufacturing an electronic device, which can obtain sufficient manufacturing margins and reduce a defect rate by compensating for a threshold voltage variation caused by the variation of a critical dimension (CD) of a gate electrode. An ion implanter co... | 05/26/2009 |
| 7536352 | Tokenless biometric electronic financial transactions via a third party identicator A method and device enables tokenless authorization of an electronic payment between a payor and a payee using an electronic identicator and a one payor bid biometric sample. The payor registers with a registration biometric sample, and a payor financial account ide... | 05/19/2009 |
| 7535514 | Apparatus and method for decoding SECAM chrominance signal We describe an apparatus and method for decoding a SECAM chrominance signal. The apparatus may include a band-pass filter to separate the chrominance signal from the composite video baseband signal. A down-mixer down mixes the chrominance signal from a high to a low... | 05/19/2009 |
| 7535293 | Preamplifier circuits and methods of calibrating an offset in the same A preamplifier circuit includes a differential amplifying unit, an offset detection unit and a reference signal generation unit. The differential amplifying unit compares an input signal pair with a reference signal pair to generate an output signal pair. The offset... | 05/19/2009 |
| 7534726 | Method of forming a recess channel trench pattern, and fabricating a recess channel transistor A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with ... | 05/19/2009 |
| 7534709 | Semiconductor device and method of manufacturing the same Embodiments of the present invention include semiconductor devices that can be made with relatively low resistance, and methods of forming the semiconductor devices. A resistance reducing layer is formed between a polysilicon layer and a metal layer. As a result, an... | 05/19/2009 |
| 7534035 | Temperature sensor for generating sectional temperature code and sectional temperature detection method Provided are a temperature sensor for generating a sectional temperature code and sectional temperature detection method. In one embodiment, the temperature sensor includes a plurality of serially connected fixed delay cells inputting a temperature detection signal ... | 05/19/2009 |
| 7491344 | Method for etching an object using a plasma and an object etched by a plasma Disclosed herein is a method for etching a face of an object and more particularly a method for etching a rear face of a silicon substrate. The object having a silicon face is positioned so as to be spaced apart from a plasma-generating member by a predetermined int... | 02/17/2009 |
| 7488644 | Method of fabricating a semiconductor device Bit lines having first conductive patterns and bit line mask patterns are formed on a first insulating layer between capacitor contact regions of a substrate. An oxide second insulating layer is formed on the bit lines and contact patterns are formed to open storage... | 02/10/2009 |
| 7488203 | Electrical outlet assembly An electrical outlet device includes an enclosure that contains one or more electrical outlets. The enclosure has a top surface, a bottom surface, and a side surface extending from the top surface to the bottom surface and forming an enclosure perimeter. The device ... | 02/10/2009 |
| 7490072 | Providing access controls Providing access control for an application is disclosed. An application is monitored. An application profile is generated for the application. The application profile is based at least in part on behavior of the application as observed through the monitoring of the... | 02/10/2009 |
| 7489544 | Flash memory device having multi-level cell and reading and programming method thereof There is provided a flash memory device with multi-level cell and a reading and programming method thereof. The flash memory device with multi-level cell includes a memory cell array, a unit for precharging bit line, a bit line voltage supply circuit for supplying a... | 02/10/2009 |
| 7489035 | Integrated circuit chip package having a ring-shaped silicon decoupling capacitor A semiconductor package features a ring-shaped silicon decoupling capacitor that reduces simultaneous switching noise. The decoupling capacitor is fabricated on a substrate from silicon using a wafer fabrication process and takes the form of an annular capacitive st... | 02/10/2009 |
| 7482825 | Burn-in testing apparatus and method An integrated circuit (IC) package testing apparatus integrates a temperature sensor, heater (or cooler), and controller within a single modular unit. The controller is a microprocessor embedded within the modular unit and in communication with the sensor and heater... | 01/27/2009 |
| 7482210 | Method of fabricating semiconductor device having junction isolation insulating layer A semiconductor device and a method for fabricating the same are provided. The provided semiconductor device includes a field oxide layer formed in a semiconductor substrate to define an active region; gate structures formed on the active region; source/drain juncti... | 01/27/2009 |
| 7482616 | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a se... | 01/27/2009 |
| 7479408 | Stack package made of chip scale packages A stack package of the present invention is made by stacking at least two area array type chip scale packages. Each chip scale package of an adjacent pair of chip scale packages is attached to the other in a manner that the ball land pads of the upper stacked chip s... | 01/20/2009 |
| 7480012 | Multiplexed video digitization system and method The invention relates to a multiplexed video digitization system and method. The system includes a plurality of analog video signals, a multiplexer to select one of the plurality of analog video signals, and an analog-to-digital converter to convert the selected ana... | 01/20/2009 |
| 7479818 | Sense amplifier flip flop A sense amplifier flip flop including a differential input portion, a differential amplifying portion including a first inverter and a second inverter, and a bias voltage generating portion. The bias voltage generating portion is configured to generate body voltages... | 01/20/2009 |
| 7476973 | Method of manufacturing a semiconductor device having a silicidation blocking layer A silicidation blocking layer (SBL) pattern is formed on a substrate including an active region and a field region. The SBL pattern covers the field region and exposes the active region. A silicide layer is formed on the active region by reacting metal with silicon ... | 01/13/2009 |
| 7476962 | Stack semiconductor package formed by multiple molding and method of manufacturing the same Provided are a stack semiconductor package manufactured by multiple molding that can prevent the breakage due to stress concentration at a connecting portion between separate semiconductor packages and a method of manufacturing the same. The stacked semiconductor pa... | 01/13/2009 |
| 7476584 | Method of fabricating a semiconductor device with a bit line contact plug In one embodiment, a semiconductor device includes a plurality of gate electrodes formed on a semiconductor substrate including a cell region, a core region, and a peripheral circuit region, along with source/drain regions. A first landing pad contacts the source/dr... | 01/13/2009 |
| 7476924 | Semiconductor device having recessed landing pad and its method of fabrication A semiconductor device having a recessed landing pad includes a semiconductor substrate and a lower interlayer dielectric layer disposed on the semiconductor substrate. A first landing pad is disposed through the lower interlayer dielectric layer to be in contact wi... | 01/13/2009 |
| 7477548 | NAND flash memory device and methods of its formation and operation A NAND flash memory device, and methods of forming and operating the same are provided. The NAND flash memory device includes first and second selection gate lines sequentially disposed at one side of a plurality of cell gate lines. A first selection transistor incl... | 01/13/2009 |
| 7474564 | Non-volatile memory device capable of changing increment of program voltage according to mode of operation A non-volatile memory device includes a word line voltage generator circuit for generating a word line voltage to be supplied to a selected row in response to step control signals, and a program controller for generating the step control signals so that an increment... | 01/06/2009 |
| 7473590 | Semiconductor device having body contact through gate and method of fabricating the same According to an embodiment of the invention, a lower transistor is formed on a semiconductor substrate, and an upper thin film transistor is formed on the lower transistor. A body contact plug is formed to penetrate an upper gate electrode of the upper thin film tra... | 01/06/2009 |
| 7473954 | Bitline of semiconductor device having stud type capping layer and method for fabricating the same A semiconductor device with a bitline structure has a stud type capping layer. A method of fabricating the same achieves sufficient process margins and reduces parasitic capacitance. The device may include an insulating film formed on a semiconductor substrat... | 01/06/2009 |
| D584362 | C-frame sign | 01/06/2009 |
| 7475008 | Construction, manipulation, and comparison of a multi-dimensional semantic space A directed set can be used to establish contexts for linguistic concepts: for example, to aid in answering a question, to refine a query, or even to determine what questions can be answered given certain knowledge. A directed set includes a plurality of elements and... | 01/06/2009 |
| 7474587 | Flash memory device with rapid random access function and computing system including the same A flash memory device includes a memory cell array, an address buffer circuit including address buffers, each address buffer configured to store an address for a random read operation, a read circuit configured to sense data from the memory cell array in response to... | 01/06/2009 |
| 7473993 | Semiconductor stack package and memory module with improved heat dissipation A semiconductor stack package includes lower and upper individual packages. When the upper individual package is stacked on the lower individual package, a heat-conducting layer provided under the upper package touches a heat-mediating layer provided on the lower pa... | 01/06/2009 |
| 7470586 | Memory cell having bar-shaped storage node contact plugs and methods of fabricating same According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. A plurality of parallel bit line patterns are placed on the bit line interlayer insulating layer. Each of the bit line patterns has a bit line... | 12/30/2008 |
