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Pet Toilet-Like Water Disk and Food Storage
One pet-friendly inventor patented "a device for watering pets, e.g., a dog or cat." The device, he helpfully noted, "has the general shape of a toilet."
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| Number | Title | Issue Date |
| 7533253 | System and method for fetching a boot code A multi-chip system and a boot code fetch method include a nonvolatile memory chip storing a volatile memory chip, and a boot code, and a host fetching the boot code. The boot code is transferred to the volatile memory chip before the host fetches the boot code in t... | 05/12/2009 |
| 7532538 | Tri-state output driver arranging method and memory device using the same A memory device includes a first sensing amplifier to amplify data received from the memory array, a first driver to generate a first tri-state signal responsive to the amplified data from an first sense amplifier and to provide the first tri-state signal to a data ... | 05/12/2009 |
| 7532521 | NOR-NAND flash memory device with interleaved mat access In a NOR-NAND flash memory device, data bits may be alternately selected from first and second mats. A selected wordline in a mat may be kept active until completing a read operation for data bits of more than one memory cells coupled to the selected wordline. ... | 05/12/2009 |
| 7532510 | Flash memory device with sector access A flash memory includes memory cell array having memory cells divided into sectors, a page buffer block having groups of page buffers corresponding to the sectors, and a page buffer controller configured to control the groups of page buffers individually. In some em... | 05/12/2009 |
| 7532498 | Memory device, circuits and methods for reading a memory device A ferroelectric memory comprises a plurality of memory cells and circuitry to sense data thereof. Power supply decoupling circuitry may decouple supplies of the memory device during a portion of reading data. Additionally, ferroelectric domains of the memory cells m... | 05/12/2009 |
| 7532254 | Comb filter system and method I describe and claim a temporal comb filtering system and method. The temporal comb filter system includes a comb filter to temporally process separated luminance and chrominance components from an image field responsive to image data from at least one other image f... | 05/12/2009 |
| 7532253 | Television channel change picture-in-picture circuit and method We describe and claim television channel change picture-in-picture circuit and method. The circuit includes means for displaying a first channel on a primary portion of a screen, means for changing from the first channel to a second channel, and means for displaying... | 05/12/2009 |
| 7532056 | On chip temperature detector, temperature detection method and refresh control method using the same A temperature sensor includes a proportional to absolute temperature (PTAT) current generator configured to generate a first current proportional to temperature, a first complementary to absolute temperature (CTAT) current generator configured to generate a second c... | 05/12/2009 |
| 7531865 | Semiconductor device doped with Sb, Ga or Bi and method of manufacturing the same A semiconductor memory device includes a first dopant area and a second dopant area in a semiconductor substrate, the first dopant area and the second dopant area doped with one selected from the group consisting of Sb, Ga, and Bi. The semiconductor memory device in... | 05/12/2009 |
| 7531450 | Method of fabricating semiconductor device having contact hole with high aspect-ratio Provided is a method of fabricating a semiconductor device having a contact hole with a high aspect-ratio. The method includes: sequentially forming a lower pattern and an upper layer on a semiconductor substrate; sequentially forming a lower mask layer and an upper... | 05/12/2009 |
| 7531414 | Method of manufacturing integrated circuit device including recessed channel transistor A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device iso... | 05/12/2009 |
| 7531413 | Method of forming transistor having channel region at sidewall of channel portion hole According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predet... | 05/12/2009 |
| 7529723 | Multi-tiered structure for file sharing based on social roles An Internet-scale file sharing system includes a client-side file sharing application that allows file-sharing users to identify files to share and transmit metadata corresponding to those files to a metadata repository. A server-side application operating on the me... | 05/05/2009 |
| 7528431 | Semiconductor device having isolation pattern in interlayer insulating layer between capacitor contact plugs and methods of fabricating the same A semiconductor device having an isolation pattern inside an interlayer insulating layer between capacitor contact plugs and methods of fabrication the same: The semiconductor device includes an interlayer insulating layer covering a semiconductor substrate. At leas... | 05/05/2009 |
| 7528022 | Method of forming fin field effect transistor using damascene process A method of forming a fin transistor using a damascene process is provided. A filling mold insulation pattern is recessed to expose an upper portion of a fin, and a mold layer is formed. The mold layer is patterned to form a groove crossing the fin and exposing a pa... | 05/05/2009 |
| 7527359 | Circuitry for printer A print head has an array of jets formed in a jet stack to deliver ink to an image receptor and at least one ink reservoir to deliver ink to the jet stack. Control circuitry is arranged on the jet stack with an actuator array arranged on the control circuitry to cau... | 05/05/2009 |
| 7526959 | Method of inspecting a substrate using ultrasonic waves and apparatus for performing the same A method of inspecting a substrate is provided comprising applying ultrasonic waves to a substrate, receiving echo pulse signals transmitted through the substrate, and analyzing received echo pulse signals to detect defects in the substrate. Thus, defects in the sub... | 05/05/2009 |
| 7526688 | Parallel bit testing device and method A memory device includes a memory cell array to store data, a register to store test data, and a decision circuit to invert the test data and to determine a failure of at least one memory cell within the memory cell array responsive to the data, the test data, and t... | 04/28/2009 |
| 7526570 | Advanced switching optimal unicast and multicast communication paths based on SLS transport protocol An embodiment of the present invention may comprise a method to calculate current bandwidth usage by existing connections in a switching fabric between endpoints in a device, calculate available bandwidth for a new connection, and select a path from the multiple pat... | 04/28/2009 |
| 7525863 | Logic circuit setting optimization condition of semiconductor integrated circuit regardless of fuse cut Provided is a circuit for setting an optimized condition of a semiconductor circuit including a fuse cut signal generator configured to generate a fuse cut signal in response to a first control signal, and a state setting circuit configured to generate an optimizati... | 04/28/2009 |
| 7525645 | Exposure apparatus and method, and mask stage therefor In an embodiment a mask stage is used for an exposure process. The mask stage includes a first module. The first module includes a plurality of support surfaces on which a plurality of masks are mounted. The first module has a substantially cylindrical shape having ... | 04/28/2009 |
| 7524747 | Floating gate memory device and method of manufacturing the same Disclosed herein is a method of forming a floating gate in a non-volatile memory device having a self-aligned shallow trench isolation (SA-STI) structure. First, a tunnel oxide layer is formed on a semiconductor substrate having a SA-STI structure. Next, a first flo... | 04/28/2009 |
| 7524733 | Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same According to some embodiments of the invention, a method includes preparing a semiconductor substrate having an active region, doping channel ions in the active region, forming a planarized selective epitaxial growth (SEG) layer in a predetermined region of the acti... | 04/28/2009 |
| 7524724 | Method of forming titanium nitride layer and method of fabricating capacitor using the same A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium ... | 04/28/2009 |
| 7524085 | Series wiring of highly reliable light sources The light array of this invention includes a number of columns and rows of LED's connected in a series/parallel combination. The series parallel combinations effectively optimize the impedance, accommodate failure rate, facilitate light mixing, provide a means of im... | 04/28/2009 |
| D591362 | Primary gaming console | 04/28/2009 |
| D591361 | Gaming bank | 04/28/2009 |
| D591360 | Secondary gaming console | 04/28/2009 |
| 7521766 | Transistor and method of forming the same According to some embodiments of the invention, a fin type transistor includes an active structure integrally formed with a silicon substrate. The active structure includes grooves that form blocking regions under source/drain regions. A gate structure is formed to ... | 04/21/2009 |
| 7521694 | Ion source section for ion implantation equipment An ion source section of ion implantation equipment for ionizing reaction gas in an ion implantation process of semiconductor manufacturing processes is disclosed. The ion source section includes a source aperture member separable from an arc chamber and having an i... | 04/21/2009 |
| 7521348 | Method of fabricating semiconductor device having fine contact holes A method for fabricating a semiconductor device having fine contact holes is exemplarily disclosed. The method includes forming an isolation layer defining active regions on a semiconductor substrate. An interlayer dielectric layer is formed on the semiconductor sub... | 04/21/2009 |
| 7521115 | Low temperature bumping process A method for low temperature bumping is disclosed. A resin capable of being cross-linked by free-radical or cationic polymerization at low temperature is provided. Electrically conductive particles are then added to the resin to form a mixture. The mixture is then a... | 04/21/2009 |
| 7519918 | Mobile virtual desktop A device includes a display screen and a processor to render a display of a portion of a logical image on the screen. The logical image is larger than that which can be displayed on the display screen of the device. As the device is maneuvered through space, differe... | 04/14/2009 |
| 7518245 | Contact structure of a semiconductor device In one embodiment, a semiconductor device comprises a conductive pad formed in a semiconductor substrate. The semiconductor device further includes a conductive pattern overlying a peripheral region of the conductive pad. The conductive pattern has an opening to exp... | 04/14/2009 |
| 7517762 | Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of moisture through the sidewall of an exposed fuse opening portion, an etc... | 04/14/2009 |
| 7517431 | Spinning apparatus In an embodiment, a spinning apparatus includes a spin table on which an object to be etched is placed, a rotation unit rotating the spin table, and a nozzle unit including a center nozzle, disposed on the central portion of the spin table, and at least one side noz... | 04/14/2009 |
| 7517085 | Method and apparatus for eye tracking latency reduction A method for enhancing the performance of an eye position measurement system, said method comprising: based on a measurement of past eye positions, calculating a prediction of a future eye position; using said calc... | 04/14/2009 |
| 7516384 | Semiconductor memory testing device and test method using the same A test device for a semiconductor memory device includes a clock frequency multiplier, a data input buffer, a test data generator and a data output buffer. The clock frequency multiplier multiplies an external clock signal having a relatively low frequency provided ... | 04/07/2009 |
| 7515517 | Method and apparatus for data detection in blue laser optical disk drives A method and apparatus in an optical disk system employing a look-ahead data detection technique is described where an optimum detection is achieved with a minimum hardware complexity. In one embodiment, the boundary functions and the corresponding boundary decision... | 04/07/2009 |
| 7515205 | Weighted absolute difference based deinterlace method and apparatus We describe a weighted absolute difference based deinterlace method and apparatus. The deinterlace method and apparatus uses weighted absolute differences along different directions as means for interpolating pixel data using edge orientation detection. The apparatu... | 04/07/2009 |
